From: Raag Jadav <raag.jadav@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, daniele.ceraolospurio@intel.com,
riana.tauro@intel.com, mallesh.koujalagi@intel.com,
aravind.iddamsetty@intel.com, michal.wajdeczko@intel.com,
himal.prasad.ghimiray@intel.com, arvind.yadav@intel.com,
syed.abdul.muqthyar.ahmed@intel.com, nitin.r.gote@intel.com
Subject: Re: [PATCH v3 01/12] drm/xe/cper: Hardware error CPER reporting from xe_log
Date: Tue, 8 Sep 2026 12:12:30 +0200 [thread overview]
Message-ID: <ap_fjltTIY1mXyXF@black.igk.intel.com> (raw)
In-Reply-To: <20260906172604.2215987-15-badal.nilawar@intel.com>
On Sun, Sep 06, 2026 at 10:56:06PM +0530, Badal Nilawar wrote:
> Introduce xe_emit_hardware_error_cper() as public entry point
> for CPER reporting.
>
> Wire xe_log to route hardware SIGIDs through the new helper.
> No functional change is intended yet, as the CPER emission logic
> is added in follow-up patches.
>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 2 ++
> drivers/gpu/drm/xe/xe_cper.c | 37 ++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_cper.h | 25 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_log.c | 17 +++++++++++------
> 4 files changed, 75 insertions(+), 6 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_cper.c
> create mode 100644 drivers/gpu/drm/xe/xe_cper.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 67b8b5477639..06b064add77d 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -166,6 +166,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
> xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
> xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
>
> +xe-$(CONFIG_UEFI_CPER_X86) += xe_cper.o
Why x86?
> # graphics virtualization (SR-IOV) support
> xe-y += \
> xe_gt_sriov_vf.o \
> diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
> new file mode 100644
> index 000000000000..e8017e3ee3a0
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_cper.c
> @@ -0,0 +1,37 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include <linux/pci.h>
> +
> +#include <drm/drm_print.h>
> +
> +#include "xe_cper.h"
> +#include "xe_device.h"
> +#include "xe_ras_types.h"
> +
> +/**
> + * xe_emit_hardware_error_cper() - Emit a hardware error CPER record
> + * @pdev: PCI device associated with the Xe device
> + * @cper_sev: CPER severity
> + * @sigid: Error signature identifier
> + * @error_class: Hardware error classification details
> + * @response: Response of get counter
> + *
> + * Emit a CPER record for a hardware error
> + */
> +void xe_emit_hardware_error_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigid,
Why the long names? Can't this be simply xe_cper_hw_emit()?
> + struct xe_ras_error_class *counter,
> + struct xe_ras_get_counter_response *response)
> +{
> + struct xe_device *xe = pdev_to_xe_device(pdev);
> +
> + if (!xe)
> + return;
> +
> + if ((int)sigid >= INTEL_SIGID_GPU_XE_HARDWARE_START)
> + return;
> +
> + /* TODO */
> +}
> diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
> new file mode 100644
> index 000000000000..c4be7f25a369
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_cper.h
> @@ -0,0 +1,25 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_CPER_H_
> +#define _XE_CPER_H_
> +
> +#include "abi/xe_sigid_abi.h"
> +
> +struct pci_dev;
> +struct xe_ras_error_class;
> +struct xe_ras_get_counter_response;
> +
> +#if IS_REACHABLE(CONFIG_UEFI_CPER_X86)
> +void xe_emit_hardware_error_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigid,
> + struct xe_ras_error_class *counter,
> + struct xe_ras_get_counter_response *response);
> +#else
> +static inline void xe_emit_hardware_error_cper(struct pci_dev *pdev, int cper_sev,
> + enum xe_sigid sigid,
> + struct xe_ras_error_class *counter,
> + struct xe_ras_get_counter_response *response) {}
> +#endif
> +#endif /* _XE_CPER_H_ */
> diff --git a/drivers/gpu/drm/xe/xe_log.c b/drivers/gpu/drm/xe/xe_log.c
> index 5549ef6966fd..2957adec41aa 100644
> --- a/drivers/gpu/drm/xe/xe_log.c
> +++ b/drivers/gpu/drm/xe/xe_log.c
> @@ -8,17 +8,27 @@
>
> #include "abi/xe_log_abi.h"
>
> +#include "xe_cper.h"
> #include "xe_device.h"
> #include "xe_log.h"
> #include "xe_printk.h"
>
> +static bool is_hw_sigid(enum xe_sigid sigid)
> +{
> + return (int)sigid >= INTEL_SIGID_GPU_XE_HARDWARE_START;
Shouldn't this be
return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_GPU_XE_HARDWARE_END);
> +}
> +
> static void log_emit_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigid,
> u32 component, u32 location, const void *data, size_t len,
> struct va_format *vaf)
> {
> KUNIT_STATIC_STUB_REDIRECT(log_emit_cper, pdev, cper_sev, sigid,
> component, location, data, len, vaf);
> - /* TODO */
> +
> + if (is_hw_sigid(sigid) && !IS_ERR(data))
Why not !IS_ERR_OR_NULL(data)?
Raag
> + xe_emit_hardware_error_cper(pdev, cper_sev, sigid,
> + (struct xe_ras_error_class *)data, NULL);
> + /* TODO software CPER */
> }
>
> static const char *log_unknown_component_prefix(u32 component)
> @@ -100,11 +110,6 @@ static const char *log_location_prefix(struct pci_dev *pdev, u32 location, char
> return buf;
> }
>
> -static bool is_hw_sigid(enum xe_sigid sigid)
> -{
> - return (int)sigid >= INTEL_SIGID_GPU_XE_HARDWARE_START;
> -}
> -
> static bool is_sev_error(int cper_sev)
> {
> return cper_sev != CPER_SEV_INFORMATIONAL;
> --
> 2.54.0
>
next prev parent reply other threads:[~2026-09-08 10:12 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-06 17:26 [PATCH v3 00/12] Add CPER logging support for CRI Badal Nilawar
2026-09-06 17:16 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev3) Patchwork
2026-09-06 17:18 ` ✓ CI.KUnit: success " Patchwork
2026-09-06 17:26 ` [PATCH v3 01/12] drm/xe/cper: Hardware error CPER reporting from xe_log Badal Nilawar
2026-09-06 17:21 ` sashiko-bot
2026-09-07 12:38 ` Michal Wajdeczko
2026-09-10 11:39 ` Nilawar, Badal
2026-09-08 10:12 ` Raag Jadav [this message]
2026-09-10 12:33 ` Nilawar, Badal
2026-09-06 17:26 ` [PATCH v3 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-09-06 17:23 ` sashiko-bot
2026-09-08 10:16 ` Raag Jadav
2026-09-09 6:12 ` Raag Jadav
2026-09-10 12:59 ` Nilawar, Badal
2026-09-10 13:19 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 03/12] drm/xe/cper: Add Intel specific CPER structures Badal Nilawar
2026-09-07 13:13 ` Michal Wajdeczko
2026-09-10 11:57 ` Nilawar, Badal
2026-09-08 10:18 ` Raag Jadav
2026-09-10 13:36 ` Nilawar, Badal
2026-09-06 17:26 ` [PATCH v3 04/12] drm/xe/cper: Prepare CPER record Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-08 10:20 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-09-06 17:17 ` sashiko-bot
2026-09-09 8:03 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-09-06 17:30 ` sashiko-bot
2026-09-09 11:58 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 07/12] drm/xe/cper: Log CPER records for aggregate counter retrival Badal Nilawar
2026-09-06 17:23 ` sashiko-bot
2026-09-10 6:27 ` Raag Jadav
2026-09-10 22:29 ` Rodrigo Vivi
2026-09-06 17:26 ` [PATCH v3 08/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 09/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-09-06 17:21 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 10/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-09-06 17:26 ` [PATCH v3 11/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 12/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-09-06 17:28 ` sashiko-bot
2026-09-10 7:58 ` Raag Jadav
2026-09-06 17:55 ` ✓ Xe.CI.BAT: success for Add CPER logging support for CRI (rev3) Patchwork
2026-09-06 19:02 ` ✗ Xe.CI.FULL: failure " Patchwork
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