From: Raag Jadav <raag.jadav@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, daniele.ceraolospurio@intel.com,
riana.tauro@intel.com, mallesh.koujalagi@intel.com,
aravind.iddamsetty@intel.com, michal.wajdeczko@intel.com,
himal.prasad.ghimiray@intel.com, arvind.yadav@intel.com,
syed.abdul.muqthyar.ahmed@intel.com, nitin.r.gote@intel.com
Subject: Re: [PATCH v3 04/12] drm/xe/cper: Prepare CPER record
Date: Tue, 8 Sep 2026 12:20:41 +0200 [thread overview]
Message-ID: <ap_heXgiRP0bN9Jc@black.igk.intel.com> (raw)
In-Reply-To: <20260906172604.2215987-18-badal.nilawar@intel.com>
On Sun, Sep 06, 2026 at 10:56:09PM +0530, Badal Nilawar wrote:
> Initialize Intel-specific CPER metadata and construct
> CPER record for Intel GPU hardware errors.
...
> @@ -48,5 +209,15 @@ void xe_emit_hardware_error_cper(struct pci_dev *pdev, int cper_sev, enum xe_sig
> }
> }
>
> + xe_cper_init_intel_err_hdr(xe,
> + (const u8 *)counter,
> + counter_response->timestamp,
> + sigid,
> + counter_response->value,
> + &ihdr);
> +
> + xe_cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR,
> + &ihdr, NULL, 0);
Hm, can these two calls be split in their own patches which also
introduce their respective structs?
Raag
> +
> /* TODO */
> }
> --
> 2.54.0
>
next prev parent reply other threads:[~2026-09-08 10:20 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-06 17:26 [PATCH v3 00/12] Add CPER logging support for CRI Badal Nilawar
2026-09-06 17:16 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev3) Patchwork
2026-09-06 17:18 ` ✓ CI.KUnit: success " Patchwork
2026-09-06 17:26 ` [PATCH v3 01/12] drm/xe/cper: Hardware error CPER reporting from xe_log Badal Nilawar
2026-09-06 17:21 ` sashiko-bot
2026-09-07 12:38 ` Michal Wajdeczko
2026-09-10 11:39 ` Nilawar, Badal
2026-09-08 10:12 ` Raag Jadav
2026-09-10 12:33 ` Nilawar, Badal
2026-09-06 17:26 ` [PATCH v3 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-09-06 17:23 ` sashiko-bot
2026-09-08 10:16 ` Raag Jadav
2026-09-09 6:12 ` Raag Jadav
2026-09-10 12:59 ` Nilawar, Badal
2026-09-10 13:19 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 03/12] drm/xe/cper: Add Intel specific CPER structures Badal Nilawar
2026-09-07 13:13 ` Michal Wajdeczko
2026-09-10 11:57 ` Nilawar, Badal
2026-09-08 10:18 ` Raag Jadav
2026-09-10 13:36 ` Nilawar, Badal
2026-09-06 17:26 ` [PATCH v3 04/12] drm/xe/cper: Prepare CPER record Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-08 10:20 ` Raag Jadav [this message]
2026-09-06 17:26 ` [PATCH v3 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-09-06 17:17 ` sashiko-bot
2026-09-09 8:03 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-09-06 17:30 ` sashiko-bot
2026-09-09 11:58 ` Raag Jadav
2026-09-06 17:26 ` [PATCH v3 07/12] drm/xe/cper: Log CPER records for aggregate counter retrival Badal Nilawar
2026-09-06 17:23 ` sashiko-bot
2026-09-10 6:27 ` Raag Jadav
2026-09-10 22:29 ` Rodrigo Vivi
2026-09-06 17:26 ` [PATCH v3 08/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 09/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-09-06 17:21 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 10/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-09-06 17:26 ` [PATCH v3 11/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-09-06 17:27 ` sashiko-bot
2026-09-06 17:26 ` [PATCH v3 12/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-09-06 17:28 ` sashiko-bot
2026-09-10 7:58 ` Raag Jadav
2026-09-06 17:55 ` ✓ Xe.CI.BAT: success for Add CPER logging support for CRI (rev3) Patchwork
2026-09-06 19:02 ` ✗ Xe.CI.FULL: failure " Patchwork
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