From: Brian Masney <bmasney@redhat.com>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chun-Jie Chen <chun-jie.chen@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Edward-JW Yang <edward-jw.yang@mediatek.com>,
Richard Cochran <richardcochran@gmail.com>,
Chen-Yu Tsai <wenst@chromium.org>,
kernel@collabora.com, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, netdev@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>,
Irving-CH Lin <irving-ch.lin@mediatek.com>
Subject: Re: [PATCH v4 00/24] MT8189: Add support for system and base clock controllers
Date: Mon, 14 Sep 2026 09:44:20 -0400 [thread overview]
Message-ID: <aqf6NH-xrMtCQppv@redhat.com> (raw)
In-Reply-To: <1f6bdf69-c3fe-4e1d-8ff8-0e36d9f4e063@collabora.com>
Hi Angelo,
On Fri, Jul 31, 2026 at 12:04:49PM +0200, AngeloGioacchino Del Regno wrote:
> On 7/30/26 20:22, Brian Masney wrote:
> > Should there be a new MAINTAINERS entry added? There's currently 221
> > files under drivers/clk/mediatek/ and there's currently only one
> > mediatek maintainer entry:
> >
> > MEDIATEK MT6735 CLOCK & RESET DRIVERS.
> >
> > Is there anyone from mediatek (or elsewhere) that could act as a clk
> > subsystem maintainer similar to what the other SoC vendors do? Help with
> > reviews, send in pulls, etc?
> >
>
> I may be able to step in, but I have to check if it's feasible, time-wise, on
> my side.
>
> Though, that won't happen until mid-September... because, well, I'm about to go
> on holiday (in a few days from now).
I'm checking in to see if you would be willing to be clk submaintainer
for the MediaTek clk drivers?
Brian
next prev parent reply other threads:[~2026-09-14 13:44 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 10:02 [PATCH v4 00/24] MT8189: Add support for system and base clock controllers Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 01/24] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8186 Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 02/24] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192 Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 03/24] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 04/24] dt-bindings: clock: mediatek: reorder MT8186 compatibles Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 05/24] dt-bindings: clock: mediatek: regroup MT8188 dt-bindings into MT8186 Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 06/24] dt-bindings: clock: mediatek: regroup MT8192 " Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 07/24] dt-bindings: clock: mediatek: regroup MT8195 " Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 08/24] dt-bindings: clock: mediatek: Add MT8189 system/base clocks and resets Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 09/24] clk: mediatek: Harmonize mtk_pll_fenc related symbol names Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 10/24] clk: mediatek: pll: Add BAR reset register offsets Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 11/24] clk: mediatek: pll: split default prepare/unprepare callbacks Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 12/24] clk: mediatek: pll: Add ops for PLLs using set/clr regs Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 13/24] clk: mediatek: pllfh: Add configurable clock ops to mtk_pllfh_data Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 14/24] clk: mediatek: pllfh: Add ops for PLLs using set/clr regs Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 15/24] clk: mediatek: Add MT8189 apmixedsys clock support Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:03 ` [PATCH v4 16/24] clk: mediatek: Add MT8189 topckgen " Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:03 ` [PATCH v4 17/24] clk: mediatek: Add MT8189 vlpckgen " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 18/24] clk: mediatek: Add MT8189 vlpcfg " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 19/24] clk: mediatek: Add MT8189 bus " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 20/24] clk: mediatek: Add MT8189 dbgao " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 21/24] clk: mediatek: Add MT8189 dvfsrc " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 22/24] clk: mediatek: Add MT8189 i2c " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 23/24] clk: mediatek: Add MT8189 scp " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 24/24] clk: mediatek: Add MT8189 ufs " Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-30 18:22 ` [PATCH v4 00/24] MT8189: Add support for system and base clock controllers Brian Masney
2026-07-31 10:04 ` AngeloGioacchino Del Regno
2026-09-14 13:44 ` Brian Masney [this message]
2026-09-14 13:48 ` AngeloGioacchino Del Regno
2026-09-14 14:05 ` Brian Masney
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aqf6NH-xrMtCQppv@redhat.com \
--to=bmasney@redhat.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=chun-jie.chen@mediatek.com \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=edward-jw.yang@mediatek.com \
--cc=irving-ch.lin@mediatek.com \
--cc=kernel@collabora.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=louisalexis.eyraud@collabora.com \
--cc=matthias.bgg@gmail.com \
--cc=mturquette@baylibre.com \
--cc=netdev@vger.kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=richardcochran@gmail.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=wenst@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.