[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Alan Previn]

Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
and pick the correct helper accordingly. Fix sign-overflow and avoid
growing delays becoming intollerably large by capping the in-loop
wait time. Simplify sleep_min assignment by removing redundant cast.

Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Assisted-by: Github-Copilot:Claude-Sonnet-4-6
---
 drivers/gpu/drm/xe/xe_mmio.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7fa18dfcb5a2..cf2e05aaa4b2 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -349,11 +349,23 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
 		if (ktime_after(ktime_add_us(cur, wait), end))
 			wait = ktime_us_delta(end, cur);
 
-		if (atomic)
-			udelay(wait);
-		else
-			usleep_range(wait, wait << 1);
-		wait <<= 1;
+#define __XE_MMIO_WAIT_MAX_INLOOP_TIME (100 * USEC_PER_MSEC)
+		if (atomic) {
+			if (wait <= MAX_UDELAY_MS * USEC_PER_MSEC)
+				udelay(wait);
+			else
+				mdelay(DIV_ROUND_UP(wait, USEC_PER_MSEC));
+		} else {
+			usleep_range(wait, __XE_MMIO_WAIT_MAX_INLOOP_TIME);
+		}
+		/*
+		 * As we keep doubling the wait time for every check that fails, cap the
+		 * in-loop delay-or-sleep to less than 2x 100 miliseconds to prevent from
+		 * expanding 'wait' into exponentially longer wait times per loop that
+		 * end up delaying the next completion check way later than tolerable.
+		 */
+		wait = wait < __XE_MMIO_WAIT_MAX_INLOOP_TIME >> 1 ?
+		       wait << 1 : __XE_MMIO_WAIT_MAX_INLOOP_TIME;
 	}
 
 	if (ret != 0) {

base-commit: 71bc3b7cc55631a9b3807da98e2b2880838b9623
-- 
2.43.0

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] Incorrect maximum delay in usleep_range() introduces massive timer slack, defeating exponential backoff and causing extreme latency and spurious timeouts.
- [Medium] The commit message claims to simplify a `sleep_min` assignment, but no such change exists in the code.
- [Low] 64-bit division on 32-bit architectures causes link errors.
--

commit 76cc600b7d97fbc1edcd9a133df8168f9ad41977
Author: Alan Previn <alan.previn.teres.alexis@intel.com>

drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

This patch adds overflow checks for delays in __xe_mmio_wait32() and
introduces caps to the maximum in-loop wait time. It also aims to pick
the correct sleep or delay helper based on the requested wait duration.

> drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums
> 
> Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
> and pick the correct helper accordingly. Fix sign-overflow and avoid
> growing delays becoming intollerably large by capping the in-loop
> wait time. Simplify sleep_min assignment by removing redundant cast.

[Severity: Medium]
The commit message claims to simplify the sleep_min assignment by removing
a redundant cast, but the variable sleep_min does not exist in the modified
code. Could the commit message be updated to reflect the actual changes?

> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a28..cf2e05aaa4b2f 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c

[ ... ]

> @@ -349,11 +349,23 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
>  		if (ktime_after(ktime_add_us(cur, wait), end))
>  			wait = ktime_us_delta(end, cur);
>  
> -		if (atomic)
> -			udelay(wait);
> -		else
> -			usleep_range(wait, wait << 1);
> -		wait <<= 1;
> +#define __XE_MMIO_WAIT_MAX_INLOOP_TIME (100 * USEC_PER_MSEC)
> +		if (atomic) {
> +			if (wait <= MAX_UDELAY_MS * USEC_PER_MSEC)
> +				udelay(wait);
> +			else
> +				mdelay(DIV_ROUND_UP(wait, USEC_PER_MSEC));

[Severity: Low]
Wait is defined as an s64 type. Does using DIV_ROUND_UP(wait, USEC_PER_MSEC)
here cause a 64-bit division? On 32-bit architectures, this could lead to an
undefined reference to __divdi3 and break the build.

> +		} else {
> +			usleep_range(wait, __XE_MMIO_WAIT_MAX_INLOOP_TIME);

[Severity: High]
Does hardcoding __XE_MMIO_WAIT_MAX_INLOOP_TIME (100ms) as the maximum bound
for usleep_range() introduce massive timer slack? For example, on the first
iteration where wait is 10us, this allows the scheduler to delay the wakeup
for up to 100ms, completely defeating the intended exponential backoff.
This could cause massive latency spikes for fast MMIO operations in non-atomic
calls to __xe_mmio_wait32().

> +		}
> +		/*
> +		 * As we keep doubling the wait time for every check that fails, cap the
> +		 * in-loop delay-or-sleep to less than 2x 100 miliseconds to prevent from
> +		 * expanding 'wait' into exponentially longer wait times per loop that
> +		 * end up delaying the next completion check way later than tolerable.
> +		 */
> +		wait = wait < __XE_MMIO_WAIT_MAX_INLOOP_TIME >> 1 ?
> +		       wait << 1 : __XE_MMIO_WAIT_MAX_INLOOP_TIME;
>  	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260907235524.7807-2-alan.previn.teres.alexis@intel.com?part=1

[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Alan Previn]

Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
and pick the correct helper according to the wait time and atomic.
Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
Avoid growing delays becoming intollerably large by capping the
in-loop wait time.

v2: - Fixed checkpatch failure.
    - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
      review). Fixed bug max range in usleep_range(Shasiko review)

Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Assisted-by: Github-Copilot:Claude-Sonnet-5-0
---
 drivers/gpu/drm/xe/xe_mmio.c | 50 ++++++++++++++++++++++++++++++++----
 1 file changed, 45 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7fa18dfcb5a2..1ae382f009de 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -7,6 +7,8 @@
 
 #include <linux/delay.h>
 #include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/math.h>
+#include <linux/math64.h>
 #include <linux/minmax.h>
 #include <linux/pci.h>
 
@@ -320,6 +322,30 @@ u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)
 	return (u64)udw << 32 | ldw;
 }
 
+/**
+ * __div_round_up64() - alternative to DIV_ROUND_UP for use by __xe_mmio_wait32
+ * @dividend: 64 bit positive number to divide
+ * @divisor: 64 bit positive divisor
+ *
+ * DIV_ROUND_UP() relies on plain '/' and '%' operators, which for 64-bit
+ * operands on a 32-bit CPU get turned into calls to libgcc's __divdi3()/
+ * __moddi3(), routines the kernel does not link against. Provide a
+ * do_div()-based equivalent that works for signed 64-bit inputs on any
+ * architecture.
+ *
+ * Returns: rounded up division result
+ */
+static inline s64 __div_round_up64(s64 dividend, s64 divisor)
+{
+	u64 abs_dividend = abs(dividend);
+	u64 abs_divisor = abs(divisor);
+	u64 result = abs_dividend + abs_divisor - 1;
+
+	do_div(result, abs_divisor);
+	/* dont check for negative values as local caller only uses positive numbers */
+	return (s64)result;
+}
+
 static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
 			    u32 timeout_us, u32 *out_val, bool atomic, bool expect_match)
 {
@@ -349,11 +375,25 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
 		if (ktime_after(ktime_add_us(cur, wait), end))
 			wait = ktime_us_delta(end, cur);
 
-		if (atomic)
-			udelay(wait);
-		else
-			usleep_range(wait, wait << 1);
-		wait <<= 1;
+#define __XE_MMIO_WAIT_MAX_INLOOP_100MS (100 * USEC_PER_MSEC)
+		if (atomic) {
+			if (wait <= MAX_UDELAY_MS * USEC_PER_MSEC)
+				udelay(wait);
+			else if (BITS_PER_LONG == 32)
+				mdelay(DIV_ROUND_UP(wait, USEC_PER_MSEC));
+			else
+				mdelay(__div_round_up64(wait, USEC_PER_MSEC));
+		} else {
+			usleep_range(wait, wait + (wait >> 2)); /* range till wait + 25% */
+		}
+		/*
+		 * As we keep doubling the wait time for every check that fails, cap the
+		 * in-loop delay-or-sleep to less than 2x 100 milliseconds to prevent from
+		 * expanding 'wait' into exponentially longer wait times per loop that
+		 * end up delaying the next completion check way later than tolerable.
+		 */
+		wait = wait < __XE_MMIO_WAIT_MAX_INLOOP_100MS >> 1 ?
+		       wait << 1 : __XE_MMIO_WAIT_MAX_INLOOP_100MS;
 	}
 
 	if (ret != 0) {
-- 
2.43.0

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The custom helper `__div_round_up64` silently truncates 64-bit divisors to 32 bits, creating a mathematically unsound helper.
- [Low] Inverted architecture check for 64-bit division causes a `__divdi3` link error on 32-bit builds, and needlessly uses a custom fallback on 64-bit builds.
--

commit 2d4751e6d3870228fa27b4fdbbb10070a48ae9ce
Author: Alan Previn <alan.previn.teres.alexis@intel.com>

drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

This commit fixes xe_mmio_wait32() to honor delay and sleep maximums by
checking for overflow in udelay and usleep_range. It also adds a custom
64-bit division helper and caps the in-loop wait time to prevent
intolerably large delays.

> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a28..1ae382f009de5 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
[ ... ]
> +static inline s64 __div_round_up64(s64 dividend, s64 divisor)
> +{
> +	u64 abs_dividend = abs(dividend);
> +	u64 abs_divisor = abs(divisor);
> +	u64 result = abs_dividend + abs_divisor - 1;
> +
> +	do_div(result, abs_divisor);

[Severity: Medium]
Does passing a 64-bit divisor to do_div() cause silent truncation here?

The do_div() macro is strictly designed for 32-bit divisors and will
silently truncate the 64-bit abs_divisor parameter. While the current caller
in __xe_mmio_wait32() only passes USEC_PER_MSEC (which fits in 32 bits),
creating a generic helper that accepts an s64 divisor is structurally
unsafe.

Could this use DIV64_U64_ROUND_UP() from linux/math64.h instead?

> +	/* dont check for negative values as local caller only uses positive numbers */
> +	return (s64)result;
> +}
[ ... ]
> @@ -349,11 +375,25 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
[ ... ]
> -		if (atomic)
> -			udelay(wait);
> -		else
> -			usleep_range(wait, wait << 1);
> -		wait <<= 1;
> +#define __XE_MMIO_WAIT_MAX_INLOOP_100MS (100 * USEC_PER_MSEC)
> +		if (atomic) {
> +			if (wait <= MAX_UDELAY_MS * USEC_PER_MSEC)
> +				udelay(wait);
> +			else if (BITS_PER_LONG == 32)
> +				mdelay(DIV_ROUND_UP(wait, USEC_PER_MSEC));

[Severity: Low]
Does this architecture check invert the intended 64-bit division logic?

When BITS_PER_LONG == 32, this branch executes the native 64-bit division
DIV_ROUND_UP(wait, USEC_PER_MSEC). This causes a __divdi3 unresolved symbol
link error on 32-bit builds, which appears to be the exact build break this
helper was intended to avoid.

> +			else
> +				mdelay(__div_round_up64(wait, USEC_PER_MSEC));

Consequently, 64-bit builds will take this else branch and needlessly use
the custom division helper instead of the native division macro.

> +		} else {
> +			usleep_range(wait, wait + (wait >> 2)); /* range till wait + 25% */
> +		}
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908185609.359565-2-alan.previn.teres.alexis@intel.com?part=1

[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Alan Previn]

Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
and pick the correct helper according to the wait time and atomic.
Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
Avoid growing delays becoming intollerably large by capping the
in-loop wait time.

v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
v2: - Fixed checkpatch failure.
    - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
      review). Fixed bug max range in usleep_range(Shasiko review)

Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Assisted-by: Github-Copilot:Claude-Sonnet-5-0
---
 drivers/gpu/drm/xe/xe_mmio.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7fa18dfcb5a2..507095f33cec 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -7,6 +7,7 @@
 
 #include <linux/delay.h>
 #include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/math64.h>
 #include <linux/minmax.h>
 #include <linux/pci.h>
 
@@ -349,11 +350,23 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
 		if (ktime_after(ktime_add_us(cur, wait), end))
 			wait = ktime_us_delta(end, cur);
 
-		if (atomic)
-			udelay(wait);
-		else
-			usleep_range(wait, wait << 1);
-		wait <<= 1;
+#define __XE_MMIO_WAIT_MAX_INLOOP_100MS (100 * USEC_PER_MSEC)
+		if (atomic) {
+			if (wait <= MAX_UDELAY_MS * USEC_PER_MSEC)
+				udelay(wait);
+			else
+				mdelay(div64_s64(wait, USEC_PER_MSEC));
+		} else {
+			usleep_range(wait, wait + (wait >> 2)); /* range till wait + 25% */
+		}
+		/*
+		 * As we keep doubling the wait time for every check that fails, cap the
+		 * in-loop delay-or-sleep to less than 2x 100 milliseconds to prevent from
+		 * expanding 'wait' into exponentially longer wait times per loop that
+		 * end up delaying the next completion check way later than tolerable.
+		 */
+		wait = wait < __XE_MMIO_WAIT_MAX_INLOOP_100MS >> 1 ?
+		       wait << 1 : __XE_MMIO_WAIT_MAX_INLOOP_100MS;
 	}
 
 	if (ret != 0) {
-- 
2.43.0

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Jani Nikula]

On Tue, 08 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
> and pick the correct helper according to the wait time and atomic.
> Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
> Avoid growing delays becoming intollerably large by capping the
> in-loop wait time.

I think it might be a better idea to remove the exponentially growing
wait time instead. It might have seemed good on paper, but you should do
the math in typical use cases and see how it actually behaves. (Spoiler:
Lots of useless back-to-back reads in the beginning, and then quickly
increasing to waits beyond the timeout and delay maximums.)

This is code that should be possible to understand. I'd suggest
simplifying the whole thing instead of making it more complex.

I think it would be much better to migrate xe mmio to use
poll_timeout_us() and poll_timeout_us_atomic() instead. For the rare
cases that actually need the quick hammering followed by slower waits,
you can trivially do two calls with delays and timeouts considered for
*that* particular use case.

I also think it's a mistake (copy-pasted from i915) to specify "atomic"
as a parameter. They should be separate functions all the way from the
caller.


BR,
Jani.


>
> v2: - Fixed checkpatch failure.
>     - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
>       review). Fixed bug max range in usleep_range(Shasiko review)
>
> Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> Assisted-by: Github-Copilot:Claude-Sonnet-5-0
> ---
>  drivers/gpu/drm/xe/xe_mmio.c | 50 ++++++++++++++++++++++++++++++++----
>  1 file changed, 45 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a2..1ae382f009de 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -7,6 +7,8 @@
>  
>  #include <linux/delay.h>
>  #include <linux/io-64-nonatomic-lo-hi.h>
> +#include <linux/math.h>
> +#include <linux/math64.h>
>  #include <linux/minmax.h>
>  #include <linux/pci.h>
>  
> @@ -320,6 +322,30 @@ u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)
>  	return (u64)udw << 32 | ldw;
>  }
>  
> +/**
> + * __div_round_up64() - alternative to DIV_ROUND_UP for use by __xe_mmio_wait32
> + * @dividend: 64 bit positive number to divide
> + * @divisor: 64 bit positive divisor
> + *
> + * DIV_ROUND_UP() relies on plain '/' and '%' operators, which for 64-bit
> + * operands on a 32-bit CPU get turned into calls to libgcc's __divdi3()/
> + * __moddi3(), routines the kernel does not link against. Provide a
> + * do_div()-based equivalent that works for signed 64-bit inputs on any
> + * architecture.
> + *
> + * Returns: rounded up division result
> + */
> +static inline s64 __div_round_up64(s64 dividend, s64 divisor)
> +{
> +	u64 abs_dividend = abs(dividend);
> +	u64 abs_divisor = abs(divisor);
> +	u64 result = abs_dividend + abs_divisor - 1;
> +
> +	do_div(result, abs_divisor);
> +	/* dont check for negative values as local caller only uses positive numbers */
> +	return (s64)result;
> +}
> +
>  static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
>  			    u32 timeout_us, u32 *out_val, bool atomic, bool expect_match)
>  {
> @@ -349,11 +375,25 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
>  		if (ktime_after(ktime_add_us(cur, wait), end))
>  			wait = ktime_us_delta(end, cur);
>  
> -		if (atomic)
> -			udelay(wait);
> -		else
> -			usleep_range(wait, wait << 1);
> -		wait <<= 1;
> +#define __XE_MMIO_WAIT_MAX_INLOOP_100MS (100 * USEC_PER_MSEC)
> +		if (atomic) {
> +			if (wait <= MAX_UDELAY_MS * USEC_PER_MSEC)
> +				udelay(wait);
> +			else if (BITS_PER_LONG == 32)
> +				mdelay(DIV_ROUND_UP(wait, USEC_PER_MSEC));
> +			else
> +				mdelay(__div_round_up64(wait, USEC_PER_MSEC));
> +		} else {
> +			usleep_range(wait, wait + (wait >> 2)); /* range till wait + 25% */
> +		}
> +		/*
> +		 * As we keep doubling the wait time for every check that fails, cap the
> +		 * in-loop delay-or-sleep to less than 2x 100 milliseconds to prevent from
> +		 * expanding 'wait' into exponentially longer wait times per loop that
> +		 * end up delaying the next completion check way later than tolerable.
> +		 */
> +		wait = wait < __XE_MMIO_WAIT_MAX_INLOOP_100MS >> 1 ?
> +		       wait << 1 : __XE_MMIO_WAIT_MAX_INLOOP_100MS;
>  	}
>  
>  	if (ret != 0) {

-- 
Jani Nikula, Intel

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Teres Alexis, Alan Previn]

On Wed, 2026-09-09 at 11:00 +0300, Jani Nikula wrote:
> On Tue, 08 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> > Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
> > and pick the correct helper according to the wait time and atomic.
> > Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
> > Avoid growing delays becoming intollerably large by capping the
> > in-loop wait time.
> 
> I think it might be a better idea to remove the exponentially growing
> wait time instead. It might have seemed good on paper, but you should do
> the math in typical use cases and see how it actually behaves. (Spoiler:
> Lots of useless back-to-back reads in the beginning, and then quickly
> increasing to waits beyond the timeout and delay maximums.)
> 
> This is code that should be possible to understand. I'd suggest
> simplifying the whole thing instead of making it more complex.
> 
> I think it would be much better to migrate xe mmio to use
> poll_timeout_us() and poll_timeout_us_atomic() instead. For the rare
> cases that actually need the quick hammering followed by slower waits,
> you can trivially do two calls with delays and timeouts considered for
> *that* particular use case.

alan: right - will do.
> 
> I also think it's a mistake (copy-pasted from i915) to specify "atomic"
> as a parameter. They should be separate functions all the way from the
> caller.
> 
alan: not sure i understand why this is a mistake - the caller needs to
ensure they call with the correct parameter - so its either they call with
the correct parameter or the correct suffix version of the xe_mmio_wait
(if we decide to go with separate functions). Its basically the same no?
In any case, sure - will do that too.

> 
> BR,
> Jani.
> 
> 
> > 
> > v2: - Fixed checkpatch failure.
> >     - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
> >       review). Fixed bug max range in usleep_range(Shasiko review)
> > 
> > Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
> > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> > Assisted-by: Github-Copilot:Claude-Sonnet-5-0
> > ---
> >  drivers/gpu/drm/xe/xe_mmio.c | 50 ++++++++++++++++++++++++++++++++----
> >  1 file changed, 45 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> > index 7fa18dfcb5a2..1ae382f009de 100644
> > --- a/drivers/gpu/drm/xe/xe_mmio.c
> > +++ b/drivers/gpu/drm/xe/xe_mmio.c
> > @@ -7,6 +7,8 @@
> >  
> >  #include <linux/delay.h>
> >  #include <linux/io-64-nonatomic-lo-hi.h>
> > +#include <linux/math.h>
> > +#include <linux/math64.h>
> >  #include <linux/minmax.h>
> >  #include <linux/pci.h>
> >  
> > @@ -320,6 +322,30 @@ u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)
> >  	return (u64)udw << 32 | ldw;
> >  }
> >  
> > +/**
> > + * __div_round_up64() - alternative to DIV_ROUND_UP for use by __xe_mmio_wait32
> > + * @dividend: 64 bit positive number to divide
> > + * @divisor: 64 bit positive divisor
> > + *
> > + * DIV_ROUND_UP() relies on plain '/' and '%' operators, which for 64-bit
> > + * operands on a 32-bit CPU get turned into calls to libgcc's __divdi3()/
> > + * __moddi3(), routines the kernel does not link against. Provide a
> > + * do_div()-based equivalent that works for signed 64-bit inputs on any
> > + * architecture.
> > + *
> > + * Returns: rounded up division result
> > + */
> > +static inline s64 __div_round_up64(s64 dividend, s64 divisor)
> > +{
> > +	u64 abs_dividend = abs(dividend);
> > +	u64 abs_divisor = abs(divisor);
> > +	u64 result = abs_dividend + abs_divisor - 1;
> > +
> > +	do_div(result, abs_divisor);
> > +	/* dont check for negative values as local caller only uses positive numbers */
> > +	return (s64)result;
> > +}
> > +
> >  static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
> >  			    u32 timeout_us, u32 *out_val, bool atomic, bool expect_match)
> >  {
> > @@ -349,11 +375,25 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
> >  		if (ktime_after(ktime_add_us(cur, wait), end))
> >  			wait = ktime_us_delta(end, cur);
> >  
> > -		if (atomic)
> > -			udelay(wait);
> > -		else
> > -			usleep_range(wait, wait << 1);
> > -		wait <<= 1;
> > +#define __XE_MMIO_WAIT_MAX_INLOOP_100MS (100 * USEC_PER_MSEC)
> > +		if (atomic) {
> > +			if (wait <= MAX_UDELAY_MS * USEC_PER_MSEC)
> > +				udelay(wait);
> > +			else if (BITS_PER_LONG == 32)
> > +				mdelay(DIV_ROUND_UP(wait, USEC_PER_MSEC));
> > +			else
> > +				mdelay(__div_round_up64(wait, USEC_PER_MSEC));
> > +		} else {
> > +			usleep_range(wait, wait + (wait >> 2)); /* range till wait + 25% */
> > +		}
> > +		/*
> > +		 * As we keep doubling the wait time for every check that fails, cap the
> > +		 * in-loop delay-or-sleep to less than 2x 100 milliseconds to prevent from
> > +		 * expanding 'wait' into exponentially longer wait times per loop that
> > +		 * end up delaying the next completion check way later than tolerable.
> > +		 */
> > +		wait = wait < __XE_MMIO_WAIT_MAX_INLOOP_100MS >> 1 ?
> > +		       wait << 1 : __XE_MMIO_WAIT_MAX_INLOOP_100MS;
> >  	}
> >  
> >  	if (ret != 0) {
> 

[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Alan Previn]

Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
and pick the correct helper according to the wait time and atomic.
Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
Avoid growing delays becoming intollerably large by capping the
in-loop wait time.

v4: - Simplify using poll_timeout_us and poll_timeout_us_atopmic and
      update all callstack to never use a param for atomic (Jani)
v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
v2: - Fixed checkpatch failure.
    - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
      review). Fixed bug max range in usleep_range(Shasiko review)

Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Assisted-by: Github-Copilot:Claude-Sonnet-5-0
---
 drivers/gpu/drm/xe/xe_device.c          |  10 +-
 drivers/gpu/drm/xe/xe_eu_stall.c        |   4 +-
 drivers/gpu/drm/xe/xe_force_wake.c      |   7 +-
 drivers/gpu/drm/xe/xe_gsc.c             |   2 +-
 drivers/gpu/drm/xe/xe_gsc_proxy.c       |   2 +-
 drivers/gpu/drm/xe/xe_gt.c              |   2 +-
 drivers/gpu/drm/xe/xe_gt_mcr.c          |   4 +-
 drivers/gpu/drm/xe/xe_guc.c             |  10 +-
 drivers/gpu/drm/xe/xe_huc.c             |   2 +-
 drivers/gpu/drm/xe/xe_mmio.c            | 118 ++++++++++--------------
 drivers/gpu/drm/xe/xe_mmio.h            |   8 +-
 drivers/gpu/drm/xe/xe_oa.c              |   4 +-
 drivers/gpu/drm/xe/xe_pcode.c           |   8 +-
 drivers/gpu/drm/xe/xe_pxp.c             |   2 +-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c |   4 +-
 drivers/gpu/drm/xe/xe_uc_fw.c           |   3 +-
 16 files changed, 90 insertions(+), 100 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 205cb4e7f9e8..8fb044331e62 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -573,7 +573,7 @@ static void __xe_driver_flr(struct xe_device *xe)
 	 * is still pending (unless the HW is totally dead), but better to be
 	 * safe in case something unexpected happens
 	 */
-	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
+	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL);
 	if (ret) {
 		drm_err(&xe->drm, "Driver-FLR-prepare wait for ready failed! %d\n", ret);
 		return;
@@ -584,7 +584,7 @@ static void __xe_driver_flr(struct xe_device *xe)
 	xe_mmio_rmw32(mmio, GU_CNTL, 0, DRIVERFLR);
 
 	/* Wait for hardware teardown to complete */
-	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
+	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL);
 	if (ret) {
 		drm_err(&xe->drm, "Driver-FLR-teardown wait completion failed! %d\n", ret);
 		return;
@@ -592,7 +592,7 @@ static void __xe_driver_flr(struct xe_device *xe)
 
 	/* Wait for hardware/firmware re-init to complete */
 	ret = xe_mmio_wait32(mmio, GU_DEBUG, DRIVERFLR_STATUS, DRIVERFLR_STATUS,
-			     flr_timeout, NULL, false);
+			     flr_timeout, NULL);
 	if (ret) {
 		drm_err(&xe->drm, "Driver-FLR-reinit wait completion failed! %d\n", ret);
 		return;
@@ -1168,7 +1168,7 @@ static void tdf_request_sync(struct xe_device *xe)
 		 * transient and need to be flushed..
 		 */
 		if (xe_mmio_wait32(&gt->mmio, XE2_TDF_CTRL, TRANSIENT_FLUSH_REQUEST, 0,
-				   300, NULL, false))
+					    300, NULL))
 			xe_gt_err_once(gt, "TD flush timeout\n");
 	}
 }
@@ -1214,7 +1214,7 @@ void xe_device_l2_flush(struct xe_device *xe, bool force)
 	spin_lock(&gt->global_invl_lock);
 
 	xe_mmio_write32(&gt->mmio, XE2_GLOBAL_INVAL, 0x1);
-	if (xe_mmio_wait32(&gt->mmio, XE2_GLOBAL_INVAL, 0x1, 0x0, 1000, NULL, true))
+	if (xe_mmio_wait32_atomic(&gt->mmio, XE2_GLOBAL_INVAL, 0x1, 0x0, 1000, NULL))
 		xe_gt_err_once(gt, "Global invalidation timeout\n");
 
 	spin_unlock(&gt->global_invl_lock);
diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
index 8a7c1b5d5ab9..865e08b75c29 100644
--- a/drivers/gpu/drm/xe/xe_eu_stall.c
+++ b/drivers/gpu/drm/xe/xe_eu_stall.c
@@ -707,7 +707,7 @@ static int xe_eu_stall_stream_enable(struct xe_eu_stall_data_stream *stream)
 		/* Request the firmware to apply the workaround and wait for an ACK */
 		xe_mmio_write32(&gt->mmio, SWF_SCRATCHPAD(0), REQ_EUSTALL_ENABLE);
 		ret = xe_mmio_wait32(&gt->mmio, SWF_SCRATCHPAD(0), SWF_EUSTALL_MASK,
-				     ACK_EUSTALL_ENABLE, FW_WA_WAIT_TIMEOUT_US, NULL, false);
+					     ACK_EUSTALL_ENABLE, FW_WA_WAIT_TIMEOUT_US, NULL);
 		if (ret) {
 			xe_gt_err(gt, "Timeout polling for EU stall enable ACK from firmware\n");
 			xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);
@@ -880,7 +880,7 @@ static int xe_eu_stall_disable_locked(struct xe_eu_stall_data_stream *stream)
 		/* Request the firmware to revert the workaround and wait for an ACK */
 		xe_mmio_write32(&gt->mmio, SWF_SCRATCHPAD(0), REQ_EUSTALL_DISABLE);
 		ret = xe_mmio_wait32(&gt->mmio, SWF_SCRATCHPAD(0), SWF_EUSTALL_MASK,
-				     ACK_EUSTALL_DISABLE, FW_WA_WAIT_TIMEOUT_US, NULL, false);
+					     ACK_EUSTALL_DISABLE, FW_WA_WAIT_TIMEOUT_US, NULL);
 		if (ret)
 			xe_gt_err(gt, "Timeout polling for EU stall disable ACK from firmware\n");
 	}
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..12ab0304509c 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -109,9 +109,10 @@ static int __domain_wait(struct xe_gt *gt, struct xe_force_wake_domain *domain,
 	if (IS_SRIOV_VF(gt_to_xe(gt)))
 		return 0;
 
-	ret = xe_mmio_wait32(&gt->mmio, domain->reg_ack, domain->val, wake ? domain->val : 0,
-			     XE_FORCE_WAKE_ACK_TIMEOUT_MS * USEC_PER_MSEC,
-			     &value, true);
+	ret = xe_mmio_wait32_atomic(&gt->mmio, domain->reg_ack, domain->val,
+				    wake ? domain->val : 0,
+				    XE_FORCE_WAKE_ACK_TIMEOUT_MS * USEC_PER_MSEC,
+				    &value);
 	if (ret)
 		xe_gt_err(gt, "Force wake domain %d failed to ack %s (%pe) reg[%#x] = %#x\n",
 			  domain->id, str_wake_sleep(wake), ERR_PTR(ret),
diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index 524ac56bdcc7..a43d3739d213 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -196,7 +196,7 @@ static int gsc_fw_wait(struct xe_gt *gt)
 	return xe_mmio_wait32(&gt->mmio, HECI_FWSTS1(MTL_GSC_HECI1_BASE),
 			      HECI1_FWSTS1_INIT_COMPLETE,
 			      HECI1_FWSTS1_INIT_COMPLETE,
-			      500 * USEC_PER_MSEC, NULL, false);
+			   500 * USEC_PER_MSEC, NULL);
 }
 
 static int gsc_upload(struct xe_gsc *gsc)
diff --git a/drivers/gpu/drm/xe/xe_gsc_proxy.c b/drivers/gpu/drm/xe/xe_gsc_proxy.c
index 707db650a2ae..63f72ca28ed4 100644
--- a/drivers/gpu/drm/xe/xe_gsc_proxy.c
+++ b/drivers/gpu/drm/xe/xe_gsc_proxy.c
@@ -80,7 +80,7 @@ int xe_gsc_wait_for_proxy_init_done(struct xe_gsc *gsc)
 	return xe_mmio_wait32(&gt->mmio, HECI_FWSTS1(MTL_GSC_HECI1_BASE),
 			      HECI1_FWSTS1_CURRENT_STATE,
 			      HECI1_FWSTS1_PROXY_STATE_NORMAL,
-			      USEC_PER_SEC, NULL, false);
+			   USEC_PER_SEC, NULL);
 }
 
 static void __gsc_proxy_irq_rmw(struct xe_gsc *gsc, u32 clr, u32 set)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 775c826b68b4..9edcc54ad4bf 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -832,7 +832,7 @@ static int do_gt_reset(struct xe_gt *gt)
 	xe_mmio_write32(&gt->mmio, GDRST, GRDOM_FULL);
 	err = xe_mmio_wait32(&gt->mmio, GDRST, GRDOM_FULL, 0,
 			     GRDOM_RESET_TIMEOUT_MS * USEC_PER_MSEC,
-			     NULL, false);
+			   NULL);
 	if (err)
 		xe_log_err(gt, GT, err,
 			   "full graphics reset not completed in %u ms\n",
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index 1949bf7d370a..a08585f082d3 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -711,8 +711,8 @@ static void mcr_lock(struct xe_gt *gt) __acquires(&gt->mcr_lock)
 	 * when a read to the relevant register returns 1.
 	 */
 	if (GRAPHICS_VERx100(xe) >= 1270)
-		ret = xe_mmio_wait32(&gt->mmio, STEER_SEMAPHORE, 0x1, 0x1, 10, NULL,
-				     true);
+		ret = xe_mmio_wait32_atomic(&gt->mmio, STEER_SEMAPHORE, 0x1, 0x1, 10,
+					    NULL);
 
 	xe_gt_WARN_ON_ONCE(gt, ret == -ETIMEDOUT);
 }
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index c7f8bbd4cb92..670140e1aa36 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -967,13 +967,13 @@ static void guc_prevent_fw_dma_failure_on_reset(struct xe_guc *guc)
 
 	ret = xe_mmio_wait32(&gt->mmio, GUC_STATUS, GS_UKERNEL_MASK,
 			     FIELD_PREP(GS_UKERNEL_MASK, XE_GUC_LOAD_STATUS_READY),
-			     100000, &guc_status, false);
+				      100000, &guc_status);
 	if (ret)
 		xe_gt_warn(gt, "GuC not ready after disabling idle flow (GUC_STATUS: 0x%x)\n",
 			   guc_status);
 
 	ret = xe_mmio_wait32(&gt->mmio, GUC_SRAM_STATUS, GUC_SRAM_HANDLING_MASK,
-			     0, 5000, &sram_status, false);
+				      0, 5000, &sram_status);
 	if (ret)
 		xe_gt_warn(gt, "SRAM handling not complete (GUC_SRAM_STATUS: 0x%x)\n",
 			   sram_status);
@@ -996,7 +996,7 @@ int xe_guc_reset(struct xe_guc *guc)
 
 	xe_mmio_write32(mmio, GDRST, GRDOM_GUC);
 
-	ret = xe_mmio_wait32(mmio, GDRST, GRDOM_GUC, 0, 5000, &gdrst, false);
+	ret = xe_mmio_wait32(mmio, GDRST, GRDOM_GUC, 0, 5000, &gdrst);
 	if (ret) {
 		xe_gt_err(gt, "GuC reset timed out, GDRST=%#x\n", gdrst);
 		goto err_out;
@@ -1538,7 +1538,7 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request,
 
 	ret = xe_mmio_wait32(mmio, reply_reg, GUC_HXG_MSG_0_ORIGIN,
 			     FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_GUC),
-			     50000, &header, false);
+				     50000, &header);
 	if (ret) {
 		/* scratch registers might be cleared during FLR, try once more */
 		if (!header) {
@@ -1574,7 +1574,7 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request,
 		BUILD_BUG_ON((GUC_HXG_TYPE_RESPONSE_SUCCESS ^ GUC_HXG_TYPE_RESPONSE_FAILURE) != 1);
 
 		ret = xe_mmio_wait32(mmio, reply_reg, resp_mask, resp_mask,
-				     2000000, &header, false);
+					     2000000, &header);
 
 		if (unlikely(FIELD_GET(GUC_HXG_MSG_0_ORIGIN, header) !=
 			     GUC_HXG_ORIGIN_GUC))
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..3517bba09399 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -272,7 +272,7 @@ int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type)
 	}
 
 	ret = xe_mmio_wait32(&gt->mmio, huc_auth_modes[type].reg, huc_auth_modes[type].val,
-			     huc_auth_modes[type].val, 100000, NULL, false);
+			     huc_auth_modes[type].val, 100000, NULL);
 	if (ret) {
 		xe_gt_err(gt, "HuC: firmware not verified: %pe\n", ERR_PTR(ret));
 		goto fail;
diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7fa18dfcb5a2..fc0509aa384b 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -5,8 +5,8 @@
 
 #include "xe_mmio.h"
 
-#include <linux/delay.h>
 #include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/iopoll.h>
 #include <linux/minmax.h>
 #include <linux/pci.h>
 
@@ -320,82 +320,44 @@ u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)
 	return (u64)udw << 32 | ldw;
 }
 
-static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
-			    u32 timeout_us, u32 *out_val, bool atomic, bool expect_match)
-{
-	ktime_t cur = ktime_get_raw();
-	const ktime_t end = ktime_add_us(cur, timeout_us);
-	int ret = -ETIMEDOUT;
-	s64 wait = 10;
-	u32 read;
-	bool check;
-
-	for (;;) {
-		read = xe_mmio_read32(mmio, reg);
-
-		check = (read & mask) == val;
-		if (!expect_match)
-			check = !check;
-
-		if (check) {
-			ret = 0;
-			break;
-		}
-
-		cur = ktime_get_raw();
-		if (!ktime_before(cur, end))
-			break;
-
-		if (ktime_after(ktime_add_us(cur, wait), end))
-			wait = ktime_us_delta(end, cur);
-
-		if (atomic)
-			udelay(wait);
-		else
-			usleep_range(wait, wait << 1);
-		wait <<= 1;
-	}
-
-	if (ret != 0) {
-		read = xe_mmio_read32(mmio, reg);
-
-		check = (read & mask) == val;
-		if (!expect_match)
-			check = !check;
-
-		if (check)
-			ret = 0;
-	}
-
-	if (out_val)
-		*out_val = read;
-
-	return ret;
-}
-
 /**
  * xe_mmio_wait32() - Wait for a register to match the desired masked value
  * @mmio: MMIO target
  * @reg: register to read value from
  * @mask: mask to be applied to the value read from the register
  * @val: desired value after applying the mask
- * @timeout_us: time out after this period of time. Wait logic tries to be
- * smart, applying an exponential backoff until @timeout_us is reached.
+ * @timeout_us: time out after this period of time
  * @out_val: if not NULL, points where to store the last unmasked value
- * @atomic: needs to be true if calling from an atomic context
  *
  * This function polls for the desired masked value and returns zero on success
  * or -ETIMEDOUT if timed out.
- *
- * Note that @timeout_us represents the minimum amount of time to wait before
- * giving up. The actual time taken by this function can be a little more than
- * @timeout_us for different reasons, specially in non-atomic contexts. Thus,
- * it is possible that this function succeeds even after @timeout_us has passed.
  */
 int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
-		   u32 *out_val, bool atomic)
+		   u32 *out_val)
 {
-	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
+	u32 read;
+	int ret;
+
+	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
+			      10, timeout_us, false);
+	if (out_val)
+		*out_val = read;
+
+	return ret;
+}
+
+int xe_mmio_wait32_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
+			  u32 timeout_us, u32 *out_val)
+{
+	u32 read;
+	int ret;
+
+	ret = poll_timeout_us_atomic(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
+				     10, timeout_us, false);
+	if (out_val)
+		*out_val = read;
+
+	return ret;
 }
 
 /**
@@ -406,15 +368,35 @@ int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u
  * @val: value not to be matched after applying the mask
  * @timeout_us: time out after this period of time
  * @out_val: if not NULL, points where to store the last unmasked value
- * @atomic: needs to be true if calling from an atomic context
- *
  * This function works exactly like xe_mmio_wait32() with the exception that
  * @val is expected not to be matched.
  */
 int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
-		       u32 *out_val, bool atomic)
+		       u32 *out_val)
 {
-	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, false);
+	u32 read;
+	int ret;
+
+	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) != val,
+			      10, timeout_us, false);
+	if (out_val)
+		*out_val = read;
+
+	return ret;
+}
+
+int xe_mmio_wait32_not_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
+			      u32 timeout_us, u32 *out_val)
+{
+	u32 read;
+	int ret;
+
+	ret = poll_timeout_us_atomic(read = xe_mmio_read32(mmio, reg), (read & mask) != val,
+				     10, timeout_us, false);
+	if (out_val)
+		*out_val = read;
+
+	return ret;
 }
 
 #ifdef CONFIG_PCI_IOV
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
index befe021f2215..6391f0fd6507 100644
--- a/drivers/gpu/drm/xe/xe_mmio.h
+++ b/drivers/gpu/drm/xe/xe_mmio.h
@@ -27,9 +27,13 @@ bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *ra
 
 u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
 int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
-		   u32 timeout_us, u32 *out_val, bool atomic);
+		   u32 timeout_us, u32 *out_val);
+int xe_mmio_wait32_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
+			  u32 timeout_us, u32 *out_val);
 int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
-		       u32 val, u32 timeout_us, u32 *out_val, bool atomic);
+		       u32 val, u32 timeout_us, u32 *out_val);
+int xe_mmio_wait32_not_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
+			      u32 val, u32 timeout_us, u32 *out_val);
 
 static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)
 {
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index a3484e943c55..98a6f57701e4 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -513,14 +513,14 @@ static void xe_oa_disable(struct xe_oa_stream *stream)
 
 	xe_mmio_rmw32(mmio, __oa_regs(stream)->oa_ctrl, __oactrl_used_bits(stream), 0);
 	if (xe_mmio_wait32(mmio, __oa_regs(stream)->oa_ctrl,
-			   OAG_OACONTROL_OA_COUNTER_ENABLE, 0, 50000, NULL, false))
+			   OAG_OACONTROL_OA_COUNTER_ENABLE, 0, 50000, NULL))
 		drm_err(&stream->oa->xe->drm,
 			"wait for OA to be disabled timed out\n");
 
 	if (GRAPHICS_VERx100(stream->oa->xe) <= 1270 && GRAPHICS_VERx100(stream->oa->xe) != 1260) {
 		/* <= XE_METEORLAKE except XE_PVC */
 		xe_mmio_write32(mmio, OA_TLB_INV_CR, 1);
-		if (xe_mmio_wait32(mmio, OA_TLB_INV_CR, 1, 0, 50000, NULL, false))
+		if (xe_mmio_wait32(mmio, OA_TLB_INV_CR, 1, 0, 50000, NULL))
 			drm_err(&stream->oa->xe->drm,
 				"wait for OA tlb invalidate timed out\n");
 	}
diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c
index 266deecbb100..9b3487c8b07a 100644
--- a/drivers/gpu/drm/xe/xe_pcode.c
+++ b/drivers/gpu/drm/xe/xe_pcode.c
@@ -87,8 +87,12 @@ static int __pcode_mailbox_rw(struct xe_tile *tile, u32 mbox, u32 *data0, u32 *d
 	xe_mmio_write32(mmio, PCODE_DATA1, data1 ? *data1 : 0);
 	xe_mmio_write32(mmio, PCODE_MAILBOX, PCODE_READY | mbox);
 
-	err = xe_mmio_wait32(mmio, PCODE_MAILBOX, PCODE_READY, 0,
-			     timeout_ms * USEC_PER_MSEC, NULL, atomic);
+	if (atomic)
+		err = xe_mmio_wait32_atomic(mmio, PCODE_MAILBOX, PCODE_READY, 0,
+					    timeout_ms * USEC_PER_MSEC, NULL);
+	else
+		err = xe_mmio_wait32(mmio, PCODE_MAILBOX, PCODE_READY, 0,
+				     timeout_ms * USEC_PER_MSEC, NULL);
 	if (err)
 		return err;
 
diff --git a/drivers/gpu/drm/xe/xe_pxp.c b/drivers/gpu/drm/xe/xe_pxp.c
index 2fef274a585e..d6b820c47c09 100644
--- a/drivers/gpu/drm/xe/xe_pxp.c
+++ b/drivers/gpu/drm/xe/xe_pxp.c
@@ -136,7 +136,7 @@ static int pxp_wait_for_session_state(struct xe_pxp *pxp, u32 id, bool in_play)
 	u32 mask = BIT(id);
 
 	return xe_mmio_wait32(&gt->mmio, KCR_SIP, mask, in_play ? mask : 0,
-			      250, NULL, false);
+			   250, NULL);
 }
 
 static void pxp_invalidate_queues(struct xe_pxp *pxp);
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
index 72baf1aa4b3a..269ec70aa22a 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
@@ -40,7 +40,7 @@ static bool sysctrl_wait_bit_clear(struct xe_sysctrl *sc, u32 bit_mask,
 	int ret;
 
 	ret = xe_mmio_wait32_not(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask,
-				 timeout_ms * 1000, NULL, false);
+				   timeout_ms * 1000, NULL);
 
 	return ret == 0;
 }
@@ -51,7 +51,7 @@ static bool sysctrl_wait_bit_set(struct xe_sysctrl *sc, u32 bit_mask,
 	int ret;
 
 	ret = xe_mmio_wait32(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask,
-			     timeout_ms * 1000, NULL, false);
+			     timeout_ms * 1000, NULL);
 
 	return ret == 0;
 }
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index e29878b255ba..8fa8a02f73bc 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -899,8 +899,7 @@ static int uc_fw_xfer(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags)
 			REG_MASKED_FIELD_ENABLE(dma_flags | START_DMA));
 
 	/* Wait for DMA to finish */
-	ret = xe_mmio_wait32(mmio, DMA_CTRL, START_DMA, 0, 100000, &dma_ctrl,
-			     false);
+	ret = xe_mmio_wait32(mmio, DMA_CTRL, START_DMA, 0, 100000, &dma_ctrl);
 	if (ret)
 		drm_err(&xe->drm, "DMA for %s fw failed, DMA_CTRL=%u\n",
 			xe_uc_fw_type_repr(uc_fw->type), dma_ctrl);
-- 
2.43.0

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] mmio: fixed 10us delay in long waits causes hrtimer/context switch storms
--

commit c92012bfe0677557677a0dcb08c9a338f44452fd
Author: Alan Previn <alan.previn.teres.alexis@intel.com>
Subject: drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

This commit replaces the custom wait implementation in the driver with the
standard poll_timeout_us and poll_timeout_us_atomic macros. It drops the
atomic flag from xe_mmio_wait32 parameters, updating callers and adding
explicit _atomic variants where needed.

> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
[ ... ]
> @@ -1574,7 +1574,7 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request,
>  		BUILD_BUG_ON((GUC_HXG_TYPE_RESPONSE_SUCCESS ^ GUC_HXG_TYPE_RESPONSE_FAILURE) != 1);
>  
>  		ret = xe_mmio_wait32(mmio, reply_reg, resp_mask, resp_mask,
> -				     2000000, &header, false);
> +					     2000000, &header);

[Severity: High]
Does this change cause an excessive number of hrtimers or context switches
for long waits?

For example, in xe_guc_mmio_send_recv(), the 2,000,000us timeout here could
result in ~200,000 sleep/wake cycles if the hardware is slow or hits the
timeout. The previous custom wait implementation used an exponential backoff to
handle these long wait periods without flooding the system.

[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
[ ... ]
>  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> -		   u32 *out_val, bool atomic)
> +		   u32 *out_val)
>  {
> -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
> +	u32 read;
> +	int ret;
> +
> +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> +			      10, timeout_us, false);

[Severity: High]
Will hardcoding a 10us sleep interval here cause context switch storms and
PCIe bus flooding during long operations?

Certain callers like __xe_driver_flr() wait up to 3 seconds, and
xe_gsc_wait_for_proxy_init_done() waits up to 1 second. Using a fixed 10us
interval means those paths might invoke usleep_range() tens of thousands of
times if the full timeout is reached.

Could this degrade system performance, and does it warrant re-introducing
an exponential backoff scaling for longer wait periods instead of a fixed
interval?

> +	if (out_val)
> +		*out_val = read;
> +
> +	return ret;
>  }
[ ... ]
>  int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> -		       u32 *out_val, bool atomic)
> +		       u32 *out_val)
>  {
> -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, false);
> +	u32 read;
> +	int ret;
> +
> +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) != val,
> +			      10, timeout_us, false);

[Severity: High]
Similar to xe_mmio_wait32() above, does applying a fixed 10us sleep interval
in xe_mmio_wait32_not() risk hrtimer storms for callers with large timeouts?

> +	if (out_val)
> +		*out_val = read;
> +
> +	return ret;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260914215746.272721-2-alan.previn.teres.alexis@intel.com?part=1

✓ CI.KUnit: success for drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums (rev4)

[Patchwork]

== Series Details ==

Series: drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums (rev4)
URL   : https://patchwork.freedesktop.org/series/173538/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[22:38:42] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:38:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:39:07] Starting KUnit Kernel (1/1)...
[22:39:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:39:07] ============= refcount_interrupt (4 subtests) ==============
[22:39:07] [PASSED] test_single_irq_change
[22:39:07] [PASSED] test_nested_irq_change
[22:39:07] [PASSED] test_multiple_irq_change
[22:39:07] [PASSED] test_irq_save
[22:39:07] =============== [PASSED] refcount_interrupt ================
[22:39:07] ================= gpu_buddy (14 subtests) ==================
[22:39:07] [PASSED] gpu_test_buddy_alloc_limit
[22:39:07] [PASSED] gpu_test_buddy_alloc_optimistic
[22:39:07] [PASSED] gpu_test_buddy_alloc_pessimistic
[22:39:07] [PASSED] gpu_test_buddy_alloc_pathological
[22:39:07] [PASSED] gpu_test_buddy_alloc_contiguous
[22:39:07] [PASSED] gpu_test_buddy_alloc_clear
[22:39:07] [PASSED] gpu_test_buddy_alloc_range
[22:39:07] [PASSED] gpu_test_buddy_alloc_range_bias
[22:39:08] [PASSED] gpu_test_buddy_fragmentation_performance
[22:39:08] [PASSED] gpu_test_buddy_dirty_tracker_performance
[22:39:08] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[22:39:08] [PASSED] gpu_test_buddy_offset_aligned_allocation
[22:39:08] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[22:39:08] [PASSED] gpu_test_buddy_addr_to_block
[22:39:08] ==================== [PASSED] gpu_buddy ====================
[22:39:08] ============================================================
[22:39:08] Testing complete. Ran 18 tests: passed: 18
[22:39:09] Elapsed time: 26.539s total, 4.369s configuring, 20.203s building, 1.892s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:39:09] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:39:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:39:44] Starting KUnit Kernel (1/1)...
[22:39:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:39:44] ============= refcount_interrupt (4 subtests) ==============
[22:39:44] [PASSED] test_single_irq_change
[22:39:44] [PASSED] test_nested_irq_change
[22:39:44] [PASSED] test_multiple_irq_change
[22:39:44] [PASSED] test_irq_save
[22:39:44] =============== [PASSED] refcount_interrupt ================
[22:39:44] ================== guc_buf (11 subtests) ===================
[22:39:44] [PASSED] test_smallest
[22:39:44] [PASSED] test_largest
[22:39:44] [PASSED] test_granular
[22:39:44] [PASSED] test_unique
[22:39:44] [PASSED] test_overlap
[22:39:44] [PASSED] test_reusable
[22:39:44] [PASSED] test_too_big
[22:39:44] [PASSED] test_flush
[22:39:44] [PASSED] test_lookup
[22:39:44] [PASSED] test_data
[22:39:44] [PASSED] test_class
[22:39:44] ===================== [PASSED] guc_buf =====================
[22:39:44] =================== guc_dbm (7 subtests) ===================
[22:39:44] [PASSED] test_empty
[22:39:44] [PASSED] test_default
[22:39:44] ======================== test_size  ========================
[22:39:44] [PASSED] 4
[22:39:44] [PASSED] 8
[22:39:44] [PASSED] 32
[22:39:44] [PASSED] 256
[22:39:44] ==================== [PASSED] test_size ====================
[22:39:44] ======================= test_reuse  ========================
[22:39:44] [PASSED] 4
[22:39:44] [PASSED] 8
[22:39:44] [PASSED] 32
[22:39:44] [PASSED] 256
[22:39:44] =================== [PASSED] test_reuse ====================
[22:39:44] =================== test_range_overlap  ====================
[22:39:44] [PASSED] 4
[22:39:44] [PASSED] 8
[22:39:44] [PASSED] 32
[22:39:44] [PASSED] 256
[22:39:44] =============== [PASSED] test_range_overlap ================
[22:39:44] =================== test_range_compact  ====================
[22:39:44] [PASSED] 4
[22:39:44] [PASSED] 8
[22:39:44] [PASSED] 32
[22:39:44] [PASSED] 256
[22:39:44] =============== [PASSED] test_range_compact ================
[22:39:44] ==================== test_range_spare  =====================
[22:39:44] [PASSED] 4
[22:39:44] [PASSED] 8
[22:39:44] [PASSED] 32
[22:39:44] [PASSED] 256
[22:39:44] ================ [PASSED] test_range_spare =================
[22:39:44] ===================== [PASSED] guc_dbm =====================
[22:39:44] =================== guc_idm (6 subtests) ===================
[22:39:44] [PASSED] bad_init
[22:39:44] [PASSED] no_init
[22:39:44] [PASSED] init_fini
[22:39:44] [PASSED] check_used
[22:39:44] [PASSED] check_quota
[22:39:44] [PASSED] check_all
[22:39:44] ===================== [PASSED] guc_idm =====================
[22:39:44] =============== guc_klv_helpers (9 subtests) ===============
[22:39:44] [PASSED] test_count
[22:39:44] [PASSED] test_encode_u32
[22:39:44] [PASSED] test_encode_u64
[22:39:44] [PASSED] test_encode_string
[22:39:44] [PASSED] test_encode_object_raw
[22:39:44] [PASSED] test_encode_object_klv
[22:39:44] [PASSED] test_encode_object_nested
[22:39:44] [PASSED] test_encode_object_basic
[22:39:44] [PASSED] test_print
[22:39:44] ================= [PASSED] guc_klv_helpers =================
[22:39:44] =================== xe_log (4 subtests) ====================
[22:39:44] [PASSED] demo_cper
[22:39:44] [PASSED] demo_dmesg
[22:39:44] ======================= test_dmesg  ========================
[22:39:44] [PASSED] test_fatal
[22:39:44] [PASSED] test_fatal_tile
[22:39:44] [PASSED] test_fatal_gt
[22:39:44] [PASSED] test_fatal_comp
[22:39:44] [PASSED] test_fatal_comp_tile
[22:39:44] [PASSED] test_fatal_comp_gt
[22:39:44] [PASSED] test_fatal_all
[22:39:44] [PASSED] test_recoverable
[22:39:44] [PASSED] test_recoverable_tile
[22:39:44] [PASSED] test_recoverable_gt
[22:39:44] [PASSED] test_recoverable_comp
[22:39:44] [PASSED] test_recoverable_comp_tile
[22:39:44] [PASSED] test_recoverable_comp_gt
[22:39:44] [PASSED] test_recoverable_all
[22:39:44] [PASSED] test_info
[22:39:44] [PASSED] test_info_tile
[22:39:44] [PASSED] test_info_gt
[22:39:44] [PASSED] test_info_err
[22:39:44] [PASSED] test_info_comp
[22:39:44] [PASSED] test_info_comp_tile
[22:39:44] [PASSED] test_info_comp_gt
[22:39:44] [PASSED] test_info_all
[22:39:44] [PASSED] test_hw_fatal
[22:39:44] [PASSED] test_hw_recoverable
[22:39:44] [PASSED] test_hw_corrected
[22:39:44] [PASSED] test_hw_informational
[22:39:44] =================== [PASSED] test_dmesg ====================
[22:39:44] ====================== test_invalid  =======================
[22:39:44] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[22:39:44] ================== [SKIPPED] test_invalid ==================
[22:39:44] ===================== [PASSED] xe_log ======================
[22:39:44] ================== no_relay (3 subtests) ===================
[22:39:44] [PASSED] xe_drops_guc2pf_if_not_ready
[22:39:44] [PASSED] xe_drops_guc2vf_if_not_ready
[22:39:44] [PASSED] xe_rejects_send_if_not_ready
[22:39:44] ==================== [PASSED] no_relay =====================
[22:39:44] ================== pf_relay (14 subtests) ==================
[22:39:44] [PASSED] pf_rejects_guc2pf_too_short
[22:39:44] [PASSED] pf_rejects_guc2pf_too_long
[22:39:44] [PASSED] pf_rejects_guc2pf_no_payload
[22:39:44] [PASSED] pf_fails_no_payload
[22:39:44] [PASSED] pf_fails_bad_origin
[22:39:44] [PASSED] pf_fails_bad_type
[22:39:44] [PASSED] pf_txn_reports_error
[22:39:44] [PASSED] pf_txn_sends_pf2guc
[22:39:44] [PASSED] pf_sends_pf2guc
[22:39:44] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:39:44] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:39:44] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:39:44] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:39:44] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:39:44] ==================== [PASSED] pf_relay =====================
[22:39:44] ================== vf_relay (3 subtests) ===================
[22:39:44] [PASSED] vf_rejects_guc2vf_too_short
[22:39:44] [PASSED] vf_rejects_guc2vf_too_long
[22:39:44] [PASSED] vf_rejects_guc2vf_no_payload
[22:39:44] ==================== [PASSED] vf_relay =====================
[22:39:44] ================ pf_gt_config (9 subtests) =================
[22:39:44] [PASSED] fair_contexts_1vf
[22:39:44] [PASSED] fair_doorbells_1vf
[22:39:44] [PASSED] fair_ggtt_1vf
[22:39:44] ====================== fair_vram_1vf  ======================
[22:39:44] [PASSED] 3.50 GiB
[22:39:44] [PASSED] 11.5 GiB
[22:39:44] [PASSED] 15.5 GiB
[22:39:44] [PASSED] 31.5 GiB
[22:39:44] [PASSED] 63.5 GiB
[22:39:44] [PASSED] 1.91 GiB
[22:39:44] ================== [PASSED] fair_vram_1vf ==================
[22:39:44] ================ fair_vram_1vf_admin_only  =================
[22:39:44] [PASSED] 3.50 GiB
[22:39:44] [PASSED] 11.5 GiB
[22:39:44] [PASSED] 15.5 GiB
[22:39:44] [PASSED] 31.5 GiB
[22:39:44] [PASSED] 63.5 GiB
[22:39:44] [PASSED] 1.91 GiB
[22:39:44] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:39:44] ====================== fair_contexts  ======================
[22:39:44] [PASSED] 1 VF
[22:39:44] [PASSED] 2 VFs
[22:39:44] [PASSED] 3 VFs
[22:39:44] [PASSED] 4 VFs
[22:39:44] [PASSED] 5 VFs
[22:39:44] [PASSED] 6 VFs
[22:39:44] [PASSED] 7 VFs
[22:39:44] [PASSED] 8 VFs
[22:39:44] [PASSED] 9 VFs
[22:39:44] [PASSED] 10 VFs
[22:39:44] [PASSED] 11 VFs
[22:39:44] [PASSED] 12 VFs
[22:39:44] [PASSED] 13 VFs
[22:39:44] [PASSED] 14 VFs
[22:39:44] [PASSED] 15 VFs
[22:39:44] [PASSED] 16 VFs
[22:39:44] [PASSED] 17 VFs
[22:39:44] [PASSED] 18 VFs
[22:39:44] [PASSED] 19 VFs
[22:39:44] [PASSED] 20 VFs
[22:39:44] [PASSED] 21 VFs
[22:39:44] [PASSED] 22 VFs
[22:39:44] [PASSED] 23 VFs
[22:39:44] [PASSED] 24 VFs
[22:39:44] [PASSED] 25 VFs
[22:39:44] [PASSED] 26 VFs
[22:39:44] [PASSED] 27 VFs
[22:39:44] [PASSED] 28 VFs
[22:39:44] [PASSED] 29 VFs
[22:39:44] [PASSED] 30 VFs
[22:39:44] [PASSED] 31 VFs
[22:39:44] [PASSED] 32 VFs
[22:39:44] [PASSED] 33 VFs
[22:39:44] [PASSED] 34 VFs
[22:39:44] [PASSED] 35 VFs
[22:39:44] [PASSED] 36 VFs
[22:39:44] [PASSED] 37 VFs
[22:39:44] [PASSED] 38 VFs
[22:39:44] [PASSED] 39 VFs
[22:39:44] [PASSED] 40 VFs
[22:39:44] [PASSED] 41 VFs
[22:39:44] [PASSED] 42 VFs
[22:39:44] [PASSED] 43 VFs
[22:39:44] [PASSED] 44 VFs
[22:39:44] [PASSED] 45 VFs
[22:39:44] [PASSED] 46 VFs
[22:39:44] [PASSED] 47 VFs
[22:39:44] [PASSED] 48 VFs
[22:39:44] [PASSED] 49 VFs
[22:39:44] [PASSED] 50 VFs
[22:39:44] [PASSED] 51 VFs
[22:39:44] [PASSED] 52 VFs
[22:39:44] [PASSED] 53 VFs
[22:39:44] [PASSED] 54 VFs
[22:39:44] [PASSED] 55 VFs
[22:39:44] [PASSED] 56 VFs
[22:39:44] [PASSED] 57 VFs
[22:39:44] [PASSED] 58 VFs
[22:39:44] [PASSED] 59 VFs
[22:39:44] [PASSED] 60 VFs
[22:39:44] [PASSED] 61 VFs
[22:39:44] [PASSED] 62 VFs
[22:39:44] [PASSED] 63 VFs
[22:39:44] ================== [PASSED] fair_contexts ==================
[22:39:44] ===================== fair_doorbells  ======================
[22:39:44] [PASSED] 1 VF
[22:39:44] [PASSED] 2 VFs
[22:39:44] [PASSED] 3 VFs
[22:39:44] [PASSED] 4 VFs
[22:39:44] [PASSED] 5 VFs
[22:39:44] [PASSED] 6 VFs
[22:39:44] [PASSED] 7 VFs
[22:39:44] [PASSED] 8 VFs
[22:39:44] [PASSED] 9 VFs
[22:39:44] [PASSED] 10 VFs
[22:39:44] [PASSED] 11 VFs
[22:39:44] [PASSED] 12 VFs
[22:39:44] [PASSED] 13 VFs
[22:39:44] [PASSED] 14 VFs
[22:39:44] [PASSED] 15 VFs
[22:39:44] [PASSED] 16 VFs
[22:39:44] [PASSED] 17 VFs
[22:39:44] [PASSED] 18 VFs
[22:39:44] [PASSED] 19 VFs
[22:39:44] [PASSED] 20 VFs
[22:39:44] [PASSED] 21 VFs
[22:39:44] [PASSED] 22 VFs
[22:39:44] [PASSED] 23 VFs
[22:39:44] [PASSED] 24 VFs
[22:39:44] [PASSED] 25 VFs
[22:39:44] [PASSED] 26 VFs
[22:39:45] [PASSED] 27 VFs
[22:39:45] [PASSED] 28 VFs
[22:39:45] [PASSED] 29 VFs
[22:39:45] [PASSED] 30 VFs
[22:39:45] [PASSED] 31 VFs
[22:39:45] [PASSED] 32 VFs
[22:39:45] [PASSED] 33 VFs
[22:39:45] [PASSED] 34 VFs
[22:39:45] [PASSED] 35 VFs
[22:39:45] [PASSED] 36 VFs
[22:39:45] [PASSED] 37 VFs
[22:39:45] [PASSED] 38 VFs
[22:39:45] [PASSED] 39 VFs
[22:39:45] [PASSED] 40 VFs
[22:39:45] [PASSED] 41 VFs
[22:39:45] [PASSED] 42 VFs
[22:39:45] [PASSED] 43 VFs
[22:39:45] [PASSED] 44 VFs
[22:39:45] [PASSED] 45 VFs
[22:39:45] [PASSED] 46 VFs
[22:39:45] [PASSED] 47 VFs
[22:39:45] [PASSED] 48 VFs
[22:39:45] [PASSED] 49 VFs
[22:39:45] [PASSED] 50 VFs
[22:39:45] [PASSED] 51 VFs
[22:39:45] [PASSED] 52 VFs
[22:39:45] [PASSED] 53 VFs
[22:39:45] [PASSED] 54 VFs
[22:39:45] [PASSED] 55 VFs
[22:39:45] [PASSED] 56 VFs
[22:39:45] [PASSED] 57 VFs
[22:39:45] [PASSED] 58 VFs
[22:39:45] [PASSED] 59 VFs
[22:39:45] [PASSED] 60 VFs
[22:39:45] [PASSED] 61 VFs
[22:39:45] [PASSED] 62 VFs
[22:39:45] [PASSED] 63 VFs
[22:39:45] ================= [PASSED] fair_doorbells ==================
[22:39:45] ======================== fair_ggtt  ========================
[22:39:45] [PASSED] 1 VF
[22:39:45] [PASSED] 2 VFs
[22:39:45] [PASSED] 3 VFs
[22:39:45] [PASSED] 4 VFs
[22:39:45] [PASSED] 5 VFs
[22:39:45] [PASSED] 6 VFs
[22:39:45] [PASSED] 7 VFs
[22:39:45] [PASSED] 8 VFs
[22:39:45] [PASSED] 9 VFs
[22:39:45] [PASSED] 10 VFs
[22:39:45] [PASSED] 11 VFs
[22:39:45] [PASSED] 12 VFs
[22:39:45] [PASSED] 13 VFs
[22:39:45] [PASSED] 14 VFs
[22:39:45] [PASSED] 15 VFs
[22:39:45] [PASSED] 16 VFs
[22:39:45] [PASSED] 17 VFs
[22:39:45] [PASSED] 18 VFs
[22:39:45] [PASSED] 19 VFs
[22:39:45] [PASSED] 20 VFs
[22:39:45] [PASSED] 21 VFs
[22:39:45] [PASSED] 22 VFs
[22:39:45] [PASSED] 23 VFs
[22:39:45] [PASSED] 24 VFs
[22:39:45] [PASSED] 25 VFs
[22:39:45] [PASSED] 26 VFs
[22:39:45] [PASSED] 27 VFs
[22:39:45] [PASSED] 28 VFs
[22:39:45] [PASSED] 29 VFs
[22:39:45] [PASSED] 30 VFs
[22:39:45] [PASSED] 31 VFs
[22:39:45] [PASSED] 32 VFs
[22:39:45] [PASSED] 33 VFs
[22:39:45] [PASSED] 34 VFs
[22:39:45] [PASSED] 35 VFs
[22:39:45] [PASSED] 36 VFs
[22:39:45] [PASSED] 37 VFs
[22:39:45] [PASSED] 38 VFs
[22:39:45] [PASSED] 39 VFs
[22:39:45] [PASSED] 40 VFs
[22:39:45] [PASSED] 41 VFs
[22:39:45] [PASSED] 42 VFs
[22:39:45] [PASSED] 43 VFs
[22:39:45] [PASSED] 44 VFs
[22:39:45] [PASSED] 45 VFs
[22:39:45] [PASSED] 46 VFs
[22:39:45] [PASSED] 47 VFs
[22:39:45] [PASSED] 48 VFs
[22:39:45] [PASSED] 49 VFs
[22:39:45] [PASSED] 50 VFs
[22:39:45] [PASSED] 51 VFs
[22:39:45] [PASSED] 52 VFs
[22:39:45] [PASSED] 53 VFs
[22:39:45] [PASSED] 54 VFs
[22:39:45] [PASSED] 55 VFs
[22:39:45] [PASSED] 56 VFs
[22:39:45] [PASSED] 57 VFs
[22:39:45] [PASSED] 58 VFs
[22:39:45] [PASSED] 59 VFs
[22:39:45] [PASSED] 60 VFs
[22:39:45] [PASSED] 61 VFs
[22:39:45] [PASSED] 62 VFs
[22:39:45] [PASSED] 63 VFs
[22:39:45] ==================== [PASSED] fair_ggtt ====================
[22:39:45] ======================== fair_vram  ========================
[22:39:45] [PASSED] 1 VF
[22:39:45] [PASSED] 2 VFs
[22:39:45] [PASSED] 3 VFs
[22:39:45] [PASSED] 4 VFs
[22:39:45] [PASSED] 5 VFs
[22:39:45] [PASSED] 6 VFs
[22:39:45] [PASSED] 7 VFs
[22:39:45] [PASSED] 8 VFs
[22:39:45] [PASSED] 9 VFs
[22:39:45] [PASSED] 10 VFs
[22:39:45] [PASSED] 11 VFs
[22:39:45] [PASSED] 12 VFs
[22:39:45] [PASSED] 13 VFs
[22:39:45] [PASSED] 14 VFs
[22:39:45] [PASSED] 15 VFs
[22:39:45] [PASSED] 16 VFs
[22:39:45] [PASSED] 17 VFs
[22:39:45] [PASSED] 18 VFs
[22:39:45] [PASSED] 19 VFs
[22:39:45] [PASSED] 20 VFs
[22:39:45] [PASSED] 21 VFs
[22:39:45] [PASSED] 22 VFs
[22:39:45] [PASSED] 23 VFs
[22:39:45] [PASSED] 24 VFs
[22:39:45] [PASSED] 25 VFs
[22:39:45] [PASSED] 26 VFs
[22:39:45] [PASSED] 27 VFs
[22:39:45] [PASSED] 28 VFs
[22:39:45] [PASSED] 29 VFs
[22:39:45] [PASSED] 30 VFs
[22:39:45] [PASSED] 31 VFs
[22:39:45] [PASSED] 32 VFs
[22:39:45] [PASSED] 33 VFs
[22:39:45] [PASSED] 34 VFs
[22:39:45] [PASSED] 35 VFs
[22:39:45] [PASSED] 36 VFs
[22:39:45] [PASSED] 37 VFs
[22:39:45] [PASSED] 38 VFs
[22:39:45] [PASSED] 39 VFs
[22:39:45] [PASSED] 40 VFs
[22:39:45] [PASSED] 41 VFs
[22:39:45] [PASSED] 42 VFs
[22:39:45] [PASSED] 43 VFs
[22:39:45] [PASSED] 44 VFs
[22:39:45] [PASSED] 45 VFs
[22:39:45] [PASSED] 46 VFs
[22:39:45] [PASSED] 47 VFs
[22:39:45] [PASSED] 48 VFs
[22:39:45] [PASSED] 49 VFs
[22:39:45] [PASSED] 50 VFs
[22:39:45] [PASSED] 51 VFs
[22:39:45] [PASSED] 52 VFs
[22:39:45] [PASSED] 53 VFs
[22:39:45] [PASSED] 54 VFs
[22:39:45] [PASSED] 55 VFs
[22:39:45] [PASSED] 56 VFs
[22:39:45] [PASSED] 57 VFs
[22:39:45] [PASSED] 58 VFs
[22:39:45] [PASSED] 59 VFs
[22:39:45] [PASSED] 60 VFs
[22:39:45] [PASSED] 61 VFs
[22:39:45] [PASSED] 62 VFs
[22:39:45] [PASSED] 63 VFs
[22:39:45] ==================== [PASSED] fair_vram ====================
[22:39:45] ================== [PASSED] pf_gt_config ===================
[22:39:45] ===================== lmtt (1 subtest) =====================
[22:39:45] ======================== test_ops  =========================
[22:39:45] [PASSED] 2-level
[22:39:45] [PASSED] multi-level
[22:39:45] ==================== [PASSED] test_ops =====================
[22:39:45] ====================== [PASSED] lmtt =======================
[22:39:45] ================= sriov_packet (1 subtest) =================
[22:39:45] [PASSED] test_descriptor_init
[22:39:45] ================== [PASSED] sriov_packet ===================
[22:39:45] ================= pf_service (11 subtests) =================
[22:39:45] [PASSED] pf_negotiate_any
[22:39:45] [PASSED] pf_negotiate_base_match
[22:39:45] [PASSED] pf_negotiate_base_newer
[22:39:45] [PASSED] pf_negotiate_base_next
[22:39:45] [SKIPPED] pf_negotiate_base_older (no older minor)
[22:39:45] [PASSED] pf_negotiate_base_prev
[22:39:45] [PASSED] pf_negotiate_latest_match
[22:39:45] [PASSED] pf_negotiate_latest_newer
[22:39:45] [PASSED] pf_negotiate_latest_next
[22:39:45] [SKIPPED] pf_negotiate_latest_older (no older minor)
[22:39:45] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[22:39:45] =================== [PASSED] pf_service ====================
[22:39:45] ================= xe_guc_g2g (2 subtests) ==================
[22:39:45] ============== xe_live_guc_g2g_kunit_default  ==============
[22:39:45] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:39:45] ============== xe_live_guc_g2g_kunit_allmem  ===============
[22:39:45] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:39:45] =================== [SKIPPED] xe_guc_g2g ===================
[22:39:45] =================== xe_mocs (2 subtests) ===================
[22:39:45] ================ xe_live_mocs_kernel_kunit  ================
[22:39:45] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:39:45] ================ xe_live_mocs_reset_kunit  =================
[22:39:45] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:39:45] ==================== [SKIPPED] xe_mocs =====================
[22:39:45] ================= xe_migrate (2 subtests) ==================
[22:39:45] ================= xe_migrate_sanity_kunit  =================
[22:39:45] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:39:45] ================== xe_validate_ccs_kunit  ==================
[22:39:45] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:39:45] =================== [SKIPPED] xe_migrate ===================
[22:39:45] ================== xe_dma_buf (1 subtest) ==================
[22:39:45] ==================== xe_dma_buf_kunit  =====================
[22:39:45] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:39:45] =================== [SKIPPED] xe_dma_buf ===================
[22:39:45] ================= xe_bo_shrink (1 subtest) =================
[22:39:45] =================== xe_bo_shrink_kunit  ====================
[22:39:45] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:39:45] ================== [SKIPPED] xe_bo_shrink ==================
[22:39:45] ==================== xe_bo (2 subtests) ====================
[22:39:45] ================== xe_ccs_migrate_kunit  ===================
[22:39:45] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:39:45] ==================== xe_bo_evict_kunit  ====================
[22:39:45] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:39:45] ===================== [SKIPPED] xe_bo ======================
[22:39:45] =================== xe_any (9 subtests) ====================
[22:39:45] [PASSED] test_to_xe
[22:39:45] [PASSED] test_to_dev
[22:39:45] [PASSED] test_to_pdev
[22:39:45] [PASSED] test_to_drm
[22:39:45] [PASSED] test_if_pdev
[22:39:45] [PASSED] test_if_xe
[22:39:45] [PASSED] test_if_tile
[22:39:45] [PASSED] test_if_gt
[22:39:45] [PASSED] test_to_id
[22:39:45] ===================== [PASSED] xe_any ======================
[22:39:45] ==================== args (13 subtests) ====================
[22:39:45] [PASSED] count_args_test
[22:39:45] [PASSED] call_args_example
[22:39:45] [PASSED] call_args_test
[22:39:45] [PASSED] drop_first_arg_example
[22:39:45] [PASSED] drop_first_arg_test
[22:39:45] [PASSED] first_arg_example
[22:39:45] [PASSED] first_arg_test
[22:39:45] [PASSED] last_arg_example
[22:39:45] [PASSED] last_arg_test
[22:39:45] [PASSED] pick_arg_example
[22:39:45] [PASSED] if_args_example
[22:39:45] [PASSED] if_args_test
[22:39:45] [PASSED] sep_comma_example
[22:39:45] ====================== [PASSED] args =======================
[22:39:45] =================== xe_pci (3 subtests) ====================
[22:39:45] ==================== check_graphics_ip  ====================
[22:39:45] [PASSED] 12.00 Xe_LP
[22:39:45] [PASSED] 12.10 Xe_LP+
[22:39:45] [PASSED] 12.55 Xe_HPG
[22:39:45] [PASSED] 12.60 Xe_HPC
[22:39:45] [PASSED] 12.70 Xe_LPG
[22:39:45] [PASSED] 12.71 Xe_LPG
[22:39:45] [PASSED] 12.74 Xe_LPG+
[22:39:45] [PASSED] 20.01 Xe2_HPG
[22:39:45] [PASSED] 20.02 Xe2_HPG
[22:39:45] [PASSED] 20.04 Xe2_LPG
[22:39:45] [PASSED] 30.00 Xe3_LPG
[22:39:45] [PASSED] 30.01 Xe3_LPG
[22:39:45] [PASSED] 30.03 Xe3_LPG
[22:39:45] [PASSED] 30.04 Xe3_LPG
[22:39:45] [PASSED] 30.05 Xe3_LPG
[22:39:45] [PASSED] 35.10 Xe3p_LPG
[22:39:45] [PASSED] 35.11 Xe3p_XPC
[22:39:45] ================ [PASSED] check_graphics_ip ================
[22:39:45] ===================== check_media_ip  ======================
[22:39:45] [PASSED] 12.00 Xe_M
[22:39:45] [PASSED] 12.55 Xe_HPM
[22:39:45] [PASSED] 13.00 Xe_LPM+
[22:39:45] [PASSED] 13.01 Xe2_HPM
[22:39:45] [PASSED] 20.00 Xe2_LPM
[22:39:45] [PASSED] 30.00 Xe3_LPM
[22:39:45] [PASSED] 30.02 Xe3_LPM
[22:39:45] [PASSED] 35.00 Xe3p_LPM
[22:39:45] [PASSED] 35.03 Xe3p_HPM
[22:39:45] ================= [PASSED] check_media_ip ==================
[22:39:45] =================== check_platform_desc  ===================
[22:39:45] [PASSED] 0x9A60 (TIGERLAKE)
[22:39:45] [PASSED] 0x9A68 (TIGERLAKE)
[22:39:45] [PASSED] 0x9A70 (TIGERLAKE)
[22:39:45] [PASSED] 0x9A40 (TIGERLAKE)
[22:39:45] [PASSED] 0x9A49 (TIGERLAKE)
[22:39:45] [PASSED] 0x9A59 (TIGERLAKE)
[22:39:45] [PASSED] 0x9A78 (TIGERLAKE)
[22:39:45] [PASSED] 0x9AC0 (TIGERLAKE)
[22:39:45] [PASSED] 0x9AC9 (TIGERLAKE)
[22:39:45] [PASSED] 0x9AD9 (TIGERLAKE)
[22:39:45] [PASSED] 0x9AF8 (TIGERLAKE)
[22:39:45] [PASSED] 0x4C80 (ROCKETLAKE)
[22:39:45] [PASSED] 0x4C8A (ROCKETLAKE)
[22:39:45] [PASSED] 0x4C8B (ROCKETLAKE)
[22:39:45] [PASSED] 0x4C8C (ROCKETLAKE)
[22:39:45] [PASSED] 0x4C90 (ROCKETLAKE)
[22:39:45] [PASSED] 0x4C9A (ROCKETLAKE)
[22:39:45] [PASSED] 0x4680 (ALDERLAKE_S)
[22:39:45] [PASSED] 0x4682 (ALDERLAKE_S)
[22:39:45] [PASSED] 0x4688 (ALDERLAKE_S)
[22:39:45] [PASSED] 0x468A (ALDERLAKE_S)
[22:39:45] [PASSED] 0x468B (ALDERLAKE_S)
[22:39:45] [PASSED] 0x4690 (ALDERLAKE_S)
[22:39:45] [PASSED] 0x4692 (ALDERLAKE_S)
[22:39:45] [PASSED] 0x4693 (ALDERLAKE_S)
[22:39:45] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46AA (ALDERLAKE_P)
[22:39:45] [PASSED] 0x462A (ALDERLAKE_P)
[22:39:45] [PASSED] 0x4626 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x4628 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:39:45] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:39:45] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:39:45] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:39:45] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:39:45] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:39:45] [PASSED] 0xA721 (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA720 (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:39:45] [PASSED] 0xA780 (ALDERLAKE_S)
[22:39:45] [PASSED] 0xA781 (ALDERLAKE_S)
[22:39:45] [PASSED] 0xA782 (ALDERLAKE_S)
[22:39:45] [PASSED] 0xA783 (ALDERLAKE_S)
[22:39:45] [PASSED] 0xA788 (ALDERLAKE_S)
[22:39:45] [PASSED] 0xA789 (ALDERLAKE_S)
[22:39:45] [PASSED] 0xA78A (ALDERLAKE_S)
[22:39:45] [PASSED] 0xA78B (ALDERLAKE_S)
[22:39:45] [PASSED] 0x4905 (DG1)
[22:39:45] [PASSED] 0x4906 (DG1)
[22:39:45] [PASSED] 0x4907 (DG1)
[22:39:45] [PASSED] 0x4908 (DG1)
[22:39:45] [PASSED] 0x4909 (DG1)
[22:39:45] [PASSED] 0x56C0 (DG2)
[22:39:45] [PASSED] 0x56C2 (DG2)
[22:39:45] [PASSED] 0x56C1 (DG2)
[22:39:45] [PASSED] 0x7D51 (METEORLAKE)
[22:39:45] [PASSED] 0x7DD1 (METEORLAKE)
[22:39:45] [PASSED] 0x7D41 (METEORLAKE)
[22:39:45] [PASSED] 0x7D67 (METEORLAKE)
[22:39:45] [PASSED] 0xB640 (METEORLAKE)
[22:39:45] [PASSED] 0x56A0 (DG2)
[22:39:45] [PASSED] 0x56A1 (DG2)
[22:39:45] [PASSED] 0x56A2 (DG2)
[22:39:45] [PASSED] 0x56BE (DG2)
[22:39:45] [PASSED] 0x56BF (DG2)
[22:39:45] [PASSED] 0x5690 (DG2)
[22:39:45] [PASSED] 0x5691 (DG2)
[22:39:45] [PASSED] 0x5692 (DG2)
[22:39:45] [PASSED] 0x56A5 (DG2)
[22:39:45] [PASSED] 0x56A6 (DG2)
[22:39:45] [PASSED] 0x56B0 (DG2)
[22:39:45] [PASSED] 0x56B1 (DG2)
[22:39:45] [PASSED] 0x56BA (DG2)
[22:39:45] [PASSED] 0x56BB (DG2)
[22:39:45] [PASSED] 0x56BC (DG2)
[22:39:45] [PASSED] 0x56BD (DG2)
[22:39:45] [PASSED] 0x5693 (DG2)
[22:39:45] [PASSED] 0x5694 (DG2)
[22:39:45] [PASSED] 0x5695 (DG2)
[22:39:45] [PASSED] 0x56A3 (DG2)
[22:39:45] [PASSED] 0x56A4 (DG2)
[22:39:45] [PASSED] 0x56B2 (DG2)
[22:39:45] [PASSED] 0x56B3 (DG2)
[22:39:45] [PASSED] 0x5696 (DG2)
[22:39:45] [PASSED] 0x5697 (DG2)
[22:39:45] [PASSED] 0xB69 (PVC)
[22:39:45] [PASSED] 0xB6E (PVC)
[22:39:45] [PASSED] 0xBD4 (PVC)
[22:39:45] [PASSED] 0xBD5 (PVC)
[22:39:45] [PASSED] 0xBD6 (PVC)
[22:39:45] [PASSED] 0xBD7 (PVC)
[22:39:45] [PASSED] 0xBD8 (PVC)
[22:39:45] [PASSED] 0xBD9 (PVC)
[22:39:45] [PASSED] 0xBDA (PVC)
[22:39:45] [PASSED] 0xBDB (PVC)
[22:39:45] [PASSED] 0xBE0 (PVC)
[22:39:45] [PASSED] 0xBE1 (PVC)
[22:39:45] [PASSED] 0xBE5 (PVC)
[22:39:45] [PASSED] 0x7D40 (METEORLAKE)
[22:39:45] [PASSED] 0x7D45 (METEORLAKE)
[22:39:45] [PASSED] 0x7D55 (METEORLAKE)
[22:39:45] [PASSED] 0x7D60 (METEORLAKE)
[22:39:45] [PASSED] 0x7DD5 (METEORLAKE)
[22:39:45] [PASSED] 0x6420 (LUNARLAKE)
[22:39:45] [PASSED] 0x64A0 (LUNARLAKE)
[22:39:45] [PASSED] 0x64B0 (LUNARLAKE)
[22:39:45] [PASSED] 0xE202 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE209 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE20B (BATTLEMAGE)
[22:39:45] [PASSED] 0xE20C (BATTLEMAGE)
[22:39:45] [PASSED] 0xE20D (BATTLEMAGE)
[22:39:45] [PASSED] 0xE210 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE211 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE212 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE216 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE220 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE221 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE222 (BATTLEMAGE)
[22:39:45] [PASSED] 0xE223 (BATTLEMAGE)
[22:39:45] [PASSED] 0xB080 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB081 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB082 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB083 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB084 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB085 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB086 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB087 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB08F (PANTHERLAKE)
[22:39:45] [PASSED] 0xB090 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:39:45] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:39:45] [PASSED] 0xFD80 (PANTHERLAKE)
[22:39:45] [PASSED] 0xFD81 (PANTHERLAKE)
[22:39:45] [PASSED] 0xD740 (NOVALAKE_S)
[22:39:45] [PASSED] 0xD741 (NOVALAKE_S)
[22:39:45] [PASSED] 0xD742 (NOVALAKE_S)
[22:39:45] [PASSED] 0xD743 (NOVALAKE_S)
[22:39:45] [PASSED] 0xD745 (NOVALAKE_S)
[22:39:45] [PASSED] 0xD74A (NOVALAKE_S)
[22:39:45] [PASSED] 0xD74B (NOVALAKE_S)
[22:39:45] [PASSED] 0x674C (CRESCENTISLAND)
[22:39:45] [PASSED] 0x674D (CRESCENTISLAND)
[22:39:45] [PASSED] 0x674E (CRESCENTISLAND)
[22:39:45] [PASSED] 0x674F (CRESCENTISLAND)
[22:39:45] [PASSED] 0x6750 (CRESCENTISLAND)
[22:39:45] [PASSED] 0xD750 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD751 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD752 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD753 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD754 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD755 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD756 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD757 (NOVALAKE_P)
[22:39:45] [PASSED] 0xD75F (NOVALAKE_P)
[22:39:45] =============== [PASSED] check_platform_desc ===============
[22:39:45] ===================== [PASSED] xe_pci ======================
[22:39:45] ============= xe_rtp_tables_test (5 subtests) ==============
[22:39:45] ================== xe_rtp_table_gt_test  ===================
[22:39:45] [PASSED] gt_was/14011060649
[22:39:45] [PASSED] gt_was/14011059788
[22:39:45] [PASSED] gt_was/14015795083
[22:39:45] [PASSED] gt_was/16021867713
[22:39:45] [PASSED] gt_was/14019449301
[22:39:45] [PASSED] gt_was/16028005424
[22:39:45] [PASSED] gt_was/14026578760
[22:39:45] [PASSED] gt_was/1409420604
[22:39:45] [PASSED] gt_was/1408615072
[22:39:45] [PASSED] gt_was/22010523718
[22:39:45] [PASSED] gt_was/14011006942
[22:39:45] [PASSED] gt_was/14014830051
[22:39:45] [PASSED] gt_was/18018781329
[22:39:45] [PASSED] gt_was/1509235366
[22:39:45] [PASSED] gt_was/18018781329
[22:39:45] [PASSED] gt_was/16016694945
[22:39:45] [PASSED] gt_was/14018575942
[22:39:45] [PASSED] gt_was/22016670082
[22:39:45] [PASSED] gt_was/22016670082
[22:39:45] [PASSED] gt_was/14017421178
[22:39:45] [PASSED] gt_was/16025250150
[22:39:45] [PASSED] gt_was/14021871409
[22:39:45] [PASSED] gt_was/16021865536
[22:39:45] [PASSED] gt_was/14021486841
[22:39:45] [PASSED] gt_was/14025160223
[22:39:45] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[22:39:45] [PASSED] gt_was/14025635424
[22:39:45] [PASSED] gt_was/16028005424
[22:39:45] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:39:45] ================== xe_rtp_table_gt_test  ===================
[22:39:45] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[22:39:45] [PASSED] gt_tunings/Tuning: 32B Access Enable
[22:39:45] [PASSED] gt_tunings/Tuning: L3 cache
[22:39:45] [PASSED] gt_tunings/Tuning: L3 cache - media
[22:39:45] [PASSED] gt_tunings/Tuning: Compression Overfetch
[22:39:45] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[22:39:45] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[22:39:45] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[22:39:45] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[22:39:45] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[22:39:45] [PASSED] gt_tunings/Tuning: Stateless compression control
[22:39:45] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[22:39:45] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[22:39:45] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[22:39:45] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[22:39:45] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:39:45] ================== xe_rtp_table_oob_test  ==================
[22:39:45] [PASSED] oob_was/1607983814
[22:39:45] [PASSED] oob_was/16010904313
[22:39:45] [PASSED] oob_was/18022495364
[22:39:45] [PASSED] oob_was/22012773006
[22:39:45] [PASSED] oob_was/14014475959
[22:39:45] [PASSED] oob_was/22011391025
[22:39:45] [PASSED] oob_was/22012727170
[22:39:45] [PASSED] oob_was/22012727685
[22:39:45] [PASSED] oob_was/22016596838
[22:39:45] [PASSED] oob_was/18020744125
[22:39:45] [PASSED] oob_was/1409600907
[22:39:45] [PASSED] oob_was/22014953428
[22:39:45] [PASSED] oob_was/16017236439
[22:39:45] [PASSED] oob_was/14019821291
[22:39:45] [PASSED] oob_was/14015076503
[22:39:45] [PASSED] oob_was/14018913170
[22:39:45] [PASSED] oob_was/14018094691
[22:39:45] [PASSED] oob_was/18024947630
[22:39:45] [PASSED] oob_was/16022287689
[22:39:45] [PASSED] oob_was/13011645652
[22:39:45] [PASSED] oob_was/14022293748
[22:39:45] [PASSED] oob_was/22019794406
[22:39:45] [PASSED] oob_was/22019338487
[22:39:45] [PASSED] oob_was/16023588340
[22:39:45] [PASSED] oob_was/14019789679
[22:39:45] [PASSED] oob_was/14022866841
[22:39:45] [PASSED] oob_was/16021333562
[22:39:45] [PASSED] oob_was/14016712196
[22:39:45] [PASSED] oob_was/14015568240
[22:39:45] [PASSED] oob_was/18013179988
[22:39:45] [PASSED] oob_was/1508761755
[22:39:45] [PASSED] oob_was/16023105232
[22:39:45] [PASSED] oob_was/16026508708
[22:39:45] [PASSED] oob_was/14020001231
[22:39:45] [PASSED] oob_was/16023683509
[22:39:45] [PASSED] oob_was/14025515070
[22:39:45] [PASSED] oob_was/15015404425_disable
[22:39:45] [PASSED] oob_was/16026007364
[22:39:45] [PASSED] oob_was/14020316580
[22:39:45] [PASSED] oob_was/14025883347
[22:39:45] [PASSED] oob_was/16029380221
[22:39:45] [PASSED] oob_was/22022079272
[22:39:45] [PASSED] oob_was/16029897822
[22:39:45] [PASSED] oob_was/14027054324
[22:39:45] ============== [PASSED] xe_rtp_table_oob_test ==============
[22:39:45] ================ xe_rtp_table_dev_oob_test  ================
[22:39:45] [PASSED] device_oob_was/22010954014
[22:39:45] [PASSED] device_oob_was/15015404425
[22:39:45] [PASSED] device_oob_was/22019338487_display
[22:39:45] [PASSED] device_oob_was/14022085890
[22:39:45] [PASSED] device_oob_was/14026539277
[22:39:45] [PASSED] device_oob_was/14026633728
[22:39:45] [PASSED] device_oob_was/14026746987
[22:39:45] [PASSED] device_oob_was/14026779378
[22:39:45] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[22:39:45] ========== xe_rtp_table_missing_upper_bound_test  ==========
[22:39:45] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[22:39:45] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[22:39:45] [PASSED] register_whitelist/1806527549
[22:39:45] [PASSED] register_whitelist/allow_read_ctx_timestamp
[22:39:45] [PASSED] register_whitelist/allow_read_queue_timestamp
[22:39:45] [PASSED] register_whitelist/16014440446
[22:39:45] [PASSED] register_whitelist/16017236439
[22:39:45] [PASSED] register_whitelist/16020183090
[22:39:45] [PASSED] register_whitelist/14024997852
[22:39:45] [PASSED] register_whitelist/14024997852
[22:39:45] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[22:39:45] =============== [PASSED] xe_rtp_tables_test ================
[22:39:45] =================== xe_rtp (3 subtests) ====================
[22:39:45] =================== xe_rtp_rules_tests  ====================
[22:39:45] [PASSED] no
[22:39:45] [PASSED] yes
[22:39:45] [PASSED] no-and-no
[22:39:45] [PASSED] no-and-yes
[22:39:45] [PASSED] yes-and-no
[22:39:45] [PASSED] yes-and-yes
[22:39:45] [PASSED] no-or-no
[22:39:45] [PASSED] no-or-yes
[22:39:45] [PASSED] yes-or-no
[22:39:45] [PASSED] yes-or-yes
[22:39:45] [PASSED] no-yes-or-yes-no
[22:39:45] [PASSED] no-yes-or-yes-yes
[22:39:45] [PASSED] yes-yes-or-no-yes
[22:39:45] [PASSED] yes-yes-or-yes-yes
[22:39:45] [PASSED] no-no-or-yes-or-no
[22:39:45] [PASSED] or
[22:39:45] [PASSED] or-yes
[22:39:45] [PASSED] or-no
[22:39:45] [PASSED] yes-or
[22:39:45] [PASSED] no-or
[22:39:45] [PASSED] no-or-or-yes
[22:39:45] [PASSED] yes-or-or-no
[22:39:45] [PASSED] no-or-or-no
[22:39:45] [PASSED] missing-context-engine-class
[22:39:45] [PASSED] missing-context-engine-class-or-yes
[22:39:45] [PASSED] missing-context-engine-class-or-or-yes
[22:39:45] =============== [PASSED] xe_rtp_rules_tests ================
[22:39:45] =============== xe_rtp_process_to_sr_tests  ================
[22:39:45] [PASSED] coalesce-same-reg
[22:39:45] [PASSED] coalesce-same-reg-literal-and-func
[22:39:45] [PASSED] no-match-no-add
[22:39:45] [PASSED] two-regs-two-entries
[22:39:45] [PASSED] clr-one-set-other
[22:39:45] [PASSED] set-field
[22:39:45] [PASSED] conflict-duplicate
[22:39:45] [PASSED] conflict-not-disjoint
[22:39:45] [PASSED] conflict-not-disjoint-literal-and-func
[22:39:45] [PASSED] conflict-reg-type
[22:39:45] [PASSED] bad-mcr-reg-forced-to-regular
[22:39:45] [PASSED] bad-regular-reg-forced-to-mcr
[22:39:45] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:39:45] ================== xe_rtp_process_tests  ===================
[22:39:45] [PASSED] active1
[22:39:45] [PASSED] active2
[22:39:45] [PASSED] active-inactive
[22:39:45] [PASSED] inactive-active
[22:39:45] [PASSED] inactive-active-inactive
[22:39:45] [PASSED] inactive-inactive-inactive
[22:39:45] ============== [PASSED] xe_rtp_process_tests ===============
[22:39:45] ===================== [PASSED] xe_rtp ======================
[22:39:45] ==================== xe_wa (1 subtest) =====================
[22:39:45] ======================== xe_wa_gt  =========================
[22:39:45] [PASSED] TIGERLAKE B0
[22:39:45] [PASSED] DG1 A0
[22:39:45] [PASSED] DG1 B0
[22:39:45] [PASSED] ALDERLAKE_S A0
[22:39:45] [PASSED] ALDERLAKE_S B0
[22:39:45] [PASSED] ALDERLAKE_S C0
[22:39:45] [PASSED] ALDERLAKE_S D0
[22:39:45] [PASSED] ALDERLAKE_P A0
[22:39:45] [PASSED] ALDERLAKE_P B0
[22:39:45] [PASSED] ALDERLAKE_P C0
[22:39:45] [PASSED] ALDERLAKE_S RPLS D0
[22:39:45] [PASSED] ALDERLAKE_P RPLU E0
[22:39:45] [PASSED] DG2 G10 C0
[22:39:45] [PASSED] DG2 G11 B1
[22:39:45] [PASSED] DG2 G12 A1
[22:39:45] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:39:45] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:39:45] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:39:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:39:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:39:45] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:39:45] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:39:45] ==================== [PASSED] xe_wa_gt =====================
[22:39:45] ====================== [PASSED] xe_wa ======================
[22:39:45] ============================================================
[22:39:45] Testing complete. Ran 793 tests: passed: 765, skipped: 28
[22:39:45] Elapsed time: 36.133s total, 1.838s configuring, 33.528s building, 0.711s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:39:45] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:39:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:40:12] Starting KUnit Kernel (1/1)...
[22:40:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:40:12] ============= refcount_interrupt (4 subtests) ==============
[22:40:12] [PASSED] test_single_irq_change
[22:40:12] [PASSED] test_nested_irq_change
[22:40:12] [PASSED] test_multiple_irq_change
[22:40:12] [PASSED] test_irq_save
[22:40:12] =============== [PASSED] refcount_interrupt ================
[22:40:12] ============ drm_test_pick_cmdline (2 subtests) ============
[22:40:12] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:40:12] =============== drm_test_pick_cmdline_named  ===============
[22:40:12] [PASSED] NTSC
[22:40:12] [PASSED] NTSC-J
[22:40:12] [PASSED] PAL
[22:40:12] [PASSED] PAL-M
[22:40:12] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:40:12] ============== [PASSED] drm_test_pick_cmdline ==============
[22:40:12] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:40:12] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:40:12] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:40:12] =========== drm_validate_clone_mode (2 subtests) ===========
[22:40:12] ============== drm_test_check_in_clone_mode  ===============
[22:40:12] [PASSED] in_clone_mode
[22:40:12] [PASSED] not_in_clone_mode
[22:40:12] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:40:12] =============== drm_test_check_valid_clones  ===============
[22:40:12] [PASSED] not_in_clone_mode
[22:40:12] [PASSED] valid_clone
[22:40:12] [PASSED] invalid_clone
[22:40:12] =========== [PASSED] drm_test_check_valid_clones ===========
[22:40:12] ============= [PASSED] drm_validate_clone_mode =============
[22:40:12] ============= drm_validate_modeset (1 subtest) =============
[22:40:12] [PASSED] drm_test_check_connector_changed_modeset
[22:40:12] ============== [PASSED] drm_validate_modeset ===============
[22:40:12] ====== drm_test_bridge_get_current_state (1 subtest) =======
[22:40:12] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:40:12] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:40:12] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:40:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:40:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:40:12] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[22:40:12] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:40:12] ============== drm_bridge_alloc (2 subtests) ===============
[22:40:12] [PASSED] drm_test_drm_bridge_alloc_basic
[22:40:12] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:40:12] ================ [PASSED] drm_bridge_alloc =================
[22:40:12] ============= drm_bridge_bus_fmt (5 subtests) ==============
[22:40:12] [PASSED] drm_test_bridge_rgb_yuv_rgb
[22:40:12] [PASSED] drm_test_bridge_must_convert_to_yuv444
[22:40:12] [PASSED] drm_test_bridge_hdmi_auto_rgb
[22:40:12] [PASSED] drm_test_bridge_auto_first
[22:40:12] [PASSED] drm_test_bridge_rgb_yuv_no_path
[22:40:12] =============== [PASSED] drm_bridge_bus_fmt ================
[22:40:12] ============= drm_cmdline_parser (40 subtests) =============
[22:40:12] [PASSED] drm_test_cmdline_force_d_only
[22:40:12] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:40:12] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:40:12] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:40:12] [PASSED] drm_test_cmdline_force_e_only
[22:40:12] [PASSED] drm_test_cmdline_res
[22:40:12] [PASSED] drm_test_cmdline_res_vesa
[22:40:12] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:40:12] [PASSED] drm_test_cmdline_res_rblank
[22:40:12] [PASSED] drm_test_cmdline_res_bpp
[22:40:12] [PASSED] drm_test_cmdline_res_refresh
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:40:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:40:12] [PASSED] drm_test_cmdline_res_margins_force_on
[22:40:12] [PASSED] drm_test_cmdline_res_vesa_margins
[22:40:12] [PASSED] drm_test_cmdline_name
[22:40:12] [PASSED] drm_test_cmdline_name_bpp
[22:40:12] [PASSED] drm_test_cmdline_name_option
[22:40:12] [PASSED] drm_test_cmdline_name_bpp_option
[22:40:12] [PASSED] drm_test_cmdline_rotate_0
[22:40:12] [PASSED] drm_test_cmdline_rotate_90
[22:40:12] [PASSED] drm_test_cmdline_rotate_180
[22:40:12] [PASSED] drm_test_cmdline_rotate_270
[22:40:12] [PASSED] drm_test_cmdline_hmirror
[22:40:12] [PASSED] drm_test_cmdline_vmirror
[22:40:12] [PASSED] drm_test_cmdline_margin_options
[22:40:12] [PASSED] drm_test_cmdline_multiple_options
[22:40:12] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:40:12] [PASSED] drm_test_cmdline_extra_and_option
[22:40:12] [PASSED] drm_test_cmdline_freestanding_options
[22:40:12] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:40:12] [PASSED] drm_test_cmdline_panel_orientation
[22:40:12] ================ drm_test_cmdline_invalid  =================
[22:40:12] [PASSED] margin_only
[22:40:12] [PASSED] interlace_only
[22:40:12] [PASSED] res_missing_x
[22:40:12] [PASSED] res_missing_y
[22:40:12] [PASSED] res_bad_y
[22:40:12] [PASSED] res_missing_y_bpp
[22:40:12] [PASSED] res_bad_bpp
[22:40:12] [PASSED] res_bad_refresh
[22:40:12] [PASSED] res_bpp_refresh_force_on_off
[22:40:12] [PASSED] res_invalid_mode
[22:40:12] [PASSED] res_bpp_wrong_place_mode
[22:40:12] [PASSED] name_bpp_refresh
[22:40:12] [PASSED] name_refresh
[22:40:12] [PASSED] name_refresh_wrong_mode
[22:40:12] [PASSED] name_refresh_invalid_mode
[22:40:12] [PASSED] rotate_multiple
[22:40:12] [PASSED] rotate_invalid_val
[22:40:12] [PASSED] rotate_truncated
[22:40:12] [PASSED] invalid_option
[22:40:12] [PASSED] invalid_tv_option
[22:40:12] [PASSED] truncated_tv_option
[22:40:12] ============ [PASSED] drm_test_cmdline_invalid =============
[22:40:12] =============== drm_test_cmdline_tv_options  ===============
[22:40:12] [PASSED] NTSC
[22:40:12] [PASSED] NTSC_443
[22:40:12] [PASSED] NTSC_J
[22:40:12] [PASSED] PAL
[22:40:12] [PASSED] PAL_M
[22:40:12] [PASSED] PAL_N
[22:40:12] [PASSED] SECAM
[22:40:12] [PASSED] MONO_525
[22:40:12] [PASSED] MONO_625
[22:40:12] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:40:12] =============== [PASSED] drm_cmdline_parser ================
[22:40:12] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:40:12] [PASSED] drm_test_connector_hdmi_init_valid
[22:40:12] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:40:12] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:40:12] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:40:12] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:40:12] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:40:12] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:40:12] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:40:12] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[22:40:12] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:40:12] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:40:12] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:40:12] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:40:12] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:40:12] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:40:12] [PASSED] drm_test_connector_hdmi_init_null_product
[22:40:12] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:40:12] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:40:12] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:40:12] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:40:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:40:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:40:12] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:40:12] ========= drm_test_connector_hdmi_init_type_valid  =========
[22:40:12] [PASSED] HDMI-A
[22:40:12] [PASSED] HDMI-B
[22:40:12] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:40:12] ======== drm_test_connector_hdmi_init_type_invalid  ========
[22:40:12] [PASSED] Unknown
[22:40:12] [PASSED] VGA
[22:40:12] [PASSED] DVI-I
[22:40:12] [PASSED] DVI-D
[22:40:12] [PASSED] DVI-A
[22:40:12] [PASSED] Composite
[22:40:12] [PASSED] SVIDEO
[22:40:12] [PASSED] LVDS
[22:40:12] [PASSED] Component
[22:40:12] [PASSED] DIN
[22:40:12] [PASSED] DP
[22:40:12] [PASSED] TV
[22:40:12] [PASSED] eDP
[22:40:12] [PASSED] Virtual
[22:40:12] [PASSED] DSI
[22:40:12] [PASSED] DPI
[22:40:12] [PASSED] Writeback
[22:40:12] [PASSED] SPI
[22:40:12] [PASSED] USB
[22:40:12] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:40:12] ============ [PASSED] drmm_connector_hdmi_init =============
[22:40:12] ============= drmm_connector_init (3 subtests) =============
[22:40:12] [PASSED] drm_test_drmm_connector_init
[22:40:12] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:40:12] ========= drm_test_drmm_connector_init_type_valid  =========
[22:40:12] [PASSED] Unknown
[22:40:12] [PASSED] VGA
[22:40:12] [PASSED] DVI-I
[22:40:12] [PASSED] DVI-D
[22:40:12] [PASSED] DVI-A
[22:40:12] [PASSED] Composite
[22:40:12] [PASSED] SVIDEO
[22:40:12] [PASSED] LVDS
[22:40:12] [PASSED] Component
[22:40:12] [PASSED] DIN
[22:40:12] [PASSED] DP
[22:40:12] [PASSED] HDMI-A
[22:40:12] [PASSED] HDMI-B
[22:40:12] [PASSED] TV
[22:40:12] [PASSED] eDP
[22:40:12] [PASSED] Virtual
[22:40:12] [PASSED] DSI
[22:40:12] [PASSED] DPI
[22:40:12] [PASSED] Writeback
[22:40:12] [PASSED] SPI
[22:40:12] [PASSED] USB
[22:40:12] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:40:12] =============== [PASSED] drmm_connector_init ===============
[22:40:12] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_init
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:40:12] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[22:40:12] [PASSED] Unknown
[22:40:12] [PASSED] VGA
[22:40:12] [PASSED] DVI-I
[22:40:12] [PASSED] DVI-D
[22:40:12] [PASSED] DVI-A
[22:40:12] [PASSED] Composite
[22:40:12] [PASSED] SVIDEO
[22:40:12] [PASSED] LVDS
[22:40:12] [PASSED] Component
[22:40:12] [PASSED] DIN
[22:40:12] [PASSED] DP
[22:40:12] [PASSED] HDMI-A
[22:40:12] [PASSED] HDMI-B
[22:40:12] [PASSED] TV
[22:40:12] [PASSED] eDP
[22:40:12] [PASSED] Virtual
[22:40:12] [PASSED] DSI
[22:40:12] [PASSED] DPI
[22:40:12] [PASSED] Writeback
[22:40:12] [PASSED] SPI
[22:40:12] [PASSED] USB
[22:40:12] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:40:12] ======== drm_test_drm_connector_dynamic_init_name  =========
[22:40:12] [PASSED] Unknown
[22:40:12] [PASSED] VGA
[22:40:12] [PASSED] DVI-I
[22:40:12] [PASSED] DVI-D
[22:40:12] [PASSED] DVI-A
[22:40:12] [PASSED] Composite
[22:40:12] [PASSED] SVIDEO
[22:40:12] [PASSED] LVDS
[22:40:12] [PASSED] Component
[22:40:12] [PASSED] DIN
[22:40:12] [PASSED] DP
[22:40:12] [PASSED] HDMI-A
[22:40:12] [PASSED] HDMI-B
[22:40:12] [PASSED] TV
[22:40:12] [PASSED] eDP
[22:40:12] [PASSED] Virtual
[22:40:12] [PASSED] DSI
[22:40:12] [PASSED] DPI
[22:40:12] [PASSED] Writeback
[22:40:12] [PASSED] SPI
[22:40:12] [PASSED] USB
[22:40:12] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:40:12] =========== [PASSED] drm_connector_dynamic_init ============
[22:40:12] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:40:12] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:40:12] ======= drm_connector_dynamic_register (7 subtests) ========
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:40:12] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:40:12] ========= [PASSED] drm_connector_dynamic_register ==========
[22:40:12] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:40:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:40:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:40:12] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:40:12] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:40:12] ========== drm_test_get_tv_mode_from_name_valid  ===========
[22:40:12] [PASSED] NTSC
[22:40:12] [PASSED] NTSC-443
[22:40:12] [PASSED] NTSC-J
[22:40:12] [PASSED] PAL
[22:40:12] [PASSED] PAL-M
[22:40:12] [PASSED] PAL-N
[22:40:12] [PASSED] SECAM
[22:40:12] [PASSED] Mono
[22:40:12] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:40:12] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:40:12] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:40:12] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:40:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:40:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:40:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:40:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:40:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:40:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:40:12] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[22:40:12] [PASSED] VIC 96
[22:40:12] [PASSED] VIC 97
[22:40:12] [PASSED] VIC 101
[22:40:12] [PASSED] VIC 102
[22:40:12] [PASSED] VIC 106
[22:40:12] [PASSED] VIC 107
[22:40:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:40:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:40:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:40:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:40:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:40:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:40:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:40:12] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:40:12] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[22:40:12] [PASSED] Automatic
[22:40:12] [PASSED] Full
[22:40:12] [PASSED] Limited 16:235
[22:40:12] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:40:12] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:40:12] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:40:12] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:40:12] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[22:40:12] [PASSED] RGB
[22:40:12] [PASSED] YUV 4:2:0
[22:40:12] [PASSED] YUV 4:2:2
[22:40:12] [PASSED] YUV 4:4:4
[22:40:12] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:40:12] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:40:12] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:40:12] ============= drm_damage_helper (21 subtests) ==============
[22:40:12] [PASSED] drm_test_damage_iter_no_damage
[22:40:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:40:12] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:40:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:40:12] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:40:12] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:40:12] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:40:12] [PASSED] drm_test_damage_iter_simple_damage
[22:40:12] [PASSED] drm_test_damage_iter_single_damage
[22:40:12] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:40:12] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:40:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:40:12] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:40:12] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:40:12] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:40:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:40:12] [PASSED] drm_test_damage_iter_damage
[22:40:12] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:40:12] [PASSED] drm_test_damage_iter_damage_one_outside
[22:40:12] [PASSED] drm_test_damage_iter_damage_src_moved
[22:40:12] [PASSED] drm_test_damage_iter_damage_not_visible
[22:40:12] ================ [PASSED] drm_damage_helper ================
[22:40:12] ============== drm_dp_mst_helper (3 subtests) ==============
[22:40:12] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[22:40:12] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:40:12] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:40:12] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:40:12] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:40:12] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:40:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:40:12] ============== drm_test_dp_mst_calc_pbn_div  ===============
[22:40:12] [PASSED] Link rate 2000000 lane count 4
[22:40:12] [PASSED] Link rate 2000000 lane count 2
[22:40:12] [PASSED] Link rate 2000000 lane count 1
[22:40:12] [PASSED] Link rate 1350000 lane count 4
[22:40:12] [PASSED] Link rate 1350000 lane count 2
[22:40:12] [PASSED] Link rate 1350000 lane count 1
[22:40:12] [PASSED] Link rate 1000000 lane count 4
[22:40:12] [PASSED] Link rate 1000000 lane count 2
[22:40:12] [PASSED] Link rate 1000000 lane count 1
[22:40:12] [PASSED] Link rate 810000 lane count 4
[22:40:12] [PASSED] Link rate 810000 lane count 2
[22:40:12] [PASSED] Link rate 810000 lane count 1
[22:40:12] [PASSED] Link rate 540000 lane count 4
[22:40:12] [PASSED] Link rate 540000 lane count 2
[22:40:12] [PASSED] Link rate 540000 lane count 1
[22:40:12] [PASSED] Link rate 270000 lane count 4
[22:40:12] [PASSED] Link rate 270000 lane count 2
[22:40:12] [PASSED] Link rate 270000 lane count 1
[22:40:12] [PASSED] Link rate 162000 lane count 4
[22:40:12] [PASSED] Link rate 162000 lane count 2
[22:40:12] [PASSED] Link rate 162000 lane count 1
[22:40:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:40:12] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[22:40:12] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:40:12] [PASSED] DP_POWER_UP_PHY with port number
[22:40:12] [PASSED] DP_POWER_DOWN_PHY with port number
[22:40:12] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:40:12] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:40:12] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:40:12] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:40:12] [PASSED] DP_QUERY_PAYLOAD with port number
[22:40:12] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:40:12] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:40:12] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:40:12] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:40:12] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:40:12] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:40:12] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:40:12] [PASSED] DP_REMOTE_I2C_READ with port number
[22:40:12] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:40:12] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:40:12] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:40:12] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:40:12] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:40:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:40:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:40:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:40:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:40:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:40:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:40:12] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:40:12] ================ [PASSED] drm_dp_mst_helper ================
[22:40:12] ================== drm_exec (7 subtests) ===================
[22:40:12] [PASSED] sanitycheck
[22:40:12] [PASSED] test_lock
[22:40:12] [PASSED] test_lock_unlock
[22:40:12] [PASSED] test_duplicates
[22:40:12] [PASSED] test_prepare
[22:40:12] [PASSED] test_prepare_array
[22:40:12] [PASSED] test_multiple_loops
[22:40:12] ==================== [PASSED] drm_exec =====================
[22:40:12] =========== drm_format_helper_test (17 subtests) ===========
[22:40:12] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:40:12] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:40:12] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:40:12] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:40:12] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:40:12] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:40:12] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:40:12] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:40:12] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:40:12] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:40:12] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:40:12] ============== drm_test_fb_xrgb8888_to_mono  ===============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:40:12] ==================== drm_test_fb_swab  =====================
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ================ [PASSED] drm_test_fb_swab =================
[22:40:12] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:40:12] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[22:40:12] [PASSED] single_pixel_source_buffer
[22:40:12] [PASSED] single_pixel_clip_rectangle
[22:40:12] [PASSED] well_known_colors
[22:40:12] [PASSED] destination_pitch
[22:40:12] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:40:12] ================= drm_test_fb_clip_offset  =================
[22:40:12] [PASSED] pass through
[22:40:12] [PASSED] horizontal offset
[22:40:12] [PASSED] vertical offset
[22:40:12] [PASSED] horizontal and vertical offset
[22:40:12] [PASSED] horizontal offset (custom pitch)
[22:40:12] [PASSED] vertical offset (custom pitch)
[22:40:12] [PASSED] horizontal and vertical offset (custom pitch)
[22:40:12] ============= [PASSED] drm_test_fb_clip_offset =============
[22:40:12] =================== drm_test_fb_memcpy  ====================
[22:40:12] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:40:12] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:40:12] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:40:12] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:40:12] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:40:12] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:40:12] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:40:12] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:40:12] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:40:12] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:40:12] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:40:12] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:40:12] =============== [PASSED] drm_test_fb_memcpy ================
[22:40:12] ============= [PASSED] drm_format_helper_test ==============
[22:40:12] ================= drm_format (18 subtests) =================
[22:40:12] [PASSED] drm_test_format_block_width_invalid
[22:40:12] [PASSED] drm_test_format_block_width_one_plane
[22:40:12] [PASSED] drm_test_format_block_width_two_plane
[22:40:12] [PASSED] drm_test_format_block_width_three_plane
[22:40:12] [PASSED] drm_test_format_block_width_tiled
[22:40:12] [PASSED] drm_test_format_block_height_invalid
[22:40:12] [PASSED] drm_test_format_block_height_one_plane
[22:40:12] [PASSED] drm_test_format_block_height_two_plane
[22:40:12] [PASSED] drm_test_format_block_height_three_plane
[22:40:12] [PASSED] drm_test_format_block_height_tiled
[22:40:12] [PASSED] drm_test_format_min_pitch_invalid
[22:40:12] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:40:12] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:40:12] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:40:12] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:40:12] [PASSED] drm_test_format_min_pitch_two_plane
[22:40:12] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:40:12] [PASSED] drm_test_format_min_pitch_tiled
[22:40:12] =================== [PASSED] drm_format ====================
[22:40:12] ============== drm_framebuffer (10 subtests) ===============
[22:40:12] ========== drm_test_framebuffer_check_src_coords  ==========
[22:40:12] [PASSED] Success: source fits into fb
[22:40:12] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:40:12] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:40:12] [PASSED] Fail: overflowing fb with source width
[22:40:12] [PASSED] Fail: overflowing fb with source height
[22:40:12] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:40:12] [PASSED] drm_test_framebuffer_cleanup
[22:40:12] =============== drm_test_framebuffer_create  ===============
[22:40:12] [PASSED] ABGR8888 normal sizes
[22:40:12] [PASSED] ABGR8888 max sizes
[22:40:12] [PASSED] ABGR8888 pitch greater than min required
[22:40:12] [PASSED] ABGR8888 pitch less than min required
[22:40:12] [PASSED] ABGR8888 Invalid width
[22:40:12] [PASSED] ABGR8888 Invalid buffer handle
[22:40:12] [PASSED] No pixel format
[22:40:12] [PASSED] ABGR8888 Width 0
[22:40:12] [PASSED] ABGR8888 Height 0
[22:40:12] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:40:12] [PASSED] ABGR8888 Large buffer offset
[22:40:12] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:40:12] [PASSED] ABGR8888 Invalid flag
[22:40:12] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:40:12] [PASSED] ABGR8888 Valid buffer modifier
[22:40:12] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:40:12] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:40:12] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:40:12] [PASSED] NV12 Normal sizes
[22:40:12] [PASSED] NV12 Max sizes
[22:40:12] [PASSED] NV12 Invalid pitch
[22:40:12] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:40:12] [PASSED] NV12 different  modifier per-plane
[22:40:12] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:40:12] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:40:12] [PASSED] NV12 Modifier for inexistent plane
[22:40:12] [PASSED] NV12 Handle for inexistent plane
[22:40:12] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:40:12] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:40:12] [PASSED] YVU420 Normal sizes
[22:40:12] [PASSED] YVU420 Max sizes
[22:40:12] [PASSED] YVU420 Invalid pitch
[22:40:12] [PASSED] YVU420 Different pitches
[22:40:12] [PASSED] YVU420 Different buffer offsets/pitches
[22:40:12] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:40:12] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:40:12] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:40:12] [PASSED] YVU420 Valid modifier
[22:40:12] [PASSED] YVU420 Different modifiers per plane
[22:40:12] [PASSED] YVU420 Modifier for inexistent plane
[22:40:12] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:40:12] [PASSED] X0L2 Normal sizes
[22:40:12] [PASSED] X0L2 Max sizes
[22:40:12] [PASSED] X0L2 Invalid pitch
[22:40:12] [PASSED] X0L2 Pitch greater than minimum required
[22:40:12] [PASSED] X0L2 Handle for inexistent plane
[22:40:12] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:40:12] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:40:12] [PASSED] X0L2 Valid modifier
[22:40:12] [PASSED] X0L2 Modifier for inexistent plane
[22:40:12] =========== [PASSED] drm_test_framebuffer_create ===========
[22:40:12] [PASSED] drm_test_framebuffer_free
[22:40:12] [PASSED] drm_test_framebuffer_init
[22:40:12] [PASSED] drm_test_framebuffer_init_bad_format
[22:40:12] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:40:12] [PASSED] drm_test_framebuffer_lookup
[22:40:12] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:40:12] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:40:12] ================= [PASSED] drm_framebuffer =================
[22:40:12] ================ drm_gem_shmem (8 subtests) ================
[22:40:12] [PASSED] drm_gem_shmem_test_obj_create
[22:40:12] [PASSED] drm_gem_shmem_test_obj_create_private
[22:40:12] [PASSED] drm_gem_shmem_test_pin_pages
[22:40:12] [PASSED] drm_gem_shmem_test_vmap
[22:40:12] [PASSED] drm_gem_shmem_test_get_sg_table
[22:40:12] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:40:12] [PASSED] drm_gem_shmem_test_madvise
[22:40:12] [PASSED] drm_gem_shmem_test_purge
[22:40:12] ================== [PASSED] drm_gem_shmem ==================
[22:40:12] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:40:12] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[22:40:12] [PASSED] Automatic
[22:40:12] [PASSED] Full
[22:40:12] [PASSED] Limited 16:235
[22:40:12] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:40:12] [PASSED] drm_test_check_disable_connector
[22:40:12] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:40:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:40:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:40:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:40:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:40:12] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:40:12] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:40:12] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:40:12] [PASSED] drm_test_check_output_bpc_dvi
[22:40:12] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:40:12] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:40:12] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:40:12] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:40:12] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:40:12] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:40:12] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:40:12] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:40:12] ============ drm_test_check_hdmi_color_format  =============
[22:40:12] [PASSED] AUTO -> RGB
[22:40:12] [PASSED] YCBCR422 -> YUV422
[22:40:12] [PASSED] YCBCR420 -> YUV420
[22:40:12] [PASSED] YCBCR444 -> YUV444
[22:40:12] [PASSED] RGB -> RGB
[22:40:12] ======== [PASSED] drm_test_check_hdmi_color_format =========
[22:40:12] ======== drm_test_check_hdmi_color_format_420_only  ========
[22:40:12] [PASSED] RGB should fail
[22:40:12] [PASSED] YUV444 should fail
[22:40:12] [PASSED] YUV422 should fail
[22:40:12] [PASSED] YUV420 should work
[22:40:12] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[22:40:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:40:12] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:40:12] [PASSED] drm_test_check_broadcast_rgb_value
[22:40:12] [PASSED] drm_test_check_bpc_8_value
[22:40:12] [PASSED] drm_test_check_bpc_10_value
[22:40:12] [PASSED] drm_test_check_bpc_12_value
[22:40:12] [PASSED] drm_test_check_format_value
[22:40:12] [PASSED] drm_test_check_tmds_char_value
[22:40:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:40:12] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[22:40:12] [PASSED] drm_test_check_mode_valid
[22:40:12] [PASSED] drm_test_check_mode_valid_reject
[22:40:12] [PASSED] drm_test_check_mode_valid_reject_rate
[22:40:12] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:40:12] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[22:40:12] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[22:40:12] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[22:40:12] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:40:12] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:40:12] [PASSED] drm_test_check_infoframes
[22:40:12] [PASSED] drm_test_check_reject_avi_infoframe
[22:40:12] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:40:12] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:40:12] [PASSED] drm_test_check_reject_audio_infoframe
[22:40:12] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:40:12] ================= drm_managed (2 subtests) =================
[22:40:12] [PASSED] drm_test_managed_release_action
[22:40:12] [PASSED] drm_test_managed_run_action
[22:40:12] =================== [PASSED] drm_managed ===================
[22:40:12] =================== drm_mm (6 subtests) ====================
[22:40:12] [PASSED] drm_test_mm_init
[22:40:12] [PASSED] drm_test_mm_debug
[22:40:12] [PASSED] drm_test_mm_align32
[22:40:12] [PASSED] drm_test_mm_align64
[22:40:12] [PASSED] drm_test_mm_lowest
[22:40:12] [PASSED] drm_test_mm_highest
[22:40:12] ===================== [PASSED] drm_mm ======================
[22:40:12] ============= drm_modes_analog_tv (5 subtests) =============
[22:40:12] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:40:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:40:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:40:12] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:40:12] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:40:12] =============== [PASSED] drm_modes_analog_tv ===============
[22:40:12] ============== drm_plane_helper (2 subtests) ===============
[22:40:12] =============== drm_test_check_plane_state  ================
[22:40:12] [PASSED] clipping_simple
[22:40:12] [PASSED] clipping_rotate_reflect
[22:40:12] [PASSED] positioning_simple
[22:40:12] [PASSED] upscaling
[22:40:12] [PASSED] downscaling
[22:40:12] [PASSED] rounding1
[22:40:12] [PASSED] rounding2
[22:40:12] [PASSED] rounding3
[22:40:12] [PASSED] rounding4
[22:40:12] =========== [PASSED] drm_test_check_plane_state ============
[22:40:12] =========== drm_test_check_invalid_plane_state  ============
[22:40:12] [PASSED] positioning_invalid
[22:40:12] [PASSED] upscaling_invalid
[22:40:12] [PASSED] downscaling_invalid
[22:40:12] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:40:12] ================ [PASSED] drm_plane_helper =================
[22:40:12] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:40:12] ====== drm_test_connector_helper_tv_get_modes_check  =======
[22:40:12] [PASSED] None
[22:40:12] [PASSED] PAL
[22:40:12] [PASSED] NTSC
[22:40:12] [PASSED] Both, NTSC Default
[22:40:12] [PASSED] Both, PAL Default
[22:40:12] [PASSED] Both, NTSC Default, with PAL on command-line
[22:40:12] [PASSED] Both, PAL Default, with NTSC on command-line
[22:40:12] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:40:12] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:40:12] ================== drm_rect (9 subtests) ===================
[22:40:12] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:40:12] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:40:12] [PASSED] drm_test_rect_clip_scaled_clipped
[22:40:12] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:40:12] ================= drm_test_rect_intersect  =================
[22:40:12] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:40:12] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:40:12] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:40:12] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:40:12] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:40:12] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:40:12] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:40:12] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:40:12] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:40:12] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:40:12] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:40:12] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:40:12] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:40:12] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:40:12] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:40:12] ============= [PASSED] drm_test_rect_intersect =============
[22:40:12] ================ drm_test_rect_calc_hscale  ================
[22:40:12] [PASSED] normal use
[22:40:12] [PASSED] out of max range
[22:40:12] [PASSED] out of min range
[22:40:12] [PASSED] zero dst
[22:40:12] [PASSED] negative src
[22:40:12] [PASSED] negative dst
[22:40:12] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:40:12] ================ drm_test_rect_calc_vscale  ================
[22:40:12] [PASSED] normal use
[22:40:12] [PASSED] out of max range
[22:40:12] [PASSED] out of min range
[22:40:12] [PASSED] zero dst
[22:40:12] [PASSED] negative src
[22:40:12] [PASSED] negative dst
[22:40:12] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:40:12] ================== drm_test_rect_rotate  ===================
[22:40:12] [PASSED] reflect-x
[22:40:12] [PASSED] reflect-y
[22:40:12] [PASSED] rotate-0
[22:40:12] [PASSED] rotate-90
[22:40:12] [PASSED] rotate-180
[22:40:12] [PASSED] rotate-270
[22:40:12] ============== [PASSED] drm_test_rect_rotate ===============
[22:40:12] ================ drm_test_rect_rotate_inv  =================
[22:40:12] [PASSED] reflect-x
[22:40:12] [PASSED] reflect-y
[22:40:12] [PASSED] rotate-0
[22:40:12] [PASSED] rotate-90
[22:40:12] [PASSED] rotate-180
[22:40:12] [PASSED] rotate-270
[22:40:12] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:40:12] ==================== [PASSED] drm_rect =====================
[22:40:12] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:40:12] ============ drm_test_sysfb_build_fourcc_list  =============
[22:40:12] [PASSED] no native formats
[22:40:12] [PASSED] XRGB8888 as native format
[22:40:12] [PASSED] remove duplicates
[22:40:12] [PASSED] convert alpha formats
[22:40:12] [PASSED] random formats
[22:40:12] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:40:12] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:40:12] ================== drm_fixp (2 subtests) ===================
[22:40:12] [PASSED] drm_test_int2fixp
[22:40:12] [PASSED] drm_test_sm2fixp
[22:40:12] ==================== [PASSED] drm_fixp =====================
[22:40:12] ============================================================
[22:40:12] Testing complete. Ran 641 tests: passed: 641
[22:40:12] Elapsed time: 26.750s total, 1.832s configuring, 24.754s building, 0.144s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:40:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:40:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:40:23] Starting KUnit Kernel (1/1)...
[22:40:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:40:23] ============= refcount_interrupt (4 subtests) ==============
[22:40:23] [PASSED] test_single_irq_change
[22:40:23] [PASSED] test_nested_irq_change
[22:40:23] [PASSED] test_multiple_irq_change
[22:40:23] [PASSED] test_irq_save
[22:40:23] =============== [PASSED] refcount_interrupt ================
[22:40:23] ================= ttm_device (5 subtests) ==================
[22:40:23] [PASSED] ttm_device_init_basic
[22:40:23] [PASSED] ttm_device_init_multiple
[22:40:23] [PASSED] ttm_device_fini_basic
[22:40:23] [PASSED] ttm_device_init_no_vma_man
[22:40:23] ================== ttm_device_init_pools  ==================
[22:40:23] [PASSED] No DMA allocations, no DMA32 required
[22:40:23] [PASSED] DMA allocations, DMA32 required
[22:40:23] [PASSED] No DMA allocations, DMA32 required
[22:40:23] [PASSED] DMA allocations, no DMA32 required
[22:40:23] ============== [PASSED] ttm_device_init_pools ==============
[22:40:23] =================== [PASSED] ttm_device ====================
[22:40:23] ================== ttm_pool (8 subtests) ===================
[22:40:23] ================== ttm_pool_alloc_basic  ===================
[22:40:23] [PASSED] One page
[22:40:23] [PASSED] More than one page
[22:40:23] [PASSED] Above the allocation limit
[22:40:23] [PASSED] One page, with coherent DMA mappings enabled
[22:40:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:40:23] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:40:23] ============== ttm_pool_alloc_basic_dma_addr  ==============
[22:40:23] [PASSED] One page
[22:40:23] [PASSED] More than one page
[22:40:23] [PASSED] Above the allocation limit
[22:40:23] [PASSED] One page, with coherent DMA mappings enabled
[22:40:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:40:23] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:40:23] [PASSED] ttm_pool_alloc_order_caching_match
[22:40:23] [PASSED] ttm_pool_alloc_caching_mismatch
[22:40:23] [PASSED] ttm_pool_alloc_order_mismatch
[22:40:23] [PASSED] ttm_pool_free_dma_alloc
[22:40:23] [PASSED] ttm_pool_free_no_dma_alloc
[22:40:23] [PASSED] ttm_pool_fini_basic
[22:40:23] ==================== [PASSED] ttm_pool =====================
[22:40:23] ================ ttm_resource (8 subtests) =================
[22:40:23] ================= ttm_resource_init_basic  =================
[22:40:23] [PASSED] Init resource in TTM_PL_SYSTEM
[22:40:23] [PASSED] Init resource in TTM_PL_VRAM
[22:40:23] [PASSED] Init resource in a private placement
[22:40:23] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:40:23] ============= [PASSED] ttm_resource_init_basic =============
[22:40:23] [PASSED] ttm_resource_init_pinned
[22:40:23] [PASSED] ttm_resource_fini_basic
[22:40:23] [PASSED] ttm_resource_manager_init_basic
[22:40:23] [PASSED] ttm_resource_manager_usage_basic
[22:40:23] [PASSED] ttm_resource_manager_set_used_basic
[22:40:23] [PASSED] ttm_sys_man_alloc_basic
[22:40:23] [PASSED] ttm_sys_man_free_basic
[22:40:23] ================== [PASSED] ttm_resource ===================
[22:40:23] =================== ttm_tt (15 subtests) ===================
[22:40:23] ==================== ttm_tt_init_basic  ====================
[22:40:23] [PASSED] Page-aligned size
[22:40:23] [PASSED] Extra pages requested
[22:40:23] ================ [PASSED] ttm_tt_init_basic ================
[22:40:23] [PASSED] ttm_tt_init_misaligned
[22:40:23] [PASSED] ttm_tt_fini_basic
[22:40:23] [PASSED] ttm_tt_fini_sg
[22:40:23] [PASSED] ttm_tt_fini_shmem
[22:40:23] [PASSED] ttm_tt_create_basic
[22:40:23] [PASSED] ttm_tt_create_invalid_bo_type
[22:40:23] [PASSED] ttm_tt_create_ttm_exists
[22:40:23] [PASSED] ttm_tt_create_failed
[22:40:23] [PASSED] ttm_tt_destroy_basic
[22:40:23] [PASSED] ttm_tt_populate_null_ttm
[22:40:23] [PASSED] ttm_tt_populate_populated_ttm
[22:40:23] [PASSED] ttm_tt_unpopulate_basic
[22:40:23] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:40:23] [PASSED] ttm_tt_swapin_basic
[22:40:23] ===================== [PASSED] ttm_tt ======================
[22:40:23] =================== ttm_bo (14 subtests) ===================
[22:40:23] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[22:40:23] [PASSED] Cannot be interrupted and sleeps
[22:40:23] [PASSED] Cannot be interrupted, locks straight away
[22:40:23] [PASSED] Can be interrupted, sleeps
[22:40:23] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:40:23] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:40:23] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:40:24] [PASSED] ttm_bo_reserve_double_resv
[22:40:24] [PASSED] ttm_bo_reserve_interrupted
[22:40:24] [PASSED] ttm_bo_reserve_deadlock
[22:40:24] [PASSED] ttm_bo_unreserve_basic
[22:40:24] [PASSED] ttm_bo_unreserve_pinned
[22:40:24] [PASSED] ttm_bo_unreserve_bulk
[22:40:24] [PASSED] ttm_bo_fini_basic
[22:40:24] [PASSED] ttm_bo_fini_shared_resv
[22:40:24] [PASSED] ttm_bo_pin_basic
[22:40:24] [PASSED] ttm_bo_pin_unpin_resource
[22:40:24] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:40:24] ===================== [PASSED] ttm_bo ======================
[22:40:24] ============== ttm_bo_validate (22 subtests) ===============
[22:40:24] ============== ttm_bo_init_reserved_sys_man  ===============
[22:40:24] [PASSED] Buffer object for userspace
[22:40:24] [PASSED] Kernel buffer object
[22:40:24] [PASSED] Shared buffer object
[22:40:24] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:40:24] ============== ttm_bo_init_reserved_mock_man  ==============
[22:40:24] [PASSED] Buffer object for userspace
[22:40:24] [PASSED] Kernel buffer object
[22:40:24] [PASSED] Shared buffer object
[22:40:24] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:40:24] [PASSED] ttm_bo_init_reserved_resv
[22:40:24] ================== ttm_bo_validate_basic  ==================
[22:40:24] [PASSED] Buffer object for userspace
[22:40:24] [PASSED] Kernel buffer object
[22:40:24] [PASSED] Shared buffer object
[22:40:24] ============== [PASSED] ttm_bo_validate_basic ==============
[22:40:24] [PASSED] ttm_bo_validate_invalid_placement
[22:40:24] ============= ttm_bo_validate_same_placement  ==============
[22:40:24] [PASSED] System manager
[22:40:24] [PASSED] VRAM manager
[22:40:24] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:40:24] [PASSED] ttm_bo_validate_failed_alloc
[22:40:24] [PASSED] ttm_bo_validate_pinned
[22:40:24] [PASSED] ttm_bo_validate_busy_placement
[22:40:24] ================ ttm_bo_validate_multihop  =================
[22:40:24] [PASSED] Buffer object for userspace
[22:40:24] [PASSED] Kernel buffer object
[22:40:24] [PASSED] Shared buffer object
[22:40:24] ============ [PASSED] ttm_bo_validate_multihop =============
[22:40:24] ========== ttm_bo_validate_no_placement_signaled  ==========
[22:40:24] [PASSED] Buffer object in system domain, no page vector
[22:40:24] [PASSED] Buffer object in system domain with an existing page vector
[22:40:24] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:40:24] ======== ttm_bo_validate_no_placement_not_signaled  ========
[22:40:24] [PASSED] Buffer object for userspace
[22:40:24] [PASSED] Kernel buffer object
[22:40:24] [PASSED] Shared buffer object
[22:40:24] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:40:24] [PASSED] ttm_bo_validate_move_fence_signaled
[22:40:24] ========= ttm_bo_validate_move_fence_not_signaled  =========
[22:40:24] [PASSED] Waits for GPU
[22:40:24] [PASSED] Tries to lock straight away
[22:40:24] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:40:24] [PASSED] ttm_bo_validate_swapout
[22:40:24] [PASSED] ttm_bo_validate_happy_evict
[22:40:24] [PASSED] ttm_bo_validate_all_pinned_evict
[22:40:24] [PASSED] ttm_bo_validate_allowed_only_evict
[22:40:24] [PASSED] ttm_bo_validate_deleted_evict
[22:40:24] [PASSED] ttm_bo_validate_busy_domain_evict
[22:40:24] [PASSED] ttm_bo_validate_evict_gutting
[22:40:24] [PASSED] ttm_bo_validate_recrusive_evict
[22:40:24] ================= [PASSED] ttm_bo_validate =================
[22:40:24] ============================================================
[22:40:24] Testing complete. Ran 106 tests: passed: 106
[22:40:24] Elapsed time: 11.779s total, 1.853s configuring, 9.712s building, 0.177s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[22:40:24] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:40:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:40:34] Starting KUnit Kernel (1/1)...
[22:40:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:40:34] ============= refcount_interrupt (4 subtests) ==============
[22:40:34] [PASSED] test_single_irq_change
[22:40:34] [PASSED] test_nested_irq_change
[22:40:34] [PASSED] test_multiple_irq_change
[22:40:34] [PASSED] test_irq_save
[22:40:34] =============== [PASSED] refcount_interrupt ================
[22:40:34] =============== dma-buf-fence (12 subtests) ================
[22:40:34] [PASSED] test_sanitycheck
[22:40:34] [PASSED] test_signaling
[22:40:34] [PASSED] test_add_callback
[22:40:34] [PASSED] test_late_add_callback
[22:40:34] [PASSED] test_rm_callback
[22:40:34] [PASSED] test_late_rm_callback
[22:40:34] [PASSED] test_status
[22:40:34] [PASSED] test_error
[22:40:34] [PASSED] test_wait
[22:40:34] [PASSED] test_wait_timeout
[22:40:34] [PASSED] test_stub
[22:40:34] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[22:40:34] ================== [PASSED] dma-buf-fence ==================
[22:40:34] ============ dma-buf-fence-chain (11 subtests) =============
[22:40:34] [PASSED] test_sanitycheck
[22:40:34] [PASSED] test_find_seqno
[22:40:34] [PASSED] test_find_signaled
[22:40:34] [PASSED] test_find_out_of_order
[22:40:39] [PASSED] test_find_gap
[22:40:39] [PASSED] test_find_race
[22:40:39] [PASSED] test_signal_forward
[22:40:39] [PASSED] test_signal_backward
[22:40:39] [PASSED] test_wait_forward
[22:40:39] [PASSED] test_wait_backward
[22:40:39] [PASSED] test_wait_random
[22:40:39] =============== [PASSED] dma-buf-fence-chain ===============
[22:40:39] ============ dma-buf-fence-unwrap (10 subtests) ============
[22:40:39] [PASSED] test_sanitycheck
[22:40:39] [PASSED] test_unwrap_array
[22:40:39] [PASSED] test_unwrap_chain
[22:40:39] [PASSED] test_unwrap_chain_array
[22:40:39] [PASSED] test_unwrap_merge
[22:40:39] [PASSED] test_unwrap_merge_duplicate
[22:40:39] [PASSED] test_unwrap_merge_seqno
[22:40:39] [PASSED] test_unwrap_merge_order
[22:40:39] [PASSED] test_unwrap_merge_complex
[22:40:39] [PASSED] test_unwrap_merge_complex_seqno
[22:40:39] ============== [PASSED] dma-buf-fence-unwrap ===============
[22:40:39] ================ dma-buf-resv (5 subtests) =================
[22:40:39] [PASSED] test_sanitycheck
[22:40:39] ===================== test_signaling  ======================
[22:40:39] [PASSED] kernel
[22:40:39] [PASSED] write
[22:40:39] [PASSED] read
[22:40:39] [PASSED] bookkeep
[22:40:39] ================= [PASSED] test_signaling ==================
[22:40:39] ====================== test_for_each  ======================
[22:40:39] [PASSED] kernel
[22:40:39] [PASSED] write
[22:40:39] [PASSED] read
[22:40:39] [PASSED] bookkeep
[22:40:39] ================== [PASSED] test_for_each ==================
[22:40:39] ================= test_for_each_unlocked  ==================
[22:40:39] [PASSED] kernel
[22:40:39] [PASSED] write
[22:40:39] [PASSED] read
[22:40:39] [PASSED] bookkeep
[22:40:39] ============= [PASSED] test_for_each_unlocked ==============
[22:40:39] ===================== test_get_fences  =====================
[22:40:39] [PASSED] kernel
[22:40:39] [PASSED] write
[22:40:39] [PASSED] read
[22:40:39] [PASSED] bookkeep
[22:40:39] ================= [PASSED] test_get_fences =================
[22:40:39] ================== [PASSED] dma-buf-resv ===================
[22:40:39] ============================================================
[22:40:39] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[22:40:40] Elapsed time: 15.800s total, 1.764s configuring, 8.715s building, 5.271s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1548 bytes --]

== Series Details ==

Series: drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums (rev4)
URL   : https://patchwork.freedesktop.org/series/173538/
State : success

== Summary ==

CI Bug Log - changes from xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0_BAT -> xe-pw-173538v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-173538v4_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-bmg-2:          [ABORT][1] ([Intel XE#8007]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html

  
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007


Build changes
-------------

  * Linux: xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0 -> xe-pw-173538v4

  IGT_9094: b72ca59712e9021e1a1a0a5a89ff5eb74982ad99 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0: 19d79b860b8d526661d2697b4abc21e262f614d0
  xe-pw-173538v4: 173538v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/index.html

[-- Attachment #2: Type: text/html, Size: 2113 bytes --]

✗ Xe.CI.FULL: failure for drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 49709 bytes --]

== Series Details ==

Series: drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums (rev4)
URL   : https://patchwork.freedesktop.org/series/173538/
State : failure

== Summary ==

CI Bug Log - changes from xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0_FULL -> xe-pw-173538v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-173538v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-173538v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-173538v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_gt_freq@freq_suspend:
    - shard-bmg:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-9/igt@xe_gt_freq@freq_suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-6/igt@xe_gt_freq@freq_suspend.html

  
Known issues
------------

  Here are the changes found in xe-pw-173538v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-bmg:          [PASS][3] -> [FAIL][4] ([Intel XE#3718] / [Intel XE#6078])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2:
    - shard-bmg:          [PASS][5] -> [FAIL][6] ([Intel XE#6078])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2327])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#7059] / [Intel XE#7085])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#1407]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#610] / [Intel XE#7387])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +4 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#1124]) +7 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#1477] / [Intel XE#7361])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#7679])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#367])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_bw@linear-tiling-1-displays-target-2160x1440p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2652]) +17 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [PASS][17] -> [INCOMPLETE][18] ([Intel XE#7084] / [Intel XE#8150]) +1 other test incomplete
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#3432]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#3432])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#2887]) +8 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2887]) +7 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2325] / [Intel XE#7358])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#306] / [Intel XE#7358])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#7358]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#373]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2252]) +4 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_content_protection@atomic-dpms-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#7642])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_content_protection@atomic-dpms-hdcp14.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#7642])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#6974]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][31] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2320]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-random-64x21:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#1424]) +2 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_cursor_crc@cursor-random-64x21.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#309] / [Intel XE#7343]) +2 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#1340] / [Intel XE#7435])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#4354] / [Intel XE#7386])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dsc@dsc-basic-ultrajoiner:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#8265]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_dsc@dsc-basic-ultrajoiner.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#8265]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#4156] / [Intel XE#7425])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@dsc:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#8586])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_feature_discovery@dsc.html

  * igt@kms_flip@2x-dpms-vs-vblank-race:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#1421]) +4 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_flip@2x-dpms-vs-vblank-race.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-bmg:          [PASS][43] -> [INCOMPLETE][44] ([Intel XE#2049] / [Intel XE#2597] / [Intel XE#8155]) +1 other test incomplete
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-4/igt@kms_flip@2x-flip-vs-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-6/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7178] / [Intel XE#7351])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#7179])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#352])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@drrs-modesetfrombusy:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#6312] / [Intel XE#651]) +7 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-modesetfrombusy.html

  * igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#7061]) +4 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#656] / [Intel XE#7905]) +22 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#4141]) +10 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2311]) +34 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#7061] / [Intel XE#7356])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#6312]) +8 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#7905]) +24 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#7399])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbchdr-tiling-y:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#7399])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_frontbuffer_tracking@fbchdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#7865]) +15 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2313]) +39 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_frontbuffer_tracking@psrhdr-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#7061]) +3 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-1/igt@kms_frontbuffer_tracking@psrhdr-abgr161616f-draw-blt.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#7308])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#1503])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#6912] / [Intel XE#7375])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#8303]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#7283]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#7283]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#2393])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-lnl:          NOTRUN -> [SKIP][70] ([Intel XE#4596] / [Intel XE#5854]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#5020] / [Intel XE#7348]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html

  * igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#8396]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_pm_dc@dc5-dpms-negative:
    - shard-lnl:          NOTRUN -> [SKIP][76] ([Intel XE#1131])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-1/igt@kms_pm_dc@dc5-dpms-negative.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#3309] / [Intel XE#7368])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@package-g7:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#6814] / [Intel XE#7428])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_pm_rpm@package-g7.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#1489]) +2 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#2387] / [Intel XE#7429])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-psr-basic:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_psr@fbc-psr-basic.html

  * igt@kms_psr@fbc-psr2-no-drrs@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345]) +1 other test skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@kms_psr@fbc-psr2-no-drrs@edp-1.html

  * igt@kms_psr@fbc-psr2-sprite-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][85] ([Intel XE#1406] / [Intel XE#7345]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_setmode@invalid-clone-single-crtc-stealing:
    - shard-lnl:          NOTRUN -> [SKIP][87] ([Intel XE#1435] / [Intel XE#9142])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@kms_setmode@invalid-clone-single-crtc-stealing.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-lnl:          NOTRUN -> [SKIP][88] ([Intel XE#362] / [Intel XE#5848])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-1/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flipline:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#1499])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_vrr@flipline.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#1499])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@xe_compute_preempt@compute-preempt-many-vram:
    - shard-lnl:          NOTRUN -> [SKIP][91] ([Intel XE#5191] / [Intel XE#7316] / [Intel XE#7346])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-1/igt@xe_compute_preempt@compute-preempt-many-vram.html

  * igt@xe_evict@evict-beng-cm-threads-small-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][92] ([Intel XE#6540] / [Intel XE#688]) +4 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_evict@evict-beng-cm-threads-small-multi-vm.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][93] ([Intel XE#6321] / [Intel XE#8355])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_balancer@many-parallel-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#7482]) +11 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_exec_balancer@many-parallel-userptr.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#2322] / [Intel XE#7372]) +4 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-no-exec-basic:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#1392]) +4 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-basic.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind-imm:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#8374]) +5 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind-imm.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#8374]) +8 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch.html

  * igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr:
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#9003])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][100] ([Intel XE#8364]) +16 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-dyn-priority-smem:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#8364]) +18 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_exec_multi_queue@two-queues-preempt-mode-dyn-priority-smem.html

  * igt@xe_exec_reset@cm-multi-queue-close-execqueues:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#8369])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_exec_reset@cm-multi-queue-close-execqueues.html

  * igt@xe_exec_reset@multi-queue-close-fd:
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#8369])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_exec_reset@multi-queue-close-fd.html

  * igt@xe_exec_threads@threads-multi-queue-fd-basic:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#8378]) +4 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_exec_threads@threads-multi-queue-fd-basic.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#8378]) +2 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-bmg:          [PASS][106] -> [ABORT][107] ([Intel XE#8007])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-10/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-7/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  * igt@xe_madvise@atomic-device:
    - shard-lnl:          NOTRUN -> [SKIP][108] ([Intel XE#7980])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_madvise@atomic-device.html

  * igt@xe_mempage_offline@inject-duplicate-page:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#9203])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_mempage_offline@inject-duplicate-page.html

  * igt@xe_multigpu_svm@mgpu-latency-copy-basic:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#6964]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_multigpu_svm@mgpu-latency-copy-basic.html

  * igt@xe_multigpu_svm@mgpu-latency-copy-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][111] ([Intel XE#6964]) +3 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_multigpu_svm@mgpu-latency-copy-prefetch.html

  * igt@xe_page_reclaim@pat-index-xd:
    - shard-lnl:          NOTRUN -> [SKIP][112] ([Intel XE#7793])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_page_reclaim@pat-index-xd.html

  * igt@xe_pat@pat-index-xelp:
    - shard-lnl:          NOTRUN -> [SKIP][113] ([Intel XE#7590] / [Intel XE#977])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_pat@pat-index-xelp.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_peer2peer@read.html

  * igt@xe_pm@d3cold-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][115] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_pm@d3cold-basic-exec.html

  * igt@xe_pm@d3cold-multiple-execs:
    - shard-bmg:          NOTRUN -> [SKIP][116] ([Intel XE#2284] / [Intel XE#7370])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@xe_pm@d3cold-multiple-execs.html

  * igt@xe_pm@s3-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#584] / [Intel XE#7369]) +1 other test skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_pm@s3-basic-exec.html

  * igt@xe_prefetch_fault@l2-prefetch-fault:
    - shard-bmg:          NOTRUN -> [SKIP][118] ([Intel XE#8815])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_prefetch_fault@l2-prefetch-fault.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#944]) +2 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-lnl:          NOTRUN -> [SKIP][120] ([Intel XE#944])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs:
    - shard-lnl:          NOTRUN -> [SKIP][121] ([Intel XE#4130] / [Intel XE#7366])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-3/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-lnl:          NOTRUN -> [SKIP][122] ([Intel XE#3342])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-8/igt@xe_sriov_flr@flr-vf1-clear.html

  * igt@xe_sriov_scheduling@equal-throughput-normal-priority:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#8339])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-1/igt@xe_sriov_scheduling@equal-throughput-normal-priority.html

  
#### Possible fixes ####

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-lnl:          [FAIL][124] ([Intel XE#8628]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-lnl-7/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-5/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-bmg:          [INCOMPLETE][126] ([Intel XE#2049] / [Intel XE#2597] / [Intel XE#8155]) -> [PASS][127] +1 other test pass
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][128] ([Intel XE#301]) -> [PASS][129] +2 other tests pass
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][130] ([Intel XE#1503]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-10/igt@kms_hdr@invalid-hdr.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-8/igt@kms_hdr@invalid-hdr.html

  * igt@xe_exec_reset@gt-stress-reset-concurrent-submit-sync:
    - shard-bmg:          [DMESG-WARN][132] ([Intel XE#8649] / [Intel XE#8652]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-6/igt@xe_exec_reset@gt-stress-reset-concurrent-submit-sync.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@xe_exec_reset@gt-stress-reset-concurrent-submit-sync.html

  * igt@xe_pm@d3hot-multiple-execs:
    - shard-bmg:          [TIMEOUT][134] -> [PASS][135]
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-7/igt@xe_pm@d3hot-multiple-execs.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-3/igt@xe_pm@d3hot-multiple-execs.html

  * igt@xe_pm@s3-mocs:
    - shard-bmg:          [INCOMPLETE][136] ([Intel XE#8175]) -> [PASS][137]
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-6/igt@xe_pm@s3-mocs.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_pm@s3-mocs.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][138] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][139] ([Intel XE#3544])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html

  * igt@xe_exec_reset@gt-reset-fault-injection:
    - shard-lnl:          [ABORT][140] ([Intel XE#9140] / [Intel XE#9145]) -> [DMESG-WARN][141] ([Intel XE#9130])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-lnl-8/igt@xe_exec_reset@gt-reset-fault-injection.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-lnl-1/igt@xe_exec_reset@gt-reset-fault-injection.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-bmg:          [ABORT][142] ([Intel XE#8007] / [Intel XE#8963]) -> [DMESG-WARN][143] ([Intel XE#8963])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0/shard-bmg-5/igt@xe_wedged@wedged-at-any-timeout.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/shard-bmg-9/igt@xe_wedged@wedged-at-any-timeout.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1131]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1131
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7316
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7346
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
  [Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7435
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7980]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7980
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155
  [Intel XE#8175]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8175
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8339
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8586
  [Intel XE#8628]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8628
  [Intel XE#8649]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8649
  [Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
  [Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9003]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9003
  [Intel XE#9130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9130
  [Intel XE#9140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9140
  [Intel XE#9142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9142
  [Intel XE#9145]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9145
  [Intel XE#9203]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9203
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977


Build changes
-------------

  * Linux: xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0 -> xe-pw-173538v4

  IGT_9094: b72ca59712e9021e1a1a0a5a89ff5eb74982ad99 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5746-19d79b860b8d526661d2697b4abc21e262f614d0: 19d79b860b8d526661d2697b4abc21e262f614d0
  xe-pw-173538v4: 173538v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173538v4/index.html

[-- Attachment #2: Type: text/html, Size: 55518 bytes --]

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Jani Nikula]

On Mon, 14 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
> and pick the correct helper according to the wait time and atomic.
> Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
> Avoid growing delays becoming intollerably large by capping the
> in-loop wait time.
>
> v4: - Simplify using poll_timeout_us and poll_timeout_us_atopmic and
>       update all callstack to never use a param for atomic (Jani)
> v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
> v2: - Fixed checkpatch failure.
>     - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
>       review). Fixed bug max range in usleep_range(Shasiko review)
>
> Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> Assisted-by: Github-Copilot:Claude-Sonnet-5-0
> ---
>  drivers/gpu/drm/xe/xe_device.c          |  10 +-
>  drivers/gpu/drm/xe/xe_eu_stall.c        |   4 +-
>  drivers/gpu/drm/xe/xe_force_wake.c      |   7 +-
>  drivers/gpu/drm/xe/xe_gsc.c             |   2 +-
>  drivers/gpu/drm/xe/xe_gsc_proxy.c       |   2 +-
>  drivers/gpu/drm/xe/xe_gt.c              |   2 +-
>  drivers/gpu/drm/xe/xe_gt_mcr.c          |   4 +-
>  drivers/gpu/drm/xe/xe_guc.c             |  10 +-
>  drivers/gpu/drm/xe/xe_huc.c             |   2 +-
>  drivers/gpu/drm/xe/xe_mmio.c            | 118 ++++++++++--------------
>  drivers/gpu/drm/xe/xe_mmio.h            |   8 +-
>  drivers/gpu/drm/xe/xe_oa.c              |   4 +-
>  drivers/gpu/drm/xe/xe_pcode.c           |   8 +-
>  drivers/gpu/drm/xe/xe_pxp.c             |   2 +-
>  drivers/gpu/drm/xe/xe_sysctrl_mailbox.c |   4 +-
>  drivers/gpu/drm/xe/xe_uc_fw.c           |   3 +-
>  16 files changed, 90 insertions(+), 100 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 205cb4e7f9e8..8fb044331e62 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -573,7 +573,7 @@ static void __xe_driver_flr(struct xe_device *xe)
>  	 * is still pending (unless the HW is totally dead), but better to be
>  	 * safe in case something unexpected happens
>  	 */
> -	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
> +	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL);
>  	if (ret) {
>  		drm_err(&xe->drm, "Driver-FLR-prepare wait for ready failed! %d\n", ret);
>  		return;
> @@ -584,7 +584,7 @@ static void __xe_driver_flr(struct xe_device *xe)
>  	xe_mmio_rmw32(mmio, GU_CNTL, 0, DRIVERFLR);
>  
>  	/* Wait for hardware teardown to complete */
> -	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL, false);
> +	ret = xe_mmio_wait32(mmio, GU_CNTL, DRIVERFLR, 0, flr_timeout, NULL);
>  	if (ret) {
>  		drm_err(&xe->drm, "Driver-FLR-teardown wait completion failed! %d\n", ret);
>  		return;
> @@ -592,7 +592,7 @@ static void __xe_driver_flr(struct xe_device *xe)
>  
>  	/* Wait for hardware/firmware re-init to complete */
>  	ret = xe_mmio_wait32(mmio, GU_DEBUG, DRIVERFLR_STATUS, DRIVERFLR_STATUS,
> -			     flr_timeout, NULL, false);
> +			     flr_timeout, NULL);
>  	if (ret) {
>  		drm_err(&xe->drm, "Driver-FLR-reinit wait completion failed! %d\n", ret);
>  		return;
> @@ -1168,7 +1168,7 @@ static void tdf_request_sync(struct xe_device *xe)
>  		 * transient and need to be flushed..
>  		 */
>  		if (xe_mmio_wait32(&gt->mmio, XE2_TDF_CTRL, TRANSIENT_FLUSH_REQUEST, 0,
> -				   300, NULL, false))
> +					    300, NULL))
>  			xe_gt_err_once(gt, "TD flush timeout\n");
>  	}
>  }
> @@ -1214,7 +1214,7 @@ void xe_device_l2_flush(struct xe_device *xe, bool force)
>  	spin_lock(&gt->global_invl_lock);
>  
>  	xe_mmio_write32(&gt->mmio, XE2_GLOBAL_INVAL, 0x1);
> -	if (xe_mmio_wait32(&gt->mmio, XE2_GLOBAL_INVAL, 0x1, 0x0, 1000, NULL, true))
> +	if (xe_mmio_wait32_atomic(&gt->mmio, XE2_GLOBAL_INVAL, 0x1, 0x0, 1000, NULL))
>  		xe_gt_err_once(gt, "Global invalidation timeout\n");
>  
>  	spin_unlock(&gt->global_invl_lock);
> diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
> index 8a7c1b5d5ab9..865e08b75c29 100644
> --- a/drivers/gpu/drm/xe/xe_eu_stall.c
> +++ b/drivers/gpu/drm/xe/xe_eu_stall.c
> @@ -707,7 +707,7 @@ static int xe_eu_stall_stream_enable(struct xe_eu_stall_data_stream *stream)
>  		/* Request the firmware to apply the workaround and wait for an ACK */
>  		xe_mmio_write32(&gt->mmio, SWF_SCRATCHPAD(0), REQ_EUSTALL_ENABLE);
>  		ret = xe_mmio_wait32(&gt->mmio, SWF_SCRATCHPAD(0), SWF_EUSTALL_MASK,
> -				     ACK_EUSTALL_ENABLE, FW_WA_WAIT_TIMEOUT_US, NULL, false);
> +					     ACK_EUSTALL_ENABLE, FW_WA_WAIT_TIMEOUT_US, NULL);
>  		if (ret) {
>  			xe_gt_err(gt, "Timeout polling for EU stall enable ACK from firmware\n");
>  			xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);
> @@ -880,7 +880,7 @@ static int xe_eu_stall_disable_locked(struct xe_eu_stall_data_stream *stream)
>  		/* Request the firmware to revert the workaround and wait for an ACK */
>  		xe_mmio_write32(&gt->mmio, SWF_SCRATCHPAD(0), REQ_EUSTALL_DISABLE);
>  		ret = xe_mmio_wait32(&gt->mmio, SWF_SCRATCHPAD(0), SWF_EUSTALL_MASK,
> -				     ACK_EUSTALL_DISABLE, FW_WA_WAIT_TIMEOUT_US, NULL, false);
> +					     ACK_EUSTALL_DISABLE, FW_WA_WAIT_TIMEOUT_US, NULL);
>  		if (ret)
>  			xe_gt_err(gt, "Timeout polling for EU stall disable ACK from firmware\n");
>  	}
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 197e2197bd0a..12ab0304509c 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -109,9 +109,10 @@ static int __domain_wait(struct xe_gt *gt, struct xe_force_wake_domain *domain,
>  	if (IS_SRIOV_VF(gt_to_xe(gt)))
>  		return 0;
>  
> -	ret = xe_mmio_wait32(&gt->mmio, domain->reg_ack, domain->val, wake ? domain->val : 0,
> -			     XE_FORCE_WAKE_ACK_TIMEOUT_MS * USEC_PER_MSEC,
> -			     &value, true);
> +	ret = xe_mmio_wait32_atomic(&gt->mmio, domain->reg_ack, domain->val,
> +				    wake ? domain->val : 0,
> +				    XE_FORCE_WAKE_ACK_TIMEOUT_MS * USEC_PER_MSEC,
> +				    &value);
>  	if (ret)
>  		xe_gt_err(gt, "Force wake domain %d failed to ack %s (%pe) reg[%#x] = %#x\n",
>  			  domain->id, str_wake_sleep(wake), ERR_PTR(ret),
> diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
> index 524ac56bdcc7..a43d3739d213 100644
> --- a/drivers/gpu/drm/xe/xe_gsc.c
> +++ b/drivers/gpu/drm/xe/xe_gsc.c
> @@ -196,7 +196,7 @@ static int gsc_fw_wait(struct xe_gt *gt)
>  	return xe_mmio_wait32(&gt->mmio, HECI_FWSTS1(MTL_GSC_HECI1_BASE),
>  			      HECI1_FWSTS1_INIT_COMPLETE,
>  			      HECI1_FWSTS1_INIT_COMPLETE,
> -			      500 * USEC_PER_MSEC, NULL, false);
> +			   500 * USEC_PER_MSEC, NULL);
>  }
>  
>  static int gsc_upload(struct xe_gsc *gsc)
> diff --git a/drivers/gpu/drm/xe/xe_gsc_proxy.c b/drivers/gpu/drm/xe/xe_gsc_proxy.c
> index 707db650a2ae..63f72ca28ed4 100644
> --- a/drivers/gpu/drm/xe/xe_gsc_proxy.c
> +++ b/drivers/gpu/drm/xe/xe_gsc_proxy.c
> @@ -80,7 +80,7 @@ int xe_gsc_wait_for_proxy_init_done(struct xe_gsc *gsc)
>  	return xe_mmio_wait32(&gt->mmio, HECI_FWSTS1(MTL_GSC_HECI1_BASE),
>  			      HECI1_FWSTS1_CURRENT_STATE,
>  			      HECI1_FWSTS1_PROXY_STATE_NORMAL,
> -			      USEC_PER_SEC, NULL, false);
> +			   USEC_PER_SEC, NULL);
>  }
>  
>  static void __gsc_proxy_irq_rmw(struct xe_gsc *gsc, u32 clr, u32 set)
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 775c826b68b4..9edcc54ad4bf 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -832,7 +832,7 @@ static int do_gt_reset(struct xe_gt *gt)
>  	xe_mmio_write32(&gt->mmio, GDRST, GRDOM_FULL);
>  	err = xe_mmio_wait32(&gt->mmio, GDRST, GRDOM_FULL, 0,
>  			     GRDOM_RESET_TIMEOUT_MS * USEC_PER_MSEC,
> -			     NULL, false);
> +			   NULL);
>  	if (err)
>  		xe_log_err(gt, GT, err,
>  			   "full graphics reset not completed in %u ms\n",
> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
> index 1949bf7d370a..a08585f082d3 100644
> --- a/drivers/gpu/drm/xe/xe_gt_mcr.c
> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
> @@ -711,8 +711,8 @@ static void mcr_lock(struct xe_gt *gt) __acquires(&gt->mcr_lock)
>  	 * when a read to the relevant register returns 1.
>  	 */
>  	if (GRAPHICS_VERx100(xe) >= 1270)
> -		ret = xe_mmio_wait32(&gt->mmio, STEER_SEMAPHORE, 0x1, 0x1, 10, NULL,
> -				     true);
> +		ret = xe_mmio_wait32_atomic(&gt->mmio, STEER_SEMAPHORE, 0x1, 0x1, 10,
> +					    NULL);
>  
>  	xe_gt_WARN_ON_ONCE(gt, ret == -ETIMEDOUT);
>  }
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index c7f8bbd4cb92..670140e1aa36 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -967,13 +967,13 @@ static void guc_prevent_fw_dma_failure_on_reset(struct xe_guc *guc)
>  
>  	ret = xe_mmio_wait32(&gt->mmio, GUC_STATUS, GS_UKERNEL_MASK,
>  			     FIELD_PREP(GS_UKERNEL_MASK, XE_GUC_LOAD_STATUS_READY),
> -			     100000, &guc_status, false);
> +				      100000, &guc_status);
>  	if (ret)
>  		xe_gt_warn(gt, "GuC not ready after disabling idle flow (GUC_STATUS: 0x%x)\n",
>  			   guc_status);
>  
>  	ret = xe_mmio_wait32(&gt->mmio, GUC_SRAM_STATUS, GUC_SRAM_HANDLING_MASK,
> -			     0, 5000, &sram_status, false);
> +				      0, 5000, &sram_status);
>  	if (ret)
>  		xe_gt_warn(gt, "SRAM handling not complete (GUC_SRAM_STATUS: 0x%x)\n",
>  			   sram_status);
> @@ -996,7 +996,7 @@ int xe_guc_reset(struct xe_guc *guc)
>  
>  	xe_mmio_write32(mmio, GDRST, GRDOM_GUC);
>  
> -	ret = xe_mmio_wait32(mmio, GDRST, GRDOM_GUC, 0, 5000, &gdrst, false);
> +	ret = xe_mmio_wait32(mmio, GDRST, GRDOM_GUC, 0, 5000, &gdrst);
>  	if (ret) {
>  		xe_gt_err(gt, "GuC reset timed out, GDRST=%#x\n", gdrst);
>  		goto err_out;
> @@ -1538,7 +1538,7 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request,
>  
>  	ret = xe_mmio_wait32(mmio, reply_reg, GUC_HXG_MSG_0_ORIGIN,
>  			     FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_GUC),
> -			     50000, &header, false);
> +				     50000, &header);
>  	if (ret) {
>  		/* scratch registers might be cleared during FLR, try once more */
>  		if (!header) {
> @@ -1574,7 +1574,7 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request,
>  		BUILD_BUG_ON((GUC_HXG_TYPE_RESPONSE_SUCCESS ^ GUC_HXG_TYPE_RESPONSE_FAILURE) != 1);
>  
>  		ret = xe_mmio_wait32(mmio, reply_reg, resp_mask, resp_mask,
> -				     2000000, &header, false);
> +					     2000000, &header);
>  
>  		if (unlikely(FIELD_GET(GUC_HXG_MSG_0_ORIGIN, header) !=
>  			     GUC_HXG_ORIGIN_GUC))
> diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
> index 57afe21444b1..3517bba09399 100644
> --- a/drivers/gpu/drm/xe/xe_huc.c
> +++ b/drivers/gpu/drm/xe/xe_huc.c
> @@ -272,7 +272,7 @@ int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type)
>  	}
>  
>  	ret = xe_mmio_wait32(&gt->mmio, huc_auth_modes[type].reg, huc_auth_modes[type].val,
> -			     huc_auth_modes[type].val, 100000, NULL, false);
> +			     huc_auth_modes[type].val, 100000, NULL);
>  	if (ret) {
>  		xe_gt_err(gt, "HuC: firmware not verified: %pe\n", ERR_PTR(ret));
>  		goto fail;
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a2..fc0509aa384b 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -5,8 +5,8 @@
>  
>  #include "xe_mmio.h"
>  
> -#include <linux/delay.h>
>  #include <linux/io-64-nonatomic-lo-hi.h>
> +#include <linux/iopoll.h>
>  #include <linux/minmax.h>
>  #include <linux/pci.h>
>  
> @@ -320,82 +320,44 @@ u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)
>  	return (u64)udw << 32 | ldw;
>  }
>  
> -static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
> -			    u32 timeout_us, u32 *out_val, bool atomic, bool expect_match)
> -{
> -	ktime_t cur = ktime_get_raw();
> -	const ktime_t end = ktime_add_us(cur, timeout_us);
> -	int ret = -ETIMEDOUT;
> -	s64 wait = 10;
> -	u32 read;
> -	bool check;
> -
> -	for (;;) {
> -		read = xe_mmio_read32(mmio, reg);
> -
> -		check = (read & mask) == val;
> -		if (!expect_match)
> -			check = !check;
> -
> -		if (check) {
> -			ret = 0;
> -			break;
> -		}
> -
> -		cur = ktime_get_raw();
> -		if (!ktime_before(cur, end))
> -			break;
> -
> -		if (ktime_after(ktime_add_us(cur, wait), end))
> -			wait = ktime_us_delta(end, cur);
> -
> -		if (atomic)
> -			udelay(wait);
> -		else
> -			usleep_range(wait, wait << 1);
> -		wait <<= 1;
> -	}
> -
> -	if (ret != 0) {
> -		read = xe_mmio_read32(mmio, reg);
> -
> -		check = (read & mask) == val;
> -		if (!expect_match)
> -			check = !check;
> -
> -		if (check)
> -			ret = 0;
> -	}
> -
> -	if (out_val)
> -		*out_val = read;
> -
> -	return ret;
> -}
> -
>  /**
>   * xe_mmio_wait32() - Wait for a register to match the desired masked value
>   * @mmio: MMIO target
>   * @reg: register to read value from
>   * @mask: mask to be applied to the value read from the register
>   * @val: desired value after applying the mask
> - * @timeout_us: time out after this period of time. Wait logic tries to be
> - * smart, applying an exponential backoff until @timeout_us is reached.
> + * @timeout_us: time out after this period of time
>   * @out_val: if not NULL, points where to store the last unmasked value
> - * @atomic: needs to be true if calling from an atomic context
>   *
>   * This function polls for the desired masked value and returns zero on success
>   * or -ETIMEDOUT if timed out.
> - *
> - * Note that @timeout_us represents the minimum amount of time to wait before
> - * giving up. The actual time taken by this function can be a little more than
> - * @timeout_us for different reasons, specially in non-atomic contexts. Thus,
> - * it is possible that this function succeeds even after @timeout_us has passed.
>   */
>  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> -		   u32 *out_val, bool atomic)
> +		   u32 *out_val)
>  {
> -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
> +	u32 read;
> +	int ret;
> +
> +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> +			      10, timeout_us, false);

You probably do need to let the callers pass in the wait too. 10 us wait
with a long timeout is going to be pretty bad.

> +	if (out_val)
> +		*out_val = read;
> +
> +	return ret;
> +}
> +
> +int xe_mmio_wait32_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
> +			  u32 timeout_us, u32 *out_val)
> +{
> +	u32 read;
> +	int ret;
> +
> +	ret = poll_timeout_us_atomic(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> +				     10, timeout_us, false);
> +	if (out_val)
> +		*out_val = read;
> +
> +	return ret;
>  }
>  
>  /**
> @@ -406,15 +368,35 @@ int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u
>   * @val: value not to be matched after applying the mask
>   * @timeout_us: time out after this period of time
>   * @out_val: if not NULL, points where to store the last unmasked value
> - * @atomic: needs to be true if calling from an atomic context
> - *
>   * This function works exactly like xe_mmio_wait32() with the exception that
>   * @val is expected not to be matched.
>   */
>  int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> -		       u32 *out_val, bool atomic)
> +		       u32 *out_val)
>  {
> -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, false);
> +	u32 read;
> +	int ret;
> +
> +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) != val,
> +			      10, timeout_us, false);
> +	if (out_val)
> +		*out_val = read;
> +
> +	return ret;
> +}
> +
> +int xe_mmio_wait32_not_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
> +			      u32 timeout_us, u32 *out_val)
> +{
> +	u32 read;
> +	int ret;
> +
> +	ret = poll_timeout_us_atomic(read = xe_mmio_read32(mmio, reg), (read & mask) != val,
> +				     10, timeout_us, false);
> +	if (out_val)
> +		*out_val = read;
> +
> +	return ret;
>  }
>  
>  #ifdef CONFIG_PCI_IOV
> diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
> index befe021f2215..6391f0fd6507 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.h
> +++ b/drivers/gpu/drm/xe/xe_mmio.h
> @@ -27,9 +27,13 @@ bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *ra
>  
>  u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
>  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
> -		   u32 timeout_us, u32 *out_val, bool atomic);
> +		   u32 timeout_us, u32 *out_val);
> +int xe_mmio_wait32_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
> +			  u32 timeout_us, u32 *out_val);
>  int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
> -		       u32 val, u32 timeout_us, u32 *out_val, bool atomic);
> +		       u32 val, u32 timeout_us, u32 *out_val);
> +int xe_mmio_wait32_not_atomic(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
> +			      u32 val, u32 timeout_us, u32 *out_val);
>  
>  static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
> index a3484e943c55..98a6f57701e4 100644
> --- a/drivers/gpu/drm/xe/xe_oa.c
> +++ b/drivers/gpu/drm/xe/xe_oa.c
> @@ -513,14 +513,14 @@ static void xe_oa_disable(struct xe_oa_stream *stream)
>  
>  	xe_mmio_rmw32(mmio, __oa_regs(stream)->oa_ctrl, __oactrl_used_bits(stream), 0);
>  	if (xe_mmio_wait32(mmio, __oa_regs(stream)->oa_ctrl,
> -			   OAG_OACONTROL_OA_COUNTER_ENABLE, 0, 50000, NULL, false))
> +			   OAG_OACONTROL_OA_COUNTER_ENABLE, 0, 50000, NULL))
>  		drm_err(&stream->oa->xe->drm,
>  			"wait for OA to be disabled timed out\n");
>  
>  	if (GRAPHICS_VERx100(stream->oa->xe) <= 1270 && GRAPHICS_VERx100(stream->oa->xe) != 1260) {
>  		/* <= XE_METEORLAKE except XE_PVC */
>  		xe_mmio_write32(mmio, OA_TLB_INV_CR, 1);
> -		if (xe_mmio_wait32(mmio, OA_TLB_INV_CR, 1, 0, 50000, NULL, false))
> +		if (xe_mmio_wait32(mmio, OA_TLB_INV_CR, 1, 0, 50000, NULL))
>  			drm_err(&stream->oa->xe->drm,
>  				"wait for OA tlb invalidate timed out\n");
>  	}
> diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c
> index 266deecbb100..9b3487c8b07a 100644
> --- a/drivers/gpu/drm/xe/xe_pcode.c
> +++ b/drivers/gpu/drm/xe/xe_pcode.c
> @@ -87,8 +87,12 @@ static int __pcode_mailbox_rw(struct xe_tile *tile, u32 mbox, u32 *data0, u32 *d
>  	xe_mmio_write32(mmio, PCODE_DATA1, data1 ? *data1 : 0);
>  	xe_mmio_write32(mmio, PCODE_MAILBOX, PCODE_READY | mbox);
>  
> -	err = xe_mmio_wait32(mmio, PCODE_MAILBOX, PCODE_READY, 0,
> -			     timeout_ms * USEC_PER_MSEC, NULL, atomic);
> +	if (atomic)
> +		err = xe_mmio_wait32_atomic(mmio, PCODE_MAILBOX, PCODE_READY, 0,
> +					    timeout_ms * USEC_PER_MSEC, NULL);
> +	else
> +		err = xe_mmio_wait32(mmio, PCODE_MAILBOX, PCODE_READY, 0,
> +				     timeout_ms * USEC_PER_MSEC, NULL);
>  	if (err)
>  		return err;
>  
> diff --git a/drivers/gpu/drm/xe/xe_pxp.c b/drivers/gpu/drm/xe/xe_pxp.c
> index 2fef274a585e..d6b820c47c09 100644
> --- a/drivers/gpu/drm/xe/xe_pxp.c
> +++ b/drivers/gpu/drm/xe/xe_pxp.c
> @@ -136,7 +136,7 @@ static int pxp_wait_for_session_state(struct xe_pxp *pxp, u32 id, bool in_play)
>  	u32 mask = BIT(id);
>  
>  	return xe_mmio_wait32(&gt->mmio, KCR_SIP, mask, in_play ? mask : 0,
> -			      250, NULL, false);
> +			   250, NULL);
>  }
>  
>  static void pxp_invalidate_queues(struct xe_pxp *pxp);
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> index 72baf1aa4b3a..269ec70aa22a 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> @@ -40,7 +40,7 @@ static bool sysctrl_wait_bit_clear(struct xe_sysctrl *sc, u32 bit_mask,
>  	int ret;
>  
>  	ret = xe_mmio_wait32_not(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask,
> -				 timeout_ms * 1000, NULL, false);
> +				   timeout_ms * 1000, NULL);
>  
>  	return ret == 0;
>  }
> @@ -51,7 +51,7 @@ static bool sysctrl_wait_bit_set(struct xe_sysctrl *sc, u32 bit_mask,
>  	int ret;
>  
>  	ret = xe_mmio_wait32(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask,
> -			     timeout_ms * 1000, NULL, false);
> +			     timeout_ms * 1000, NULL);
>  
>  	return ret == 0;
>  }
> diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
> index e29878b255ba..8fa8a02f73bc 100644
> --- a/drivers/gpu/drm/xe/xe_uc_fw.c
> +++ b/drivers/gpu/drm/xe/xe_uc_fw.c
> @@ -899,8 +899,7 @@ static int uc_fw_xfer(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags)
>  			REG_MASKED_FIELD_ENABLE(dma_flags | START_DMA));
>  
>  	/* Wait for DMA to finish */
> -	ret = xe_mmio_wait32(mmio, DMA_CTRL, START_DMA, 0, 100000, &dma_ctrl,
> -			     false);
> +	ret = xe_mmio_wait32(mmio, DMA_CTRL, START_DMA, 0, 100000, &dma_ctrl);
>  	if (ret)
>  		drm_err(&xe->drm, "DMA for %s fw failed, DMA_CTRL=%u\n",
>  			xe_uc_fw_type_repr(uc_fw->type), dma_ctrl);

-- 
Jani Nikula, Intel

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Teres Alexis, Alan Previn]

On Tue, 2026-09-15 at 10:34 +0300, Nikula, Jani wrote:
> On Mon, 14 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
alan:snip
> >  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> > -		   u32 *out_val, bool atomic)
> > +		   u32 *out_val)
> >  {
> > -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
> > +	u32 read;
> > +	int ret;
> > +
> > +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> > +			      10, timeout_us, false);
> 
> You probably do need to let the callers pass in the wait too. 10 us wait
> with a long timeout is going to be pretty bad.
> 
> 
alan: okay - perhaps i can make every caller pass in a polling-wait thats a fraction of their wait time.
(as a starting point since i dont know what's the expected behavior of every caller).
so perhaps something like "timeout_us << 4" (i.e. 1/16th) but pass in 10 us if its anything smaller than that
(i.e. smaller than 16 usec).

...alan

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Jani Nikula]

On Tue, 15 Sep 2026, "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com> wrote:
> On Tue, 2026-09-15 at 10:34 +0300, Nikula, Jani wrote:
>> On Mon, 14 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> alan:snip
>> >  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
>> > -		   u32 *out_val, bool atomic)
>> > +		   u32 *out_val)
>> >  {
>> > -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
>> > +	u32 read;
>> > +	int ret;
>> > +
>> > +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
>> > +			      10, timeout_us, false);
>> 
>> You probably do need to let the callers pass in the wait too. 10 us wait
>> with a long timeout is going to be pretty bad.
>> 
>> 
> alan: okay - perhaps i can make every caller pass in a polling-wait thats a fraction of their wait time.
> (as a starting point since i dont know what's the expected behavior of every caller).
> so perhaps something like "timeout_us << 4" (i.e. 1/16th) but pass in 10 us if its anything smaller than that
> (i.e. smaller than 16 usec).

I think you need to talk to the xe maintainers, really.

BR,
Jani.


-- 
Jani Nikula, Intel

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Rodrigo Vivi]

On Tue, Sep 15, 2026 at 04:00:54PM +0000, Teres Alexis, Alan Previn wrote:
> On Tue, 2026-09-15 at 10:34 +0300, Nikula, Jani wrote:
> > On Mon, 14 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> alan:snip
> > >  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> > > -		   u32 *out_val, bool atomic)
> > > +		   u32 *out_val)
> > >  {
> > > -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
> > > +	u32 read;
> > > +	int ret;
> > > +
> > > +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> > > +			      10, timeout_us, false);
> > 
> > You probably do need to let the callers pass in the wait too. 10 us wait
> > with a long timeout is going to be pretty bad.

agreed

> > 
> > 
> alan: okay - perhaps i can make every caller pass in a polling-wait thats a fraction of their wait time.
> (as a starting point since i dont know what's the expected behavior of every caller).
> so perhaps something like "timeout_us << 4" (i.e. 1/16th) but pass in 10 us if its anything smaller than that
> (i.e. smaller than 16 usec).

I think we might be complicating this too much..

what about something simpler like:

#define XE_MMIO_WAIT_MAX_BACKOFF_US   1000

...
-             wait <<= 1;
+             wait = min_t(s64, wait << 1, XE_MMIO_WAIT_MAX_BACKOFF_US);


Also the Fixes tag is not the right one... the bug was there before...

> 
> ...alan

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Teres Alexis, Alan Previn]

On Tue, 2026-09-15 at 18:51 -0400, Vivi, Rodrigo wrote:
> On Tue, Sep 15, 2026 at 04:00:54PM +0000, Teres Alexis, Alan Previn wrote:
> > On Tue, 2026-09-15 at 10:34 +0300, Nikula, Jani wrote:
> > > On Mon, 14 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> > alan:snip
> > > >  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> > > > -		   u32 *out_val, bool atomic)
> > > > +		   u32 *out_val)
> > > >  {
> > > > -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
> > > > +	u32 read;
> > > > +	int ret;
> > > > +
> > > > +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> > > > +			      10, timeout_us, false);
> > > 
> > > You probably do need to let the callers pass in the wait too. 10 us wait
> > > with a long timeout is going to be pretty bad.
> 
> agreed
> 
> > > 
> > > 
> > alan: okay - perhaps i can make every caller pass in a polling-wait thats a fraction of their wait time.
> > (as a starting point since i dont know what's the expected behavior of every caller).
> > so perhaps something like "timeout_us << 4" (i.e. 1/16th) but pass in 10 us if its anything smaller than that
> > (i.e. smaller than 16 usec).
> 
> I think we might be complicating this too much..
> 
> what about something simpler like:
> 
> #define XE_MMIO_WAIT_MAX_BACKOFF_US   1000
> 
> ...
> -             wait <<= 1;
> +             wait = min_t(s64, wait << 1, XE_MMIO_WAIT_MAX_BACKOFF_US);
> 
> 

alan: i dont understand your this comment on the increasing the "wait by x2" in the loop after agreeing with Jani on the earlier statement.
Some historical context:

 1. current baseline code it stands to day IS in violation of linux rules for how to use those sleep/delay functions
 2. my initial revs on fixing this was to minimize the changes so its not complicated by simply fixing the code in place.
 3. Jani said we really should use the proper linux kernel helpers: poll_timeout_us / poll_timeout_us_atomic.
 4. Those helpers have the "timeout_us" and the "intra-loop-wait-us" period. I hardcoded to 10 usec.
	- Jani said i should not hardcode and ensure all up-the-stack callers of the xe_mmio_wait32 function passes in the intra-wait-loop
value. 
	- Then you (Rodrigo) agreed with his request but go on to propose going back to exponential 2x intra-wait-loop.
		- but that contradicts Jani's request u agreed to and also that means we implement the intra-wait-loop? (i.e. dont use the
proper linux helper?)

 ...alan


> Also the Fixes tag is not the right one... the bug was there before...
> 
> > 
> > ...alan

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Rodrigo Vivi]

On Wed, Sep 16, 2026 at 07:10:11PM +0000, Teres Alexis, Alan Previn wrote:
> On Tue, 2026-09-15 at 18:51 -0400, Vivi, Rodrigo wrote:
> > On Tue, Sep 15, 2026 at 04:00:54PM +0000, Teres Alexis, Alan Previn wrote:
> > > On Tue, 2026-09-15 at 10:34 +0300, Nikula, Jani wrote:
> > > > On Mon, 14 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> > > alan:snip
> > > > >  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> > > > > -		   u32 *out_val, bool atomic)
> > > > > +		   u32 *out_val)
> > > > >  {
> > > > > -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
> > > > > +	u32 read;
> > > > > +	int ret;
> > > > > +
> > > > > +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> > > > > +			      10, timeout_us, false);
> > > > 
> > > > You probably do need to let the callers pass in the wait too. 10 us wait
> > > > with a long timeout is going to be pretty bad.
> > 
> > agreed
> > 
> > > > 
> > > > 
> > > alan: okay - perhaps i can make every caller pass in a polling-wait thats a fraction of their wait time.
> > > (as a starting point since i dont know what's the expected behavior of every caller).
> > > so perhaps something like "timeout_us << 4" (i.e. 1/16th) but pass in 10 us if its anything smaller than that
> > > (i.e. smaller than 16 usec).
> > 
> > I think we might be complicating this too much..
> > 
> > what about something simpler like:
> > 
> > #define XE_MMIO_WAIT_MAX_BACKOFF_US   1000
> > 
> > ...
> > -             wait <<= 1;
> > +             wait = min_t(s64, wait << 1, XE_MMIO_WAIT_MAX_BACKOFF_US);
> > 
> > 
> 
> alan: i dont understand your this comment on the increasing the "wait by x2" in the loop after agreeing with Jani on the earlier statement.

What I agreed with Jani was that a hardcoded 10us poll interval against
a 2s timeout is bad. That was all.

> Some historical context:
> 
>  1. current baseline code it stands to day IS in violation of linux rules for how to use those sleep/delay functions

right, and I believe that this single line change is enough to fix this
violation.

The problem is that we double wait every loop 10, 20, 40, 80 … 20480, 40960 and
never stops doubling. udelay() is only legal up to ~5000us (perhaps 1000?!),
so once the doubling passes that, we're breaking the rule.

Same on the sleeping side: it ends up asking usleep_range() to sleep 1.3 s,
which is not what that function is for.

The one line just stops the doubling at 1000us:

wait = min_t(s64, wait << 1, 1000);

After that, the wait can be 10, 20, 40 … up to 1000, and then it stays at
1000 forever. It can never reach 20480 or 1300000.

So the illegal value never gets passed to udelay() or usleep_range() — ever.

>  2. my initial revs on fixing this was to minimize the changes so its not complicated by simply fixing the code in place.

I believe this simple line alings with your v1, but just simpler.

>  3. Jani said we really should use the proper linux kernel helpers: poll_timeout_us / poll_timeout_us_atomic.
>  4. Those helpers have the "timeout_us" and the "intra-loop-wait-us" period. I hardcoded to 10 usec.
> 	- Jani said i should not hardcode and ensure all up-the-stack callers of the xe_mmio_wait32 function passes in the intra-wait-loop
> value. 
> 	- Then you (Rodrigo) agreed with his request but go on to propose going back to exponential 2x intra-wait-loop.
> 		- but that contradicts Jani's request u agreed to and also that means we implement the intra-wait-loop? (i.e. dont use the
> proper linux helper?)

sorry for not being clear on my previous response. Perhaps we have a cleaner
end code with the poll_timeout_us and poll_timeout_us_atomic indeed.

Then perhaps we have this single fixes patch and do other attempts in get
cleaner loops?

Thanks,
Rodrigo.

> 
>  ...alan
> 
> 
> > Also the Fixes tag is not the right one... the bug was there before...
> > 
> > > 
> > > ...alan
> 

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Teres Alexis, Alan Previn]

On Wed, 2026-09-16 at 20:54 -0400, Vivi, Rodrigo wrote:
> On Wed, Sep 16, 2026 at 07:10:11PM +0000, Teres Alexis, Alan Previn wrote:
> > On Tue, 2026-09-15 at 18:51 -0400, Vivi, Rodrigo wrote:
> > > On Tue, Sep 15, 2026 at 04:00:54PM +0000, Teres Alexis, Alan Previn wrote:
> > > > On Tue, 2026-09-15 at 10:34 +0300, Nikula, Jani wrote:
> > > > > On Mon, 14 Sep 2026, Alan Previn <alan.previn.teres.alexis@intel.com> wrote:
> > > > alan:snip
> > > > > >  int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
> > > > > > -		   u32 *out_val, bool atomic)
> > > > > > +		   u32 *out_val)
> > > > > >  {
> > > > > > -	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);
> > > > > > +	u32 read;
> > > > > > +	int ret;
> > > > > > +
> > > > > > +	ret = poll_timeout_us(read = xe_mmio_read32(mmio, reg), (read & mask) == val,
> > > > > > +			      10, timeout_us, false);
> > > > > 
> > > > > You probably do need to let the callers pass in the wait too. 10 us wait
> > > > > with a long timeout is going to be pretty bad.
> > > 
> > > agreed
> > > 
> > > > > 
> > > > > 
> > > > alan: okay - perhaps i can make every caller pass in a polling-wait thats a fraction of their wait time.
> > > > (as a starting point since i dont know what's the expected behavior of every caller).
> > > > so perhaps something like "timeout_us << 4" (i.e. 1/16th) but pass in 10 us if its anything smaller than that
> > > > (i.e. smaller than 16 usec).
> > > 
> > > I think we might be complicating this too much..
> > > 
> > > what about something simpler like:
> > > 
> > > #define XE_MMIO_WAIT_MAX_BACKOFF_US   1000
> > > 
> > > ...
> > > -             wait <<= 1;
> > > +             wait = min_t(s64, wait << 1, XE_MMIO_WAIT_MAX_BACKOFF_US);
> > > 
> > > 
> > 
> > alan: i dont understand your this comment on the increasing the "wait by x2" in the loop after agreeing with Jani on the earlier statement.
> 
> What I agreed with Jani was that a hardcoded 10us poll interval against
> a 2s timeout is bad. That was all.
> 
> > Some historical context:
> > 
> >  1. current baseline code it stands to day IS in violation of linux rules for how to use those sleep/delay functions
> 
> right, and I believe that this single line change is enough to fix this
> violation.
> 
> The problem is that we double wait every loop 10, 20, 40, 80 … 20480, 40960 and
> never stops doubling. udelay() is only legal up to ~5000us (perhaps 1000?!),
> so once the doubling passes that, we're breaking the rule.
> 
> Same on the sleeping side: it ends up asking usleep_range() to sleep 1.3 s,
> which is not what that function is for.
> 
> The one line just stops the doubling at 1000us:
> 
> wait = min_t(s64, wait << 1, 1000);
> 
> After that, the wait can be 10, 20, 40 … up to 1000, and then it stays at
> 1000 forever. It can never reach 20480 or 1300000.
> 
> So the illegal value never gets passed to udelay() or usleep_range() — ever.
> 
> >  2. my initial revs on fixing this was to minimize the changes so its not complicated by simply fixing the code in place.
> 
> I believe this simple line alings with your v1, but just simpler.
> 
> >  3. Jani said we really should use the proper linux kernel helpers: poll_timeout_us / poll_timeout_us_atomic.
> >  4. Those helpers have the "timeout_us" and the "intra-loop-wait-us" period. I hardcoded to 10 usec.
> > 	- Jani said i should not hardcode and ensure all up-the-stack callers of the xe_mmio_wait32 function passes in the intra-wait-loop
> > value. 
> > 	- Then you (Rodrigo) agreed with his request but go on to propose going back to exponential 2x intra-wait-loop.
> > 		- but that contradicts Jani's request u agreed to and also that means we implement the intra-wait-loop? (i.e. dont use the
> > proper linux helper?)
> 
> sorry for not being clear on my previous response. Perhaps we have a cleaner
> end code with the poll_timeout_us and poll_timeout_us_atomic indeed.
> 
> Then perhaps we have this single fixes patch and do other attempts in get
> cleaner loops?
> 
> Thanks,
> Rodrigo.
> 
alan: I think i understand what u mean. But i believe a single line patch will NOT suffice
to maintain existing behavior for the non-atomic case. In the old code, if caller was
requesting for non-atomic, 'wait' would continue doubling in usleep_range (which has no
overflow limit for its params) so we actually CAN keep doubling. Thus callers that have
very large timeouts, we'll be saving on CPU cycles as it increases. But with a 1 ms change
as you proposed, we'd be increasing CPU cycles to get us to the end. Ofc I agree that
doubling forever is not ideal even for the non-atomic usleep_range case, (kernel
documentation stating that its good for both short and long timeouts), however kernel
documentation DOES state it's an expensive operation with the hrttimer, which is why
i wanted to allow the doubling of 'wait' for usleep_range case (like original code) but
cap it to 25% of the caller provided final timeout. (while capping the atomic version to
MAX_UDELAY_MS for short delays or the same 25% for long delays). This will ensure the
overall behavior in terms of cpu cyles and expensive hrttimer calls are similiar as before
AND also fixing in accordance to the rules. Actually if u see rev3, this is what i mean
Its not 1 line but its much simpler fix and does I believe it does align with your vision.

> > 
> >  ...alan
> > 
> > 
> > > Also the Fixes tag is not the right one... the bug was there before...
> > > 
> > > > 
> > > > ...alan
> > 

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Teres Alexis, Alan Previn]

> > 
Actually, hold off further review. let me post a new series with 2 patches
- first patch = re-rev of this one - but aligned to Rodrigo's direction to keep
it simple (for "fixes" management) with simple intra-loop caps. 
- second patch to align with Jani's (as well as other offline inputs) that
we SHOULD actually be using the kernel polling helpers.

but i think i wont update all callers to separate atomic vs non-atomic (as per Jani's)
request. I agree with him, but needs to be a separate series because since i see
us using those param-based-atomic-separation elsewhere in the driver in other subsystems.


thanks again everyone for all the inputs. will work on the re-rev.


alan:snip
> > > alan: i dont understand your this comment on the increasing the "wait by x2" in the loop after agreeing with Jani on the earlier statement.
> > 
> > What I agreed with Jani was that a hardcoded 10us poll interval against
> > a 2s timeout is bad. That was all.
> > 
> > > Some historical context:
> > > 
> > >  1. current baseline code it stands to day IS in violation of linux rules for how to use those sleep/delay functions
> > 
> > right, and I believe that this single line change is enough to fix this
> > violation.
> > 
> > The problem is that we double wait every loop 10, 20, 40, 80 … 20480, 40960 and
> > never stops doubling. udelay() is only legal up to ~5000us (perhaps 1000?!),
> > so once the doubling passes that, we're breaking the rule.
> > 
> > Same on the sleeping side: it ends up asking usleep_range() to sleep 1.3 s,
> > which is not what that function is for.
> > 
> > The one line just stops the doubling at 1000us:
> > 
> > wait = min_t(s64, wait << 1, 1000);
> > 
> > After that, the wait can be 10, 20, 40 … up to 1000, and then it stays at
> > 1000 forever. It can never reach 20480 or 1300000.
> > 
> > So the illegal value never gets passed to udelay() or usleep_range() — ever.
> > 
> > >  2. my initial revs on fixing this was to minimize the changes so its not complicated by simply fixing the code in place.
> > 
> > I believe this simple line alings with your v1, but just simpler.
> > 
> > >  3. Jani said we really should use the proper linux kernel helpers: poll_timeout_us / poll_timeout_us_atomic.
> > >  4. Those helpers have the "timeout_us" and the "intra-loop-wait-us" period. I hardcoded to 10 usec.
> > > 	- Jani said i should not hardcode and ensure all up-the-stack callers of the xe_mmio_wait32 function passes in the intra-wait-loop
> > > value. 
> > > 	- Then you (Rodrigo) agreed with his request but go on to propose going back to exponential 2x intra-wait-loop.
> > > 		- but that contradicts Jani's request u agreed to and also that means we implement the intra-wait-loop? (i.e. dont use the
> > > proper linux helper?)
> > 
> > sorry for not being clear on my previous response. Perhaps we have a cleaner
> > end code with the poll_timeout_us and poll_timeout_us_atomic indeed.
> > 
> > Then perhaps we have this single fixes patch and do other attempts in get
> > cleaner loops?
> > 
> > Thanks,
> > Rodrigo.
> > 
> alan: I think i understand what u mean. But i believe a single line patch will NOT suffice
> to maintain existing behavior for the non-atomic case. In the old code, if caller was
> requesting for non-atomic, 'wait' would continue doubling in usleep_range (which has no
> overflow limit for its params) so we actually CAN keep doubling. Thus callers that have
> very large timeouts, we'll be saving on CPU cycles as it increases. But with a 1 ms change
> as you proposed, we'd be increasing CPU cycles to get us to the end. Ofc I agree that
> doubling forever is not ideal even for the non-atomic usleep_range case, (kernel
> documentation stating that its good for both short and long timeouts), however kernel
> documentation DOES state it's an expensive operation with the hrttimer, which is why
> i wanted to allow the doubling of 'wait' for usleep_range case (like original code) but
> cap it to 25% of the caller provided final timeout. (while capping the atomic version to
> MAX_UDELAY_MS for short delays or the same 25% for long delays). This will ensure the
> overall behavior in terms of cpu cyles and expensive hrttimer calls are similiar as before
> AND also fixing in accordance to the rules. Actually if u see rev3, this is what i mean
> Its not 1 line but its much simpler fix and does I believe it does align with your vision.
> 
> > > 
> > >  ...alan
> > > 
> > > 
> > > > Also the Fixes tag is not the right one... the bug was there before...
> > > > 
> > > > > 
> > > > > ...alan
> > > 
> 

[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Alan Previn]

Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
and pick the correct helper according to the wait time and atomic.
Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
Avoid growing delays becoming intollerably large by capping the
in-loop wait time.

v5: - Simplify: don't introduce additional redesign and
      use min_t with a backoff to cap wait. (Rodrigo).
v4: - Simplify using poll_timeout_us and poll_timeout_us_atopmic and
      update all callstack to never use a param for atomic (Jani)
v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
v2: - Fixed checkpatch failure.
    - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
      review). Fixed bug max range in usleep_range(Shasiko review)

Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Assisted-by: Github-Copilot:Claude-Sonnet-5-0
---
 drivers/gpu/drm/xe/xe_mmio.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7fa18dfcb5a2..c7c37e59dab0 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -350,10 +350,11 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
 			wait = ktime_us_delta(end, cur);
 
 		if (atomic)
-			udelay(wait);
+			udelay(min_t(s64, wait, MAX_UDELAY_MS));
 		else
 			usleep_range(wait, wait << 1);
-		wait <<= 1;
+#define __XE_MMIO_WAIT_MAX_BACKOFF_100MS (100 * USEC_PER_MSEC)
+		wait = min_t(s64, wait << 1, __XE_MMIO_WAIT_MAX_BACKOFF_100MS);
 	}
 
 	if (ret != 0) {
-- 
2.43.0

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] drm/xe: udelay capped at 5us due to MAX_UDELAY_MS unit mismatch
- [Medium] drm/xe: commit message claims DIV_ROUND_UP helper but code is missing
--

commit cceb24ccd008b44c48532606a8d174234bb68933
Author: Alan Previn <alan.previn.teres.alexis@intel.com>

drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

This commit modifies __xe_mmio_wait32() to cap delay values to avoid
intolerably large waits. It picks the appropriate sleep or delay helpers
based on atomic context and wait duration.

>     Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
>     and pick the correct helper according to the wait time and atomic.
>     Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.

[Severity: Medium]
The commit message explicitly states "Implement a similar helper to replace
DIV_ROUND_UP for 32-bit CPUs", but the patch does not contain any such
implementation in __xe_mmio_wait32() or elsewhere.

Was this code intended to be included, or is the commit message outdated from
previous iterations of this patch?

> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a28..c7c37e59dab05 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -350,10 +350,11 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
>  			wait = ktime_us_delta(end, cur);
>  
>  		if (atomic)
> -			udelay(wait);
> +			udelay(min_t(s64, wait, MAX_UDELAY_MS));

[Severity: Medium]
Is there a unit mismatch here in __xe_mmio_wait32() between wait and
MAX_UDELAY_MS?

The wait variable is calculated in microseconds, but MAX_UDELAY_MS is a
constant representing milliseconds. By using min_t() with MAX_UDELAY_MS
directly, the udelay() argument appears to be incorrectly capped at a few
microseconds instead of the intended millisecond equivalent (e.g.,
MAX_UDELAY_MS * 1000).

If the wait grows beyond a few microseconds, could this unit mismatch
completely defeat the exponential backoff for atomic MMIO waits, causing the
CPU to poll the MMIO bus indefinitely at small intervals instead of backing
off?

>  		else
>  			usleep_range(wait, wait << 1);
> -		wait <<= 1;
> +#define __XE_MMIO_WAIT_MAX_BACKOFF_100MS (100 * USEC_PER_MSEC)
> +		wait = min_t(s64, wait << 1, __XE_MMIO_WAIT_MAX_BACKOFF_100MS);
>  	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260929054444.1933871-2-alan.previn.teres.alexis@intel.com?part=1

[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Alan Previn]

Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
and pick the correct helper according to the wait time and atomic.
Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
Avoid growing delays becoming intollerably large by capping the
in-loop wait time.

v6: - Fix commit message to remove items dropped in v5. Fix the
      use of MAX_UDELAY_MS for microsecond unit. (Shasiko review).
v5: - Simplify: don't introduce additional redesign and
      use min_t with a backoff to cap wait. (Rodrigo).
v4: - Simplify using poll_timeout_us and poll_timeout_us_atomic and
      update all callers to never use a param for atomic (Jani)
v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
v2: - Fixed checkpatch failure.
    - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
      review). Fixed bug max range in usleep_range(Shasiko review)

Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Assisted-by: Github-Copilot:Claude-Sonnet-5-0
---
 drivers/gpu/drm/xe/xe_mmio.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7fa18dfcb5a2..5a03698729ce 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -350,10 +350,11 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
 			wait = ktime_us_delta(end, cur);
 
 		if (atomic)
-			udelay(wait);
+			udelay(min_t(s64, wait, (MAX_UDELAY_MS * 1000)));
 		else
 			usleep_range(wait, wait << 1);
-		wait <<= 1;
+#define __XE_MMIO_WAIT_MAX_BACKOFF_100MS (100 * USEC_PER_MSEC)
+		wait = min_t(s64, wait << 1, __XE_MMIO_WAIT_MAX_BACKOFF_100MS);
 	}
 
 	if (ret != 0) {
-- 
2.43.0

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] drm/xe: commit message describes dropped design changes
- [Low] drm/xe: preprocessor macro defined inside function body
--

commit 7206a8140e2444dbf990387d48807b42ec0fbee5
Author: Alan Previn <alan.previn.teres.alexis@intel.com>

drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums
    
This patch bounds the maximum in-loop wait time in __xe_mmio_wait32 to
100ms to avoid excessively large delays. It also caps udelay usage to
MAX_UDELAY_MS for atomic contexts.

>     Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
>     and pick the correct helper according to the wait time and atomic.
>     Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.

[Severity: Low]
Does the commit message need an update here? The text claims to pick the
correct helper according to the wait time and implement a similar helper
to replace DIV_ROUND_UP, but the actual diff only modifies the sleeping
logic and caps the wait times.

It seems the DIV_ROUND_UP redesign was dropped but the description was not
fully updated to reflect this.

> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a28..5a03698729ce5 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -350,10 +350,11 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
>  			wait = ktime_us_delta(end, cur);
>  
>  		if (atomic)
> -			udelay(wait);
> +			udelay(min_t(s64, wait, (MAX_UDELAY_MS * 1000)));
>  		else
>  			usleep_range(wait, wait << 1);

[Severity: Medium]
This isn't a bug introduced by this patch, but __xe_mmio_wait32 is called
with wait values that can reach 100,000 microseconds (100ms) due to the
backoff limit. According to the kernel timer guidelines, usleep_range
should only be used for delays under 20ms, while msleep is recommended
for larger delays to avoid using high-overhead hrtimers. Could we switch
to msleep for the longer iterations?

> -		wait <<= 1;
> +#define __XE_MMIO_WAIT_MAX_BACKOFF_100MS (100 * USEC_PER_MSEC)

[Severity: Low]
Is it intended to define this preprocessor macro inside the function body?
Macros do not have block scope in C, so placing it here can be stylistically
misleading and will likely trigger checkpatch warnings. Could this be moved
outside the function body?

> +		wait = min_t(s64, wait << 1, __XE_MMIO_WAIT_MAX_BACKOFF_100MS);
>  	}
>  
>  	if (ret != 0) {

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260929161125.1973918-2-alan.previn.teres.alexis@intel.com?part=1

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Rodrigo Vivi]

On Mon, Sep 28, 2026 at 10:44:45PM -0700, Alan Previn wrote:
> Check for overflow in udelay/usleep_range use in __xe_mmio_wait32
> and pick the correct helper according to the wait time and atomic.
> Implement a similar helper to replace DIV_ROUND_UP for 32-bit CPUs.
> Avoid growing delays becoming intollerably large by capping the
> in-loop wait time.
> 
> v5: - Simplify: don't introduce additional redesign and
>       use min_t with a backoff to cap wait. (Rodrigo).
> v4: - Simplify using poll_timeout_us and poll_timeout_us_atopmic and
>       update all callstack to never use a param for atomic (Jani)
> v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
> v2: - Fixed checkpatch failure.
>     - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
>       review). Fixed bug max range in usleep_range(Shasiko review)
> 
> Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> Assisted-by: Github-Copilot:Claude-Sonnet-5-0

Assisted-by: LLM

is enough nowadays...

> ---
>  drivers/gpu/drm/xe/xe_mmio.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a2..c7c37e59dab0 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -350,10 +350,11 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
>  			wait = ktime_us_delta(end, cur);
>  
>  		if (atomic)
> -			udelay(wait);
> +			udelay(min_t(s64, wait, MAX_UDELAY_MS));
>  		else
>  			usleep_range(wait, wait << 1);
> -		wait <<= 1;
> +#define __XE_MMIO_WAIT_MAX_BACKOFF_100MS (100 * USEC_PER_MSEC)

please move this outside of the function...

then Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> +		wait = min_t(s64, wait << 1, __XE_MMIO_WAIT_MAX_BACKOFF_100MS);
>  	}
>  
>  	if (ret != 0) {
> -- 
> 2.43.0
> 

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Teres Alexis, Alan Previn]

On Tue, 2026-09-29 at 16:18 +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> - [Low] drm/xe: commit message describes dropped design changes
> - [Low] drm/xe: preprocessor macro defined inside function body
> --
> 
alan:snip
> [Severity: Medium]
> This isn't a bug introduced by this patch, but __xe_mmio_wait32 is called
> with wait values that can reach 100,000 microseconds (100ms) due to the
> backoff limit. According to the kernel timer guidelines, usleep_range
> should only be used for delays under 20ms, while msleep is recommended
> for larger delays to avoid using high-overhead hrtimers. Could we switch
> to msleep for the longer iterations?
> 
alan: I cant find this mention of "kernel timer guidelines, usleep_range
should only be used for delays under 20ms" in fact linux kernel documentation
explicitly states that uslee_range is good for both short and long delays:
https://docs.kernel.org/timers/delay_sleep_functions.html
Thus, will ignore this one.

Will fix the other low priority feedback.

alan:snip

[PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Alan Previn]

Check for overflow in udelay use in __xe_mmio_wait32 and
avoid growing delays becoming intollerably large by capping the
in-loop wait time.

v7: - Change assisted-by to "LLM" (Rodrigo).
    - Move the max-wait macro to outside the function (Rodrigo).
v6: - Fix commit message to remove items dropped in v5. Fix the
      use of MAX_UDELAY_MS for microsecond unit. (Shasiko review).
v5: - Simplify: don't introduce additional redesign and
      use min_t with a backoff to cap wait. (Rodrigo).
v4: - Simplify using poll_timeout_us and poll_timeout_us_atomic and
      update all callers to never use a param for atomic (Jani)
v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
v2: - Fixed checkpatch failure.
    - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
      review). Fixed bug max range in usleep_range(Shasiko review)

Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Assisted-by: LLM
---
 drivers/gpu/drm/xe/xe_mmio.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7fa18dfcb5a2..455a07d79cd9 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -320,6 +320,7 @@ u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)
 	return (u64)udw << 32 | ldw;
 }
 
+#define __XE_MMIO_WAIT_MAX_BACKOFF_100MS (100 * USEC_PER_MSEC)
 static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
 			    u32 timeout_us, u32 *out_val, bool atomic, bool expect_match)
 {
@@ -350,10 +351,10 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
 			wait = ktime_us_delta(end, cur);
 
 		if (atomic)
-			udelay(wait);
+			udelay(min_t(s64, wait, (MAX_UDELAY_MS * 1000)));
 		else
 			usleep_range(wait, wait << 1);
-		wait <<= 1;
+		wait = min_t(s64, wait << 1, __XE_MMIO_WAIT_MAX_BACKOFF_100MS);
 	}
 
 	if (ret != 0) {
-- 
2.43.0

Re: [PATCH] drm/xe/mmio: Fix xe_mmio_wait32() to honor delay/sleep maximums

[Rodrigo Vivi]

On Tue, Sep 29, 2026 at 12:20:37PM -0700, Alan Previn wrote:
> Check for overflow in udelay use in __xe_mmio_wait32 and
> avoid growing delays becoming intollerably large by capping the
> in-loop wait time.
> 
> v7: - Change assisted-by to "LLM" (Rodrigo).
>     - Move the max-wait macro to outside the function (Rodrigo).
> v6: - Fix commit message to remove items dropped in v5. Fix the
>       use of MAX_UDELAY_MS for microsecond unit. (Shasiko review).
> v5: - Simplify: don't introduce additional redesign and
>       use min_t with a backoff to cap wait. (Rodrigo).
> v4: - Simplify using poll_timeout_us and poll_timeout_us_atomic and
>       update all callers to never use a param for atomic (Jani)
> v3: - Use div64_s64 kernel API for 32-bit vs 64-bit division.
> v2: - Fixed checkpatch failure.
>     - Added helper for 64-bit DIV_ROUND_UP on 32-bit CPU (Shasiko
>       review). Fixed bug max range in usleep_range(Shasiko review)
> 
> Fixes: 5c09bd6ccd41 ("drm/xe/mmio: Move xe_mmio_wait32() to xe_mmio.c")
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Assisted-by: LLM
> ---

pushed to drm-xe-next.

Thanks a lot for the fix and the patience ;)

>  drivers/gpu/drm/xe/xe_mmio.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7fa18dfcb5a2..455a07d79cd9 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -320,6 +320,7 @@ u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)
>  	return (u64)udw << 32 | ldw;
>  }
>  
> +#define __XE_MMIO_WAIT_MAX_BACKOFF_100MS (100 * USEC_PER_MSEC)
>  static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
>  			    u32 timeout_us, u32 *out_val, bool atomic, bool expect_match)
>  {
> @@ -350,10 +351,10 @@ static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u
>  			wait = ktime_us_delta(end, cur);
>  
>  		if (atomic)
> -			udelay(wait);
> +			udelay(min_t(s64, wait, (MAX_UDELAY_MS * 1000)));
>  		else
>  			usleep_range(wait, wait << 1);
> -		wait <<= 1;
> +		wait = min_t(s64, wait << 1, __XE_MMIO_WAIT_MAX_BACKOFF_100MS);
>  	}
>  
>  	if (ret != 0) {
> -- 
> 2.43.0
>