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* [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB
@ 2026-09-22 11:56 Daniel P. Berrangé
  2026-09-22 12:42 ` Philippe Mathieu-Daudé
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Daniel P. Berrangé @ 2026-09-22 11:56 UTC (permalink / raw)
  To: qemu-devel; +Cc: Michael S. Tsirkin, Daniel P. Berrangé

If CONFIG_CXL=n is added to the Kconfig, the build fails to link
the PXB device:

/usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_realize':
/home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:202:(.text+0x330): undefined reference to `cxl_component_register_block_init'
/usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_dev_reset':
/home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:309:(.text+0x768): undefined reference to `cxl_component_register_init_common'

Fixes: 6e4e3ae936 (hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142))
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
 hw/pci-bridge/pci_expander_bridge.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 40ffbc4e082..8977243a804 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -123,12 +123,14 @@ static const TypeInfo pxb_pcie_bus_info = {
     .class_init    = pxb_bus_class_init,
 };
 
+#ifdef CONFIG_CXL
 static const TypeInfo pxb_cxl_bus_info = {
     .name          = TYPE_PXB_CXL_BUS,
     .parent        = TYPE_CXL_BUS,
     .instance_size = sizeof(PXBBus),
     .class_init    = pxb_bus_class_init,
 };
+#endif /* CONFIG_CXL */
 
 static const char *pxb_host_root_bus_path(PCIHostState *host_bridge,
                                           PCIBus *rootbus)
@@ -192,6 +194,7 @@ static const TypeInfo pxb_host_info = {
     .class_init    = pxb_host_class_init,
 };
 
+#ifdef CONFIG_CXL
 static void pxb_cxl_realize(DeviceState *dev, Error **errp)
 {
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
@@ -250,6 +253,7 @@ static const TypeInfo cxl_host_info = {
     .instance_size = sizeof(CXLHost),
     .class_init    = pxb_cxl_host_class_init,
 };
+#endif /* CONFIG_CXL */
 
 /*
  * Registers the PXB bus as a child of pci host root bus.
@@ -297,6 +301,7 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
     return pin - PCI_SLOT(pxb->devfn);
 }
 
+#ifdef CONFIG_CXL
 static void pxb_cxl_dev_reset(DeviceState *dev)
 {
     CXLHost *cxl = PXB_CXL_DEV(dev)->cxl_host_bridge;
@@ -324,6 +329,7 @@ static void pxb_cxl_dev_reset(DeviceState *dev)
                          8);
     }
 }
+#endif /* CONFIG_CXL */
 
 static gint pxb_compare(gconstpointer a, gconstpointer b)
 {
@@ -496,6 +502,7 @@ static const TypeInfo pxb_pcie_dev_info = {
     },
 };
 
+#ifdef CONFIG_CXL
 static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp)
 {
     /* A CXL PXB's parent bus is still PCIe */
@@ -546,17 +553,20 @@ static const TypeInfo pxb_cxl_dev_info = {
             {},
         },
 };
+#endif /* CONFIG_CXL */
 
 static void pxb_register_types(void)
 {
     type_register_static(&pxb_bus_info);
     type_register_static(&pxb_pcie_bus_info);
-    type_register_static(&pxb_cxl_bus_info);
     type_register_static(&pxb_host_info);
-    type_register_static(&cxl_host_info);
     type_register_static(&pxb_dev_info);
     type_register_static(&pxb_pcie_dev_info);
+#ifdef CONFIG_CXL
+    type_register_static(&pxb_cxl_bus_info);
+    type_register_static(&cxl_host_info);
     type_register_static(&pxb_cxl_dev_info);
+#endif /* CONFIG_CXL */
 }
 
 type_init(pxb_register_types)
-- 
2.55.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB
  2026-09-22 11:56 [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB Daniel P. Berrangé
@ 2026-09-22 12:42 ` Philippe Mathieu-Daudé
  2026-09-26  0:02 ` Jonathan Cameron
  2026-09-26 10:12 ` Philippe Mathieu-Daudé
  2 siblings, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-09-22 12:42 UTC (permalink / raw)
  To: Daniel P. Berrangé, qemu-devel; +Cc: Michael S. Tsirkin

On 2026-09-22 13:56, Daniel P. Berrangé wrote:
> If CONFIG_CXL=n is added to the Kconfig, the build fails to link
> the PXB device:
> 
> /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_realize':
> /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:202:(.text+0x330): undefined reference to `cxl_component_register_block_init'
> /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_dev_reset':
> /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:309:(.text+0x768): undefined reference to `cxl_component_register_init_common'
> 
> Fixes: 6e4e3ae936 (hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142))
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
> ---
>   hw/pci-bridge/pci_expander_bridge.c | 14 ++++++++++++--
>   1 file changed, 12 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB
  2026-09-22 11:56 [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB Daniel P. Berrangé
  2026-09-22 12:42 ` Philippe Mathieu-Daudé
@ 2026-09-26  0:02 ` Jonathan Cameron
  2026-09-26 10:12 ` Philippe Mathieu-Daudé
  2 siblings, 0 replies; 5+ messages in thread
From: Jonathan Cameron @ 2026-09-26  0:02 UTC (permalink / raw)
  To: Daniel P. Berrangé; +Cc: qemu-devel, Michael S. Tsirkin

On Tue, 22 Sep 2026 12:56:13 +0100
Daniel P. Berrangé <berrange@redhat.com> wrote:

> If CONFIG_CXL=n is added to the Kconfig, the build fails to link
> the PXB device:
> 
> /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_realize':
> /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:202:(.text+0x330): undefined reference to `cxl_component_register_block_init'
> /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_dev_reset':
> /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:309:(.text+0x768): undefined reference to `cxl_component_register_init_common'
> 
> Fixes: 6e4e3ae936 (hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142))
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>

Acked-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB
  2026-09-22 11:56 [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB Daniel P. Berrangé
  2026-09-22 12:42 ` Philippe Mathieu-Daudé
  2026-09-26  0:02 ` Jonathan Cameron
@ 2026-09-26 10:12 ` Philippe Mathieu-Daudé
  2026-09-28  8:04   ` Daniel P. Berrangé
  2 siblings, 1 reply; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-09-26 10:12 UTC (permalink / raw)
  To: Daniel P. Berrangé, qemu-devel; +Cc: Michael S. Tsirkin

On 22/9/26 13:56, Daniel P. Berrangé wrote:
> If CONFIG_CXL=n is added to the Kconfig, the build fails to link
> the PXB device:
> 
> /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_realize':
> /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:202:(.text+0x330): undefined reference to `cxl_component_register_block_init'
> /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_dev_reset':
> /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:309:(.text+0x768): undefined reference to `cxl_component_register_init_common'
> 
> Fixes: 6e4e3ae936 (hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142))
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
> ---
>   hw/pci-bridge/pci_expander_bridge.c | 14 ++++++++++++--
>   1 file changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index 40ffbc4e082..8977243a804 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -123,12 +123,14 @@ static const TypeInfo pxb_pcie_bus_info = {
>       .class_init    = pxb_bus_class_init,
>   };
>   
> +#ifdef CONFIG_CXL
>   static const TypeInfo pxb_cxl_bus_info = {
>       .name          = TYPE_PXB_CXL_BUS,
>       .parent        = TYPE_CXL_BUS,
>       .instance_size = sizeof(PXBBus),
>       .class_init    = pxb_bus_class_init,
>   };
> +#endif /* CONFIG_CXL */
This does not build:

FAILED: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o
../hw/pci-bridge/pci_expander_bridge.c:126:8: error: attempt to use 
poisoned "CONFIG_CXL"
   126 | #ifdef CONFIG_CXL
       |        ^



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB
  2026-09-26 10:12 ` Philippe Mathieu-Daudé
@ 2026-09-28  8:04   ` Daniel P. Berrangé
  0 siblings, 0 replies; 5+ messages in thread
From: Daniel P. Berrangé @ 2026-09-28  8:04 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé; +Cc: qemu-devel, Michael S. Tsirkin

On Sat, Sep 26, 2026 at 12:12:52PM +0200, Philippe Mathieu-Daudé wrote:
> On 22/9/26 13:56, Daniel P. Berrangé wrote:
> > If CONFIG_CXL=n is added to the Kconfig, the build fails to link
> > the PXB device:
> > 
> > /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_realize':
> > /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:202:(.text+0x330): undefined reference to `cxl_component_register_block_init'
> > /usr/bin/ld.bfd: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o: in function `pxb_cxl_dev_reset':
> > /home/berrange/src/virt/qemu/build/../hw/pci-bridge/pci_expander_bridge.c:309:(.text+0x768): undefined reference to `cxl_component_register_init_common'
> > 
> > Fixes: 6e4e3ae936 (hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142))
> > Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
> > ---
> >   hw/pci-bridge/pci_expander_bridge.c | 14 ++++++++++++--
> >   1 file changed, 12 insertions(+), 2 deletions(-)
> > 
> > diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> > index 40ffbc4e082..8977243a804 100644
> > --- a/hw/pci-bridge/pci_expander_bridge.c
> > +++ b/hw/pci-bridge/pci_expander_bridge.c
> > @@ -123,12 +123,14 @@ static const TypeInfo pxb_pcie_bus_info = {
> >       .class_init    = pxb_bus_class_init,
> >   };
> > +#ifdef CONFIG_CXL
> >   static const TypeInfo pxb_cxl_bus_info = {
> >       .name          = TYPE_PXB_CXL_BUS,
> >       .parent        = TYPE_CXL_BUS,
> >       .instance_size = sizeof(PXBBus),
> >       .class_init    = pxb_bus_class_init,
> >   };
> > +#endif /* CONFIG_CXL */
> This does not build:
> 
> FAILED: libsystem.a.p/hw_pci-bridge_pci_expander_bridge.c.o
> ../hw/pci-bridge/pci_expander_bridge.c:126:8: error: attempt to use poisoned
> "CONFIG_CXL"
>   126 | #ifdef CONFIG_CXL
>       |        ^

Doh, I'm sorry, I tested with CONFIG_CXL *removed* from the default
devices list, and clearly failed to then re-test with it added back :-(

With regards,
Daniel
-- 
|: https://berrange.com       ~~        https://hachyderm.io/@berrange :|
|: https://libvirt.org          ~~          https://entangle-photo.org :|
|: https://pixelfed.art/berrange   ~~    https://fstop138.berrange.com :|



^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2026-09-28  8:05 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-09-22 11:56 [PATCH] hw/pci-bridge: honour CONFIG_CXL in PXB Daniel P. Berrangé
2026-09-22 12:42 ` Philippe Mathieu-Daudé
2026-09-26  0:02 ` Jonathan Cameron
2026-09-26 10:12 ` Philippe Mathieu-Daudé
2026-09-28  8:04   ` Daniel P. Berrangé

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