All of lore.kernel.org
 help / color / mirror / Atom feed
From: Brian Masney <bmasney@redhat.com>
To: Conor Dooley <conor@kernel.org>
Cc: Changhuang Liang <changhuang.liang@starfivetech.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Jerome Brunet <jbrunet+clk@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Kees Cook <kees@kernel.org>,
	"Gustavo A . R . Silva" <gustavoars@kernel.org>,
	Richard Cochran <richardcochran@gmail.com>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-hardening@vger.kernel.org, netdev@vger.kernel.org,
	Hal Feng <hal.feng@starfivetech.com>
Subject: Re: [PATCH v5 00/23] Add basic clocks and resets for JHB100 SoC
Date: Fri, 2 Oct 2026 17:47:38 -0400	[thread overview]
Message-ID: <asAmejPowNLKnmto@redhat.com> (raw)
In-Reply-To: <20261002-doorbell-recycler-f386e3b8d5a4@spud>

Hi Conor,

On Fri, Oct 02, 2026 at 09:26:34PM +0100, Conor Dooley wrote:
> > btw, will you be at LPC or OSSEU?

Yes, I'll be at LPC. I'm giving a clk talk the second day, so you can
find me there if we don't cross paths before then.

> ... As I went about aligning more ducks, I recalled that the syscon/pll
> series also depends on some of the binding header files in this series.
> 
> I've made another tag with an additional binding that you'll need to
> apply the clock patches in this series:
> https://lore.kernel.org/all/20260828095608.19955-2-changhuang.liang@starfivetech.com/
> 
> This tag will actually appear in linux-next as of the next iteration,
> because the socinfo driver I will definitely submit as 7.4 material.
> 
> Thanks,
> Conor.
> 
> The following changes since commit cee9395acd8043be0644b25c34bfa86623f2b935:
> 
>   Linux 7.3-rc1 (2026-08-30 13:34:40 -0700)
> 
> are available in the Git repository at:
> 
>   https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ clk-starfive-jhb100-plus-soc-header
> 
> for you to fetch changes up to c4a545d3e428e9600d670fa8a08098b7bc82d5ec:
> 
>   dt-bindings: soc: starfive: Add StarFive JHB100 syscon modules (2026-10-02 21:17:31 +0100)
> 
> ----------------------------------------------------------------
> jhb100 clock binding + syscon binding shared tag
> 
> This is a second shared tag for the Starfive jhb100 clock bindings, between
> the riscv soc tree and clock tree.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> ----------------------------------------------------------------
> Changhuang Liang (8):
>       dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator
>       dt-bindings: soc: starfive: Add StarFive JHB100 syscon modules

Pulled into clk-next.

Brian


WARNING: multiple messages have this Message-ID (diff)
From: Brian Masney <bmasney@redhat.com>
To: Conor Dooley <conor@kernel.org>
Cc: Changhuang Liang <changhuang.liang@starfivetech.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Jerome Brunet <jbrunet+clk@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Kees Cook <kees@kernel.org>,
	"Gustavo A . R . Silva" <gustavoars@kernel.org>,
	Richard Cochran <richardcochran@gmail.com>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-hardening@vger.kernel.org, netdev@vger.kernel.org,
	Hal Feng <hal.feng@starfivetech.com>
Subject: Re: [PATCH v5 00/23] Add basic clocks and resets for JHB100 SoC
Date: Fri, 2 Oct 2026 17:47:38 -0400	[thread overview]
Message-ID: <asAmejPowNLKnmto@redhat.com> (raw)
In-Reply-To: <20261002-doorbell-recycler-f386e3b8d5a4@spud>

Hi Conor,

On Fri, Oct 02, 2026 at 09:26:34PM +0100, Conor Dooley wrote:
> > btw, will you be at LPC or OSSEU?

Yes, I'll be at LPC. I'm giving a clk talk the second day, so you can
find me there if we don't cross paths before then.

> ... As I went about aligning more ducks, I recalled that the syscon/pll
> series also depends on some of the binding header files in this series.
> 
> I've made another tag with an additional binding that you'll need to
> apply the clock patches in this series:
> https://lore.kernel.org/all/20260828095608.19955-2-changhuang.liang@starfivetech.com/
> 
> This tag will actually appear in linux-next as of the next iteration,
> because the socinfo driver I will definitely submit as 7.4 material.
> 
> Thanks,
> Conor.
> 
> The following changes since commit cee9395acd8043be0644b25c34bfa86623f2b935:
> 
>   Linux 7.3-rc1 (2026-08-30 13:34:40 -0700)
> 
> are available in the Git repository at:
> 
>   https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ clk-starfive-jhb100-plus-soc-header
> 
> for you to fetch changes up to c4a545d3e428e9600d670fa8a08098b7bc82d5ec:
> 
>   dt-bindings: soc: starfive: Add StarFive JHB100 syscon modules (2026-10-02 21:17:31 +0100)
> 
> ----------------------------------------------------------------
> jhb100 clock binding + syscon binding shared tag
> 
> This is a second shared tag for the Starfive jhb100 clock bindings, between
> the riscv soc tree and clock tree.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> ----------------------------------------------------------------
> Changhuang Liang (8):
>       dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator
>       dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator
>       dt-bindings: soc: starfive: Add StarFive JHB100 syscon modules

Pulled into clk-next.

Brian


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2026-10-02 21:47 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-30 12:42 [PATCH v5 00/23] Add basic clocks and resets for JHB100 SoC Changhuang Liang
2026-09-30 12:42 ` Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 01/23] clk: starfive: jh7110-sys: Fix memory leak in reset controller register Changhuang Liang
2026-09-30 12:42   ` Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 02/23] clk: starfive: JH71x0: Move reset controller registration to jh71x0 common code Changhuang Liang
2026-09-30 12:42   ` Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 03/23] reset: starfive: jh7110: Match auxiliary device names to jh71x0 clk driver Changhuang Liang
2026-09-30 12:42   ` Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 04/23] clk: starfive: jh71x0: Add generic CRG probe helper Changhuang Liang
2026-09-30 12:42   ` Changhuang Liang
2026-10-02 18:51   ` Brian Masney
2026-10-02 18:51     ` Brian Masney
2026-10-03 14:58     ` Changhuang Liang
2026-10-03 14:58       ` Changhuang Liang
2026-09-30 12:42 ` [PATCH v5 05/23] dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator Changhuang Liang
2026-09-30 12:42   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 06/23] clk: starfive: Add JHB100 System-0 clock generator driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-10-02 18:51   ` Brian Masney
2026-10-02 18:51     ` Brian Masney
2026-10-03 15:05     ` Changhuang Liang
2026-10-03 15:05       ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 07/23] dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 08/23] clk: starfive: Add JHB100 System-1 clock generator driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 09/23] dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 10/23] clk: starfive: Add JHB100 System-2 clock generator driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-10-02 18:51   ` Brian Masney
2026-10-02 18:51     ` Brian Masney
2026-10-03 15:08     ` Changhuang Liang
2026-10-03 15:08       ` Changhuang Liang
2026-10-02 19:50   ` Brian Masney
2026-10-02 19:50     ` Brian Masney
2026-10-04  4:09     ` Changhuang Liang
2026-10-04  4:09       ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 11/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-10-02 18:51   ` Brian Masney
2026-10-02 18:51     ` Brian Masney
2026-09-30 12:43 ` [PATCH v5 12/23] clk: starfive: Introduce idiv ops for inverted divider clocks Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-10-02 18:51   ` Brian Masney
2026-10-02 18:51     ` Brian Masney
2026-09-30 12:43 ` [PATCH v5 13/23] clk: starfive: Expand the storage of clock parent index Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 14/23] clk: starfive: Add StarFive JHB100 Peripheral-0 clock driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 15/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 16/23] clk: starfive: Add StarFive JHB100 Peripheral-1 clock driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 17/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 18/23] clk: starfive: Add StarFive JHB100 Peripheral-2 clock driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 19/23] dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 20/23] clk: starfive: Add StarFive JHB100 Peripheral-3 clock driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 21/23] reset: starfive: jh71x0: Support discontiguous reset IDs Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 22/23] reset: starfive: Add StarFive JHB100 reset driver Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 12:43 ` [PATCH v5 23/23] riscv: dts: starfive: jhb100: Add clocks and resets nodes Changhuang Liang
2026-09-30 12:43   ` Changhuang Liang
2026-09-30 22:43 ` [PATCH v5 00/23] Add basic clocks and resets for JHB100 SoC Conor Dooley
2026-09-30 22:43   ` Conor Dooley
2026-10-02 18:30   ` Brian Masney
2026-10-02 18:30     ` Brian Masney
2026-10-02 20:11     ` Conor Dooley
2026-10-02 20:11       ` Conor Dooley
2026-10-02 20:26       ` Conor Dooley
2026-10-02 20:26         ` Conor Dooley
2026-10-02 21:47         ` Brian Masney [this message]
2026-10-02 21:47           ` Brian Masney

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=asAmejPowNLKnmto@redhat.com \
    --to=bmasney@redhat.com \
    --cc=alex@ghiti.fr \
    --cc=aou@eecs.berkeley.edu \
    --cc=changhuang.liang@starfivetech.com \
    --cc=conor+dt@kernel.org \
    --cc=conor@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavoars@kernel.org \
    --cc=hal.feng@starfivetech.com \
    --cc=jbrunet+clk@baylibre.com \
    --cc=kees@kernel.org \
    --cc=kernel@esmil.dk \
    --cc=krzk+dt@kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-hardening@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mturquette@baylibre.com \
    --cc=netdev@vger.kernel.org \
    --cc=p.zabel@pengutronix.de \
    --cc=palmer@dabbelt.com \
    --cc=pjw@kernel.org \
    --cc=richardcochran@gmail.com \
    --cc=robh@kernel.org \
    --cc=sboyd@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.