From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Karthik Poosa <karthik.poosa@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
<badal.nilawar@intel.com>, <raag.jadav@intel.com>,
<riana.tauro@intel.com>, <sk.anirban@intel.com>,
<mallesh.koujalagi@intel.com>, <soham.purkait@intel.com>
Subject: Re: [PATCH v8 14/15] drm/xe/hwmon: Add CRI PCIe temperature sensor offset
Date: Wed, 7 Oct 2026 14:27:00 -0400 [thread overview]
Message-ID: <asaO9L1vpnNXmAIV@intel.com> (raw)
In-Reply-To: <20261006033534.3583967-15-karthik.poosa@intel.com>
On Tue, Oct 06, 2026 at 09:05:33AM +0530, Karthik Poosa wrote:
> Describe the Crescent Island PCIe temperature sensor at byte offset 20 in
> READ_THERMAL_DATA.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> drivers/gpu/drm/xe/xe_pci.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 1cbd49933b2c..c7ab7b1abd25 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -482,6 +482,7 @@ static const struct xe_device_desc cri_desc = {
> .has_i2c = true,
> .has_mbx_power_limits = true,
> .has_mbx_thermal_info = true,
> + .pcie_temp_sensor_offset = 20,
wrong place and bad name and it should be squashed to the previous patch.
But also, please disregard the rv-b that I gave there... seeing this again
this is a bad naming... I'm also bad with naming, but pcie_ as a prefix
seems something related to the pci spec itself, what is not the case,
so we need something different....
> .has_mert = true,
> .has_pre_prod_wa = 1,
> .has_soc_remapper_sysctrl = true,
> --
> 2.25.1
>
next prev parent reply other threads:[~2026-10-07 18:27 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-06 3:35 [PATCH v8 00/15] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 01/15] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-10-07 18:17 ` Rodrigo Vivi
2026-10-06 3:35 ` [PATCH v8 02/15] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 03/15] drm/xe/hwmon: Fix memory controller thermal data handling Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 04/15] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-10-07 18:18 ` Rodrigo Vivi
2026-10-06 3:35 ` [PATCH v8 05/15] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 06/15] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 07/15] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 08/15] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 09/15] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-10-07 18:20 ` Rodrigo Vivi
2026-10-06 3:35 ` [PATCH v8 10/15] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-10-07 18:20 ` Rodrigo Vivi
2026-10-06 3:35 ` [PATCH v8 11/15] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 12/15] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-10-06 3:35 ` [PATCH v8 13/15] drm/xe/hwmon: Get PCIe temperature sensor offset from xe info Karthik Poosa
2026-10-07 18:21 ` Rodrigo Vivi
2026-10-06 3:35 ` [PATCH v8 14/15] drm/xe/hwmon: Add CRI PCIe temperature sensor offset Karthik Poosa
2026-10-07 18:27 ` Rodrigo Vivi [this message]
2026-10-07 18:41 ` Poosa, Karthik
2026-10-08 13:49 ` Poosa, Karthik
2026-10-08 22:25 ` Rodrigo Vivi
2026-10-06 3:35 ` [PATCH v8 15/15] drm/xe/hwmon: Simplify temperature channels config Karthik Poosa
2026-10-07 18:27 ` Rodrigo Vivi
2026-10-06 3:45 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox (rev5) Patchwork
2026-10-06 4:25 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-06 14:13 ` ✗ Xe.CI.FULL: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=asaO9L1vpnNXmAIV@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=badal.nilawar@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=karthik.poosa@intel.com \
--cc=mallesh.koujalagi@intel.com \
--cc=raag.jadav@intel.com \
--cc=riana.tauro@intel.com \
--cc=sk.anirban@intel.com \
--cc=soham.purkait@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.