From: Mark Brown <broonie@kernel.org>
To: Paul Cercueil <paul.cercueil@bootlin.com>
Cc: Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <mwalle@kernel.org>,
Takahiro Kuwano <takahiro.kuwano@infineon.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Kees Cook <kees@kernel.org>, Tony Luck <tony.luck@intel.com>,
"Guilherme G . Piccoli" <gpiccoli@igalia.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, Tanmay Jagdale <tanmay@marvell.com>
Subject: Re: [PATCH 1/5] spi: spi-mem: Add support for panic mem writes
Date: Thu, 8 Oct 2026 10:32:51 +0200 [thread overview]
Message-ID: <asdVM883VTQy7WvH@sirena.co.uk> (raw)
In-Reply-To: <20261005081141.33688-2-paul.cercueil@bootlin.com>
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On Mon, Oct 05, 2026 at 10:11:36AM +0200, Paul Cercueil wrote:
> From: Tanmay Jagdale <tanmay@marvell.com>
>
> Add a 'panic_write' flag to the controller's capabilities struct.
> When set, the SPI controller indicates that it will be able to send
> commands to a connected NOR or NAND memory in the context of a kernel
> panic, which means without sleeping and without relying on IRQs.
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -398,6 +398,31 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> u8 *tmpbuf;
> int ret;
>
> + if (op->panic_write) {
> + if (!spi_mem_controller_is_capable(ctlr, panic_write))
> + return -EOPNOTSUPP;
> + /*
> + * Only support panic writes if we'll go through .exec_op().
> + * The regular SPI path (spi_sync(), etc.) explicitly mentions
> + * that it can only be used from a context that may sleep, which
> + * is not the case on a kernel panic.
> + * If this changes in the future, this could be reworked, but
> + * for now this will have to do.
> + */
This also needs to ensure that the queue is idle - we'll still execute
spi_mem_access_start() which flushes the queue, and we've got runtime PM
operations there which might be a bit challenging in a panic situation.
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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Paul Cercueil <paul.cercueil@bootlin.com>
Cc: Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <mwalle@kernel.org>,
Takahiro Kuwano <takahiro.kuwano@infineon.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Kees Cook <kees@kernel.org>, Tony Luck <tony.luck@intel.com>,
"Guilherme G . Piccoli" <gpiccoli@igalia.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, Tanmay Jagdale <tanmay@marvell.com>
Subject: Re: [PATCH 1/5] spi: spi-mem: Add support for panic mem writes
Date: Thu, 8 Oct 2026 10:32:51 +0200 [thread overview]
Message-ID: <asdVM883VTQy7WvH@sirena.co.uk> (raw)
In-Reply-To: <20261005081141.33688-2-paul.cercueil@bootlin.com>
[-- Attachment #1: Type: text/plain, Size: 1302 bytes --]
On Mon, Oct 05, 2026 at 10:11:36AM +0200, Paul Cercueil wrote:
> From: Tanmay Jagdale <tanmay@marvell.com>
>
> Add a 'panic_write' flag to the controller's capabilities struct.
> When set, the SPI controller indicates that it will be able to send
> commands to a connected NOR or NAND memory in the context of a kernel
> panic, which means without sleeping and without relying on IRQs.
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -398,6 +398,31 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> u8 *tmpbuf;
> int ret;
>
> + if (op->panic_write) {
> + if (!spi_mem_controller_is_capable(ctlr, panic_write))
> + return -EOPNOTSUPP;
> + /*
> + * Only support panic writes if we'll go through .exec_op().
> + * The regular SPI path (spi_sync(), etc.) explicitly mentions
> + * that it can only be used from a context that may sleep, which
> + * is not the case on a kernel panic.
> + * If this changes in the future, this could be reworked, but
> + * for now this will have to do.
> + */
This also needs to ensure that the queue is idle - we'll still execute
spi_mem_access_start() which flushes the queue, and we've got runtime PM
operations there which might be a bit challenging in a panic situation.
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next prev parent reply other threads:[~2026-10-08 8:33 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-05 8:11 [PATCH 0/5] spi: Add support for panic mem writes Paul Cercueil
2026-10-05 8:11 ` Paul Cercueil
2026-10-05 8:11 ` [PATCH 1/5] spi: spi-mem: " Paul Cercueil
2026-10-05 8:11 ` Paul Cercueil
2026-10-05 8:24 ` sashiko-bot
2026-10-05 8:24 ` sashiko-bot
2026-10-08 8:32 ` Mark Brown [this message]
2026-10-08 8:32 ` Mark Brown
2026-10-13 8:25 ` Paul Cercueil
2026-10-13 8:25 ` Paul Cercueil
2026-10-13 8:38 ` Miquel Raynal
2026-10-13 8:38 ` Miquel Raynal
2026-10-13 8:48 ` Paul Cercueil
2026-10-13 8:48 ` Paul Cercueil
2026-10-13 10:42 ` Mark Brown
2026-10-13 10:42 ` Mark Brown
2026-10-13 11:00 ` Paul Cercueil
2026-10-13 11:00 ` Paul Cercueil
2026-10-13 16:00 ` Mark Brown
2026-10-13 16:00 ` Mark Brown
2026-10-05 8:11 ` [PATCH 2/5] mtd: spi-nor: Add support for panic writes Paul Cercueil
2026-10-05 8:11 ` Paul Cercueil
2026-10-05 8:23 ` sashiko-bot
2026-10-05 8:23 ` sashiko-bot
2026-10-05 8:11 ` [PATCH 3/5] spi: cadence-xspi: Add irq-less support Paul Cercueil
2026-10-05 8:11 ` Paul Cercueil
2026-10-05 8:24 ` sashiko-bot
2026-10-05 8:24 ` sashiko-bot
2026-10-08 8:36 ` Mark Brown
2026-10-08 8:36 ` Mark Brown
2026-10-05 8:11 ` [PATCH 4/5] spi: cadence-xspi: Don't use infinite timeout in register poll Paul Cercueil
2026-10-05 8:11 ` Paul Cercueil
2026-10-05 8:21 ` sashiko-bot
2026-10-05 8:21 ` sashiko-bot
2026-10-05 8:11 ` [PATCH 5/5] spi: cadence-xspi: Add support for panic writes Paul Cercueil
2026-10-05 8:11 ` Paul Cercueil
2026-10-05 8:26 ` sashiko-bot
2026-10-05 8:26 ` sashiko-bot
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