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From: Jim MacArthur <jim.macarthur@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: Re: [PATCH] hw/intc/arm_gicv5: Make IRS_IDR0 reads return actual value, not 0
Date: Fri, 9 Oct 2026 10:18:34 +0100	[thread overview]
Message-ID: <asixaoIo55u7LDXt@linaro.org> (raw)
In-Reply-To: <20261008092327.4036856-1-peter.maydell@linaro.org>

On Thu, Oct 08, 2026 at 10:23:27AM +0100, Peter Maydell wrote:
> IN the code for handling reads of IRS_IDR0, we carefully construct
> the correct value starting with cs->irs_idr0 and adjusting it.
> However, we never actually write the final value into *data, so
> the guest will always see zero.
> 
> We didn't notice this before, because Linux happens to not care
> about this register value except to check for the presence of
> virtualization.
> 
> Cc: qemu-stable@nongnu.org
> Fixes: 405ad2e76f13254 ("hw/intc/arm_gicv5: Implement IRS ID regs")
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  hw/intc/arm_gicv5.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c
> index 08878193dfc..ebfb0878af3 100644
> --- a/hw/intc/arm_gicv5.c
> +++ b/hw/intc/arm_gicv5.c
> @@ -1433,6 +1433,7 @@ static bool config_readl(GICv5 *s, GICv5Domain domain, hwaddr offset,
>              /* ...which means VIRT_ONE_N is also RES0 */
>              v &= ~R_IRS_IDR0_VIRT_ONE_N_MASK;
>          }
> +        *data = v;
>          return true;
>  
>      case A_IRS_IDR1:

Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org>



      parent reply	other threads:[~2026-10-09  9:18 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-08  9:23 [PATCH] hw/intc/arm_gicv5: Make IRS_IDR0 reads return actual value, not 0 Peter Maydell
2026-10-08  9:36 ` Philippe Mathieu-Daudé
2026-10-09  9:48   ` Jim MacArthur
2026-10-09 10:06     ` Philippe Mathieu-Daudé
2026-10-09  9:18 ` Jim MacArthur [this message]

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