From: Raag Jadav <raag.jadav@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, daniele.ceraolospurio@intel.com,
riana.tauro@intel.com, mallesh.koujalagi@intel.com,
aravind.iddamsetty@intel.com, himal.prasad.ghimiray@intel.com,
arvind.yadav@intel.com, syed.abdul.muqthyar.ahmed@intel.com,
nitin.r.gote@intel.com
Subject: Re: [PATCH v5 10/13] drm/xe/xe_ras: Report correctable errors using SIGID
Date: Mon, 26 Oct 2026 16:17:45 +0100 [thread overview]
Message-ID: <at9vGYtvACOfJftR@black.igk.intel.com> (raw)
In-Reply-To: <20261023043422.681260-25-badal.nilawar@intel.com>
On Fri, Oct 23, 2026 at 10:04:32AM +0530, Badal Nilawar wrote:
> Use xe_log_* helper to report correctable errors.
>
> Example:
> xe 0000:03:00.0: [drm] *ERROR* SIGID=203 CORRECTED
> (010200180000000100000000) [Hardware Error]: CORE_COMPUTE: error detected
>
> Assisted-by: LLM
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> Cc: Raag Jadav <raag.jadav@intel.com>
> ---
> v4:
> - Pass structured log component to xe_log_from() (sashiko)
> ---
> drivers/gpu/drm/xe/xe_ras.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 4408fc530900..cd64baddd8de 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -3,6 +3,8 @@
> * Copyright © 2026 Intel Corporation
> */
>
> +#include <linux/bitfield.h>
> +
> #include "xe_assert.h"
> #include "xe_bo.h"
> #include "xe_configfs.h"
> @@ -226,6 +228,12 @@ static u8 ras_sev_to_cper_sev(u8 ras_sev)
> }
> }
>
> +static u16 ras_comp_to_log_comp(u8 component)
I know xe_log_component_bits is u16 but I'd use u32 here to make this consistent
with __xe_log_emit(), which is ultimately how I think it's going to be consumed.
Raag
> +{
> + return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
> + FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
> +}
> +
> static inline const char *sev_to_str(u8 severity)
> {
> if (severity >= XE_RAS_SEV_MAX)
> @@ -717,8 +725,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> if (!ras_counter_is_valid(xe, &errors[id]))
> continue;
>
> - xe_warn(xe, "[RAS]: %s %s detected\n",
> - comp_to_str(component), sev_to_str(severity));
> + xe_log_from(xe, ras_sev_to_cper_sev(severity),
> + ras_comp_to_hw_sigid(component),
> + ras_comp_to_log_comp(component),
> + &errors[id], sizeof(errors[id]),
> + "error detected\n");
>
> /* Send event once per component */
> if (sent & BIT(component))
> --
> 2.54.0
>
next prev parent reply other threads:[~2026-10-26 15:18 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-23 4:34 [PATCH v5 00/13] Add CPER logging support for CRI Badal Nilawar
2026-10-23 4:24 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev5) Patchwork
2026-10-23 4:26 ` ✓ CI.KUnit: success " Patchwork
2026-10-23 4:34 ` [PATCH v5 01/13] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-24 11:38 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 02/13] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-24 11:50 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 03/13] drm/xe/cper: Initialize Intel-specific section header Badal Nilawar
2026-10-23 4:30 ` sashiko-bot
2026-10-26 5:57 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 04/13] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-26 9:54 ` Raag Jadav
2026-10-27 3:34 ` Nilawar, Badal
2026-10-23 4:34 ` [PATCH v5 05/13] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-26 11:31 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 06/13] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-26 12:29 ` Raag Jadav
2026-10-27 4:21 ` Nilawar, Badal
2026-10-23 4:34 ` [PATCH v5 07/13] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-10-26 12:47 ` Raag Jadav
2026-10-26 18:31 ` Nilawar, Badal
2026-10-27 1:29 ` Raag Jadav
2026-10-27 6:03 ` Nilawar, Badal
2026-10-23 4:34 ` [PATCH v5 08/13] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-23 6:24 ` Mallesh, Koujalagi
2026-10-27 12:43 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 09/13] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-23 6:16 ` Mallesh, Koujalagi
2026-10-26 12:57 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 10/13] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-26 15:17 ` Raag Jadav [this message]
2026-10-27 4:13 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 11/13] drm/xe/xe_ras: Report unknown " Badal Nilawar
2026-10-23 4:34 ` [PATCH v5 12/13] drm/xe/xe_ras: Add support to retrieve info queue data Badal Nilawar
2026-10-23 4:34 ` [PATCH v5 13/13] drm/xe/cper: Prepare Intel CPER info records Badal Nilawar
2026-10-23 6:34 ` ✓ Xe.CI.FULL: success for Add CPER logging support for CRI (rev5) Patchwork
2026-10-23 6:35 ` ✓ Xe.CI.BAT: " Patchwork
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