Re: [PATCH v2 1/2] drm/panthor: Add neural-engine presence and power bits for v14+

[Liviu Dudau <liviu.dudau@arm.com>]

On Thu, Oct 15, 2026 at 02:50:26PM +0100, Daniel Stone wrote:
> Mali v14+ can optionally feature a neural engine. This is not currently
> used by Panthor, but add the bare-minimum bits required to detect the
> engine's presence and control its power.
> 
> Signed-off-by: Daniel Stone <daniels@collabora.com>

Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>

Best regards,
Liviu

> ---
>  drivers/gpu/drm/panthor/panthor_gpu_regs.h | 1 +
>  drivers/gpu/drm/panthor/panthor_hw.h       | 6 ++++++
>  drivers/gpu/drm/panthor/panthor_pwr_regs.h | 7 +++++++
>  3 files changed, 14 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panthor/panthor_gpu_regs.h b/drivers/gpu/drm/panthor/panthor_gpu_regs.h
> index 4c5b953796e4f..5340966caef37 100644
> --- a/drivers/gpu/drm/panthor/panthor_gpu_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_gpu_regs.h
> @@ -67,6 +67,7 @@
>  
>  #define GPU_FEATURES					0x60
>  #define   GPU_FEATURES_RAY_INTERSECTION			BIT(2)
> +#define   GPU_FEATURES_NEURAL_ENGINE			BIT(4)
>  #define   GPU_FEATURES_RAY_TRAVERSAL			BIT(5)
>  
>  #define GPU_TIMESTAMP_OFFSET				0x88
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.h b/drivers/gpu/drm/panthor/panthor_hw.h
> index f797663893b2d..924faea27061a 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.h
> +++ b/drivers/gpu/drm/panthor/panthor_hw.h
> @@ -61,4 +61,10 @@ static inline bool panthor_hw_has_pwr_ctrl(struct panthor_device *ptdev)
>  	return GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id) >= 14;
>  }
>  
> +static inline bool panthor_hw_has_neural(struct panthor_device *ptdev)
> +{
> +	return (GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id) >= 14 &&
> +	        ptdev->gpu_info.gpu_features & GPU_FEATURES_NEURAL_ENGINE);
> +}
> +
>  #endif /* __PANTHOR_HW_H__ */
> diff --git a/drivers/gpu/drm/panthor/panthor_pwr_regs.h b/drivers/gpu/drm/panthor/panthor_pwr_regs.h
> index 9cf7a715066f8..80d8e1e522298 100644
> --- a/drivers/gpu/drm/panthor/panthor_pwr_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_pwr_regs.h
> @@ -20,12 +20,14 @@
>  #define   PWR_STATUS_ALLOW_L2				BIT_U64(0)
>  #define   PWR_STATUS_ALLOW_TILER			BIT_U64(1)
>  #define   PWR_STATUS_ALLOW_SHADER			BIT_U64(8)
> +#define   PWR_STATUS_ALLOW_NEURAL			BIT_U64(9)
>  #define   PWR_STATUS_ALLOW_BASE				BIT_U64(14)
>  #define   PWR_STATUS_ALLOW_STACK			BIT_U64(15)
>  #define   PWR_STATUS_DOMAIN_ALLOWED(x)			BIT_U64(x)
>  #define   PWR_STATUS_DELEGATED_L2			BIT_U64(16)
>  #define   PWR_STATUS_DELEGATED_TILER			BIT_U64(17)
>  #define   PWR_STATUS_DELEGATED_SHADER			BIT_U64(24)
> +#define   PWR_STATUS_DELEGATED_NEURAL			BIT_U64(25)
>  #define   PWR_STATUS_DELEGATED_BASE			BIT_U64(30)
>  #define   PWR_STATUS_DELEGATED_STACK			BIT_U64(31)
>  #define   PWR_STATUS_DELEGATED_SHIFT			16
> @@ -48,6 +50,7 @@
>  #define   PWR_COMMAND_DOMAIN_L2				0
>  #define   PWR_COMMAND_DOMAIN_TILER			1
>  #define   PWR_COMMAND_DOMAIN_SHADER			8
> +#define   PWR_COMMAND_DOMAIN_NEURAL			9
>  #define   PWR_COMMAND_DOMAIN_BASE			14
>  #define   PWR_COMMAND_DOMAIN_STACK			15
>  #define   PWR_COMMAND_SUBDOMAIN_RTU			BIT(0)
> @@ -68,6 +71,10 @@
>  #define PWR_SHADER_READY				0x208
>  #define PWR_SHADER_PWRTRANS				0x210
>  #define PWR_SHADER_PWRACTIVE				0x218
> +#define PWR_NEURAL_PRESENT				0x240
> +#define PWR_NEURAL_READY				0x248
> +#define PWR_NEURAL_PWRTRANS				0x250
> +#define PWR_NEURAL_PWRACTIVE				0x258
>  #define PWR_BASE_PRESENT				0x380
>  #define PWR_BASE_READY					0x388
>  #define PWR_BASE_PWRTRANS				0x390
> -- 
> 2.47.3
> 

-- 
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