From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
linux-rockchip@lists.infradead.org,
linux-phy@lists.infradead.org, Heiko Stuebner <heiko@sntech.de>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] phy: rockchip: snps-pcie3: Raise the SRAM init timeout
Date: Sat, 17 Oct 2026 22:08:48 +0200 [thread overview]
Message-ID: <atPVLyxH8mPglzQ0@venus> (raw)
In-Reply-To: <1792047775-77954-1-git-send-email-shawn.lin@rock-chips.com>
[-- Attachment #1.1: Type: text/plain, Size: 2447 bytes --]
Hi,
On Thu, Oct 15, 2026 at 03:02:55PM +0800, Shawn Lin wrote:
> The SRAM initialization of the PCIe3 PHY may take longer than the 500us
> currently allowed, especially on a slow power-up such as at low
> temperature. In that case the driver reports
>
> lock failed 0x..., check input refclk and power supply
>
> even though the input refclk and power supply are fine.
>
> Raise the timeout to 20ms and use a named constant for it, applied to
> both the RK3568 and RK3588 paths.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
>
> drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> index 4e8ffd1..bbbfd6d 100644
> --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> @@ -19,6 +19,8 @@
> #include <linux/regmap.h>
> #include <linux/reset.h>
>
> +#define RK_PCIE_SRAM_INIT_TIMEOUT 20000
#define RK_PCIE_SRAM_INIT_TIMEOUT_US 20 * USEC_PER_MSEC
Otherwise
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Greetings,
-- Sebastian
> +
> /* Register for RK3568 */
> #define GRF_PCIE30PHY_CON1 0x4
> #define GRF_PCIE30PHY_CON6 0x18
> @@ -127,7 +129,7 @@ static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv)
> ret = regmap_read_poll_timeout(priv->phy_grf,
> GRF_PCIE30PHY_STATUS0,
> reg, SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> if (ret)
> dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n",
> __func__, reg);
> @@ -187,11 +189,11 @@ static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv)
> ret = regmap_read_poll_timeout(priv->phy_grf,
> RK3588_PCIE3PHY_GRF_PHY0_STATUS1,
> reg, RK3588_SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> ret |= regmap_read_poll_timeout(priv->phy_grf,
> RK3588_PCIE3PHY_GRF_PHY1_STATUS1,
> reg, RK3588_SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> if (ret)
> dev_err(&priv->phy->dev, "lock failed 0x%x, check input refclk and power supply\n",
> reg);
> --
> 2.7.4
>
>
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--
linux-phy mailing list
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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
linux-rockchip@lists.infradead.org,
linux-phy@lists.infradead.org, Heiko Stuebner <heiko@sntech.de>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] phy: rockchip: snps-pcie3: Raise the SRAM init timeout
Date: Sat, 17 Oct 2026 22:08:48 +0200 [thread overview]
Message-ID: <atPVLyxH8mPglzQ0@venus> (raw)
In-Reply-To: <1792047775-77954-1-git-send-email-shawn.lin@rock-chips.com>
[-- Attachment #1.1: Type: text/plain, Size: 2447 bytes --]
Hi,
On Thu, Oct 15, 2026 at 03:02:55PM +0800, Shawn Lin wrote:
> The SRAM initialization of the PCIe3 PHY may take longer than the 500us
> currently allowed, especially on a slow power-up such as at low
> temperature. In that case the driver reports
>
> lock failed 0x..., check input refclk and power supply
>
> even though the input refclk and power supply are fine.
>
> Raise the timeout to 20ms and use a named constant for it, applied to
> both the RK3568 and RK3588 paths.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
>
> drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> index 4e8ffd1..bbbfd6d 100644
> --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> @@ -19,6 +19,8 @@
> #include <linux/regmap.h>
> #include <linux/reset.h>
>
> +#define RK_PCIE_SRAM_INIT_TIMEOUT 20000
#define RK_PCIE_SRAM_INIT_TIMEOUT_US 20 * USEC_PER_MSEC
Otherwise
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Greetings,
-- Sebastian
> +
> /* Register for RK3568 */
> #define GRF_PCIE30PHY_CON1 0x4
> #define GRF_PCIE30PHY_CON6 0x18
> @@ -127,7 +129,7 @@ static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv)
> ret = regmap_read_poll_timeout(priv->phy_grf,
> GRF_PCIE30PHY_STATUS0,
> reg, SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> if (ret)
> dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n",
> __func__, reg);
> @@ -187,11 +189,11 @@ static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv)
> ret = regmap_read_poll_timeout(priv->phy_grf,
> RK3588_PCIE3PHY_GRF_PHY0_STATUS1,
> reg, RK3588_SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> ret |= regmap_read_poll_timeout(priv->phy_grf,
> RK3588_PCIE3PHY_GRF_PHY1_STATUS1,
> reg, RK3588_SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> if (ret)
> dev_err(&priv->phy->dev, "lock failed 0x%x, check input refclk and power supply\n",
> reg);
> --
> 2.7.4
>
>
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_______________________________________________
Linux-rockchip mailing list
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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
linux-rockchip@lists.infradead.org,
linux-phy@lists.infradead.org, Heiko Stuebner <heiko@sntech.de>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] phy: rockchip: snps-pcie3: Raise the SRAM init timeout
Date: Sat, 17 Oct 2026 22:08:48 +0200 [thread overview]
Message-ID: <atPVLyxH8mPglzQ0@venus> (raw)
In-Reply-To: <1792047775-77954-1-git-send-email-shawn.lin@rock-chips.com>
[-- Attachment #1: Type: text/plain, Size: 2447 bytes --]
Hi,
On Thu, Oct 15, 2026 at 03:02:55PM +0800, Shawn Lin wrote:
> The SRAM initialization of the PCIe3 PHY may take longer than the 500us
> currently allowed, especially on a slow power-up such as at low
> temperature. In that case the driver reports
>
> lock failed 0x..., check input refclk and power supply
>
> even though the input refclk and power supply are fine.
>
> Raise the timeout to 20ms and use a named constant for it, applied to
> both the RK3568 and RK3588 paths.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
>
> drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> index 4e8ffd1..bbbfd6d 100644
> --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
> @@ -19,6 +19,8 @@
> #include <linux/regmap.h>
> #include <linux/reset.h>
>
> +#define RK_PCIE_SRAM_INIT_TIMEOUT 20000
#define RK_PCIE_SRAM_INIT_TIMEOUT_US 20 * USEC_PER_MSEC
Otherwise
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Greetings,
-- Sebastian
> +
> /* Register for RK3568 */
> #define GRF_PCIE30PHY_CON1 0x4
> #define GRF_PCIE30PHY_CON6 0x18
> @@ -127,7 +129,7 @@ static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv)
> ret = regmap_read_poll_timeout(priv->phy_grf,
> GRF_PCIE30PHY_STATUS0,
> reg, SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> if (ret)
> dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n",
> __func__, reg);
> @@ -187,11 +189,11 @@ static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv)
> ret = regmap_read_poll_timeout(priv->phy_grf,
> RK3588_PCIE3PHY_GRF_PHY0_STATUS1,
> reg, RK3588_SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> ret |= regmap_read_poll_timeout(priv->phy_grf,
> RK3588_PCIE3PHY_GRF_PHY1_STATUS1,
> reg, RK3588_SRAM_INIT_DONE(reg),
> - 0, 500);
> + 0, RK_PCIE_SRAM_INIT_TIMEOUT);
> if (ret)
> dev_err(&priv->phy->dev, "lock failed 0x%x, check input refclk and power supply\n",
> reg);
> --
> 2.7.4
>
>
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next prev parent reply other threads:[~2026-10-17 20:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 7:02 [PATCH] phy: rockchip: snps-pcie3: Raise the SRAM init timeout Shawn Lin
2026-10-15 7:02 ` Shawn Lin
2026-10-15 7:02 ` Shawn Lin
2026-10-15 7:12 ` sashiko-bot
2026-10-15 8:04 ` Shawn Lin
2026-10-15 8:04 ` Shawn Lin
2026-10-17 20:08 ` Sebastian Reichel [this message]
2026-10-17 20:08 ` Sebastian Reichel
2026-10-17 20:08 ` Sebastian Reichel
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