From: Chao Liu <chao.liu@processmission.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH] target/riscv: Use 1ULL for a value we're going to shift by 63
Date: Fri, 23 Oct 2026 09:51:50 +0800 [thread overview]
Message-ID: <atq9dL8HCwRuUpA-@MacBook-Pro-4.local> (raw)
In-Reply-To: <20261022201037.764619-1-peter.maydell@linaro.org>
On Thu, Oct 22, 2026 at 09:10:37PM +0800, Peter Maydell wrote:
> In prop_marchid_set() we set mxlen to either 32 or 64, and then
> calculate
> invalid_val = 1LL << (mxlen - 1);
>
> which shifts the signed value 1LL up into its sign bit when mxlen is
> 64, which Coverity complains about.
>
> This is not UB for QEMU because we use -fwrapv, but it makes more
> sense to use an explicitly unsigned 1ULL here when we clearly want to
> be treating it as an unsigned value and the 'invalid_val' variable is
> of type uint64_t.
>
> Resolves: Coverity CID 1547552
> Fixes: d6a427e2c0b24 ("target/riscv/cpu.c: restrict 'marchid' value")
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Chao Liu <chao.liu@processmission.com>
Thanks,
Chao
> ---
> target/riscv/cpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 08a4d14ea1f..d47a69bea7d 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -2298,7 +2298,7 @@ static void prop_marchid_set(Object *obj, Visitor *v, const char *name,
> g_assert_not_reached();
> }
>
> - invalid_val = 1LL << (mxlen - 1);
> + invalid_val = 1ULL << (mxlen - 1);
>
> if (value == invalid_val) {
> error_setg(errp, "Unable to set marchid with MSB (%u) bit set "
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-10-23 1:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-22 20:10 [PATCH] target/riscv: Use 1ULL for a value we're going to shift by 63 Peter Maydell
2026-10-22 20:39 ` Daniel Henrique Barboza
2026-10-23 1:51 ` Chao Liu [this message]
2026-10-23 2:03 ` Alistair Francis
2026-10-23 2:06 ` Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=atq9dL8HCwRuUpA-@MacBook-Pro-4.local \
--to=chao.liu@processmission.com \
--cc=alistair.francis@wdc.com \
--cc=daniel.barboza@oss.qualcomm.com \
--cc=liwei1518@gmail.com \
--cc=palmer@dabbelt.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.