* [PATCH] i386/cpu: Rename AVX10_VNNI_INT to AVX10_V1_AUX
@ 2026-10-27 8:30 Hao Xiang
2026-10-27 9:31 ` zhao1.liu
0 siblings, 1 reply; 2+ messages in thread
From: Hao Xiang @ 2026-10-27 8:30 UTC (permalink / raw)
To: qemu-devel, pbonzini, zhao1.liu, mst, farosas, lvivier
Rename AVX10_VNNI_INT is to AVX10_V1_AUX to match the most recent version
of the AVX10.2 spec (revision 7.0) [*]. Intel renamed the CPUID flag to
apply to a variety of "convert" instructions as well as VNNI instructions.
The recent KVM patch has renamed AVX10_VNNI_INT to AVX10_V1_AUX. QEMU needs
to update the CPUID macro, feature property, AVX10.2 feature model and
Diamond Rapids CPU definition. Keep the CPUID location and bit unchanged.
[*] Intel® Advanced Vector Extensions 10.2 Architecture Specification
(rev 7.0)
Signed-off-by: Hao Xiang <hao.xiang@linux.alibaba.com>
---
target/i386/cpu.c | 6 +++---
target/i386/cpu.h | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 9b9ed2d1e3..e7e35c3f5b 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1366,7 +1366,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
[FEAT_24_1_ECX] = {
.type = CPUID_FEATURE_WORD,
.feat_names = {
- [2] = "avx10-vnni-int",
+ [2] = "avx10-v1-aux",
},
.cpuid = {
.eax = 0x24,
@@ -2387,7 +2387,7 @@ static const AVX10VersionDefinition
builtin_avx10_defs[] = {
.version = 2,
.max_subleaf = 1,
.features = (FeatureMask[]) {
- { FEAT_24_1_ECX, CPUID_24_1_ECX_AVX10_VNNI_INT },
+ { FEAT_24_1_ECX, CPUID_24_1_ECX_AVX10_V1_AUX },
{ /* end of list */ }
}
},
@@ -5538,7 +5538,7 @@ static const X86CPUDefinition builtin_x86_defs[] = {
* Though this bit will be set by avx_version=2, it's better to
* explicitly enumerate this feature here.
*/
- .features[FEAT_24_1_ECX] = CPUID_24_1_ECX_AVX10_VNNI_INT,
+ .features[FEAT_24_1_ECX] = CPUID_24_1_ECX_AVX10_V1_AUX,
.features[FEAT_8000_0001_ECX] =
CPUID_EXT3_LAHF_LM | CPUID_EXT3_ABM |
CPUID_EXT3_3DNOWPREFETCH,
.features[FEAT_8000_0001_EDX] =
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9f222a0c9f..6f7230031b 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1126,8 +1126,8 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU
*cpu, FeatureWord w);
CPUID_24_0_EBX_AVX10_256 | \
CPUID_24_0_EBX_AVX10_512)
-/* AVX10_VNNI_INT instruction */
-#define CPUID_24_1_ECX_AVX10_VNNI_INT (1U << 2)
+/* AVX10_V1_AUX instruction */
+#define CPUID_24_1_ECX_AVX10_V1_AUX (1U << 2)
/*
* New Conditional Instructions (NCIs), explicit New Data Destination
(NDD)
--
2.51.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] i386/cpu: Rename AVX10_VNNI_INT to AVX10_V1_AUX
2026-10-27 8:30 [PATCH] i386/cpu: Rename AVX10_VNNI_INT to AVX10_V1_AUX Hao Xiang
@ 2026-10-27 9:31 ` zhao1.liu
0 siblings, 0 replies; 2+ messages in thread
From: zhao1.liu @ 2026-10-27 9:31 UTC (permalink / raw)
To: Hao Xiang; +Cc: qemu-devel, pbonzini, mst, farosas, lvivier, Zhao Liu
Hi Xiang,
On Tue, Oct 27, 2026 at 04:30:27PM +0800, Hao Xiang wrote:
> Date: Tue, 27 Oct 2026 16:30:27 +0800
> From: Hao Xiang <hao.xiang@linux.alibaba.com>
> Subject: [PATCH] i386/cpu: Rename AVX10_VNNI_INT to AVX10_V1_AUX
> X-Mailer: [Alimail-Mailagent revision 74][W4_0.2.3][v5ForWebDing][Chrome]
>
> Rename AVX10_VNNI_INT is to AVX10_V1_AUX to match the most recent version
> of the AVX10.2 spec (revision 7.0) [*]. Intel renamed the CPUID flag to
> apply to a variety of "convert" instructions as well as VNNI instructions.
>
> The recent KVM patch has renamed AVX10_VNNI_INT to AVX10_V1_AUX. QEMU needs
> to update the CPUID macro, feature property, AVX10.2 feature model and
> Diamond Rapids CPU definition. Keep the CPUID location and bit unchanged.
>
> [*] Intel® Advanced Vector Extensions 10.2 Architecture Specification
> (rev 7.0)
>
> Signed-off-by: Hao Xiang <hao.xiang@linux.alibaba.com>
> ---
> target/i386/cpu.c | 6 +++---
> target/i386/cpu.h | 4 ++--
> 2 files changed, 5 insertions(+), 5 deletions(-)
Thanks for this patch! I posted something similar before :)
https://lore.kernel.org/qemu-devel/20260930045237.784060-1-zhao1.liu@intel.com/
(There is one additional change: I add an alias for the vnni-int bit to avoid
potential API compatibility issues.)
Regards,
Zhao
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