* [PATCH v11 00/10] Introduce Xe PCIe FLR
@ 2026-10-26 5:06 Raag Jadav
2026-10-26 5:06 ` [PATCH v11 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
` (9 more replies)
0 siblings, 10 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
Here's my humble attempt at introducing PCIe Function Level Reset (FLR)
support in xe driver. This is ofcourse a half baked implementation and
only limited to re-initializing GT. This needs to be extended for a lot
of components which are expected to be added as a follow up.
Detailed description in commit message and documentation.
PS: All xe_exec_basic tests and clpeak run smoothly after FLR. Give it
a spin and let me know if any regressions.
Trigger it with:
$ echo 1 > /sys/bus/pci/devices/<BDF>/reset
v2: Re-initialize migrate context (Matthew Brost)
Add kernel doc (Matthew Brost)
Spell out Function Level Reset (Jani)
v3: Cancel in-flight jobs before FLR
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v5: Re-initialize kernel queues through submission backend (Matthew Brost)
Prevent PM ref leak for wedged device (Matthew Brost)
v6: Skip uC firmware selection during re-initialization (Daniele)
Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
s/flr_done/reinit (Daniele)
Repurpose system suspend/resume helpers for FLR (Daniele)
Add PCIe FLR documentation (Daniele)
v7: Refine PCIe FLR documentation (Daniele)
Introduce xe_pci_reset_skip() helper (Lukasz)
v8: Set fw state to XE_UC_FIRMWARE_INIT_FAIL on failure (Daniele)
Introduce xe_sched_reinit() (Daniele)
Maintain timeout per scheduler instance (Daniele)
s/reinit/reinit_kernel (Daniele)
v9: Move drm_sched_is_stopped() assert to xe_sched_reinit() (Daniele)
Add negative asserts for GSC and PXP (Daniele)
Provide xe_lrc_ctx_init() as regular function (Daniele)
Redesign wedged state management to prevent races (Sashiko)
Add 'Xe' prefix to document title (Rodrigo)
v10: Spell out temporary device wedging in subject (Lukasz)
Update documentation to include PCI Error Handling (Lukasz)
Maintain wedge reference on FLR failure (Lukasz)
v11: Wait for xe_pcode_ready() before resume (Riana)
Update GuC CT path to check against permanent wedging (Lukasz, Riana)
Put wedge reference only if device is wedged during resume() (Riana)
Cleanup wedge reference logic in ->reset_prepare() (Lukasz)
Use 'PCI reset' in logs (Riana)
Raag Jadav (10):
drm/xe/uc_fw: Allow re-initializing firmware
drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
drm/xe/gt: Introduce FLR helpers
drm/xe/bo_evict: Introduce xe_bo_restore_map()
drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
drm/xe/migrate: Introduce xe_migrate_reinit()
drm/xe/pm: Introduce xe_device_suspend/resume()
drm/xe: Introduce temporary device wedging
drm/xe/pci: Introduce PCIe Function Level Reset
drm/xe/doc: Wire up PCI Error Handling
Documentation/gpu/xe/index.rst | 1 +
Documentation/gpu/xe/xe_pci_error.rst | 8 ++
drivers/gpu/drm/xe/xe_bo_evict.c | 43 +++++-
drivers/gpu/drm/xe/xe_bo_evict.h | 1 +
drivers/gpu/drm/xe/xe_device.c | 147 +++++++++++++++++++
drivers/gpu/drm/xe/xe_device.h | 2 +
drivers/gpu/drm/xe/xe_device_types.h | 3 +
drivers/gpu/drm/xe/xe_exec_queue.c | 47 +++++-
drivers/gpu/drm/xe/xe_exec_queue.h | 1 +
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 +
drivers/gpu/drm/xe/xe_execlist.c | 6 +
drivers/gpu/drm/xe/xe_gpu_scheduler.c | 17 +++
drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
drivers/gpu/drm/xe/xe_gpu_scheduler_types.h | 5 +
drivers/gpu/drm/xe/xe_gsc.c | 14 ++
drivers/gpu/drm/xe/xe_gsc.h | 1 +
drivers/gpu/drm/xe/xe_gt.c | 33 +++++
drivers/gpu/drm/xe/xe_gt.h | 2 +
drivers/gpu/drm/xe/xe_guc.c | 29 ++++
drivers/gpu/drm/xe/xe_guc.h | 2 +
drivers/gpu/drm/xe/xe_guc_ct.c | 6 +-
drivers/gpu/drm/xe/xe_guc_submit.c | 9 ++
drivers/gpu/drm/xe/xe_huc.c | 14 ++
drivers/gpu/drm/xe/xe_huc.h | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 15 +-
drivers/gpu/drm/xe/xe_lrc.h | 2 +
drivers/gpu/drm/xe/xe_migrate.c | 12 ++
drivers/gpu/drm/xe/xe_migrate.h | 1 +
drivers/gpu/drm/xe/xe_pci.c | 2 +
drivers/gpu/drm/xe/xe_pci_error.c | 152 +++++++++++++++++++-
drivers/gpu/drm/xe/xe_pm.c | 103 ++-----------
drivers/gpu/drm/xe/xe_uc.c | 74 ++++++++++
drivers/gpu/drm/xe/xe_uc.h | 2 +
drivers/gpu/drm/xe/xe_uc_fw.c | 67 +++++++++
drivers/gpu/drm/xe/xe_uc_fw.h | 1 +
drivers/gpu/drm/xe/xe_uc_types.h | 14 ++
drivers/gpu/drm/xe/xe_wedge.c | 58 +++++++-
drivers/gpu/drm/xe/xe_wedge.h | 5 +-
drivers/gpu/drm/xe/xe_wedge_types.h | 13 +-
39 files changed, 794 insertions(+), 122 deletions(-)
create mode 100644 Documentation/gpu/xe/xe_pci_error.rst
--
2.43.0
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v11 01/10] drm/xe/uc_fw: Allow re-initializing firmware
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
` (8 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing firmware without
reloading the driver, introduce xe_uc_fw_reinit(). The uC firmware bo
already exists but since it's contents are on VRAM, they are lost on PCIe
FLR. Copy the firmware back to it's bo and mark it as loadable as part of
re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v6: Skip uC firmware selection during re-initialization (Daniele)
v8: Set fw state to XE_UC_FIRMWARE_INIT_FAIL on failure (Daniele)
---
drivers/gpu/drm/xe/xe_uc_fw.c | 67 +++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_uc_fw.h | 1 +
2 files changed, 68 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index 9a92251e2312..a7304b2a0d76 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -837,6 +837,14 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
return err;
}
+static void uc_fw_reinit(struct xe_uc_fw *uc_fw, const void *data)
+{
+ struct xe_device *xe = uc_fw_to_xe(uc_fw);
+
+ xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
+ xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOADABLE);
+}
+
int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
{
const struct firmware *fw = NULL;
@@ -860,6 +868,65 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
}
ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
+/**
+ * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
+ * @uc_fw: uC firmware
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
+{
+ struct xe_device *xe = uc_fw_to_xe(uc_fw);
+ struct xe_uc_fw_version old_fw, new_fw;
+ const struct firmware *fw = NULL;
+ int err;
+
+ /* Make sure the status was cleared the last time we reset the uc */
+ xe_assert(xe, !xe_uc_fw_is_loaded(uc_fw));
+
+ /* We shouldn't be here for the firmware which wasn't available */
+ if (!xe_uc_fw_is_available(uc_fw))
+ return -ENOEXEC;
+
+ old_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+
+ err = firmware_request_nowarn(&fw, uc_fw->path, xe->drm.dev);
+ if (err)
+ goto init_fail;
+
+ err = parse_headers(uc_fw, fw);
+ if (err)
+ goto restore_old;
+
+ new_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+ if (memcmp(&old_fw, &new_fw, sizeof(old_fw)) || uc_fw->size != fw->size) {
+ drm_err(&xe->drm, "%s firmware mismatch on %s",
+ xe_uc_fw_type_repr(uc_fw->type), uc_fw->path);
+
+ err = -ENOEXEC;
+ goto restore_old;
+ }
+
+ uc_fw_reinit(uc_fw, fw->data);
+ uc_fw_release(fw);
+ return 0;
+
+restore_old:
+ /*
+ * parse_headers() updates version details, so restore original version
+ * before bailing.
+ *
+ * TODO: Create a struct of all the fields touched by parse_headers()
+ * and restore them all.
+ */
+ uc_fw->versions.found[XE_UC_FW_VER_RELEASE] = old_fw;
+init_fail:
+ xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_INIT_FAIL);
+ /* OK even if fw is NULL */
+ uc_fw_release(fw);
+ return err;
+}
+
static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
{
return xe_bo_ggtt_addr(uc_fw->bo);
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index f2d3a3e7208b..6debdb924310 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
struct drm_printer;
int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw);
size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-10-26 5:06 ` [PATCH v11 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
` (7 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing GuC submission
after PCIe FLR, introduce guc_exec_queue_reinit_kernel() helper. This will
restore kernel queues which might have been killed before PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v5: Re-initialize kernel queues through submission backend (Matthew Brost)
v8: Introduce xe_sched_reinit() (Daniele)
Maintain timeout per scheduler instance (Daniele)
s/reinit/reinit_kernel (Daniele)
v9: Move drm_sched_is_stopped() assert to xe_sched_reinit() (Daniele)
---
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 ++
drivers/gpu/drm/xe/xe_execlist.c | 6 ++++++
drivers/gpu/drm/xe/xe_gpu_scheduler.c | 17 +++++++++++++++++
drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
drivers/gpu/drm/xe/xe_gpu_scheduler_types.h | 5 +++++
drivers/gpu/drm/xe/xe_guc_submit.c | 9 +++++++++
6 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index 48c05398b016..44a41ddc7a05 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -292,6 +292,8 @@ struct xe_exec_queue {
struct xe_exec_queue_ops {
/** @init: Initialize exec queue for submission backend */
int (*init)(struct xe_exec_queue *q);
+ /** @reinit_kernel: Re-initialize kernel queue for submission backend */
+ void (*reinit_kernel)(struct xe_exec_queue *q);
/** @kill: Kill inflight submissions for backend */
void (*kill)(struct xe_exec_queue *q);
/** @fini: Undoes the init() for submission backend */
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index a6984999962d..47ed4c0e2bfe 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -407,6 +407,11 @@ static void execlist_exec_queue_destroy_async(struct work_struct *w)
drm_dev_put(&xe->drm);
}
+static void execlist_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+ /* NIY */
+}
+
static void execlist_exec_queue_kill(struct xe_exec_queue *q)
{
/* NIY */
@@ -465,6 +470,7 @@ static u64 execlist_exec_queue_reset_status(struct xe_exec_queue *q)
static const struct xe_exec_queue_ops execlist_exec_queue_ops = {
.init = execlist_exec_queue_init,
+ .reinit_kernel = execlist_exec_queue_reinit_kernel,
.kill = execlist_exec_queue_kill,
.fini = execlist_exec_queue_fini,
.destroy = execlist_exec_queue_destroy,
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
index 9c8004d5dd91..0ef77cdec51d 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
@@ -3,7 +3,10 @@
* Copyright © 2023 Intel Corporation
*/
+#include "xe_assert.h"
+#include "xe_exec_queue_types.h"
#include "xe_gpu_scheduler.h"
+#include "xe_guc_exec_queue_types.h"
static void xe_sched_process_msg_queue(struct xe_gpu_scheduler *sched)
{
@@ -77,6 +80,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
};
sched->ops = xe_ops;
+ sched->timeout = timeout;
spin_lock_init(&sched->msg_lock);
INIT_LIST_HEAD(&sched->msgs);
INIT_WORK(&sched->work_process_msg, xe_sched_process_msg_work);
@@ -84,6 +88,19 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
return drm_sched_init(&sched->base, &args);
}
+void xe_sched_reinit(struct xe_gpu_scheduler *sched)
+{
+ struct xe_guc_exec_queue *ge = container_of(sched, struct xe_guc_exec_queue, sched);
+
+ xe_gt_assert(ge->q->gt, drm_sched_is_stopped(&sched->base));
+
+ /*
+ * TODO: Implement drm_sched_reinit() instead of requiring the
+ * driver to restore individual fields.
+ */
+ sched->base.timeout = sched->timeout;
+}
+
void xe_sched_fini(struct xe_gpu_scheduler *sched)
{
xe_sched_submission_stop(sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 664c2db56af3..22e24b4b7171 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -17,6 +17,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
long timeout, struct workqueue_struct *timeout_wq,
atomic_t *score, const char *name,
struct device *dev);
+void xe_sched_reinit(struct xe_gpu_scheduler *sched);
void xe_sched_fini(struct xe_gpu_scheduler *sched);
void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
index 78ef2e8ded4f..f40764aa78e0 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
@@ -54,6 +54,11 @@ struct xe_gpu_scheduler {
spinlock_t msg_lock;
/** @work_process_msg: processes messages */
struct work_struct work_process_msg;
+ /**
+ * @timeout: timeout for the scheduler instance, to be restored
+ * during exec queue re-initialization
+ */
+ long timeout;
};
#define xe_sched_entity drm_sched_entity
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 7e2ce1a79a75..7cfe54dfc19f 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2225,6 +2225,14 @@ static int guc_exec_queue_init(struct xe_exec_queue *q)
return err;
}
+static void guc_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+ xe_gt_assert(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+ atomic_set(&q->guc->state, 0);
+ xe_sched_reinit(&q->guc->sched);
+}
+
static void guc_exec_queue_kill(struct xe_exec_queue *q)
{
trace_xe_exec_queue_kill(q);
@@ -2719,6 +2727,7 @@ static u64 guc_exec_queue_reset_status(struct xe_exec_queue *q)
*/
static const struct xe_exec_queue_ops guc_exec_queue_ops = {
.init = guc_exec_queue_init,
+ .reinit_kernel = guc_exec_queue_reinit_kernel,
.kill = guc_exec_queue_kill,
.fini = guc_exec_queue_fini,
.destroy = guc_exec_queue_destroy,
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 03/10] drm/xe/gt: Introduce FLR helpers
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-10-26 5:06 ` [PATCH v11 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-10-26 5:06 ` [PATCH v11 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
` (6 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require preparing/re-initializing GT and
all its uCs before/after PCIe FLR, introduce flr_prepare/reinit() helpers.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v6: Add IS_DGFX() assert (Daniele)
s/flr_done/reinit (Daniele)
---
drivers/gpu/drm/xe/xe_gsc.c | 14 ++++++
drivers/gpu/drm/xe/xe_gsc.h | 1 +
drivers/gpu/drm/xe/xe_gt.c | 23 ++++++++++
drivers/gpu/drm/xe/xe_gt.h | 2 +
drivers/gpu/drm/xe/xe_guc.c | 29 +++++++++++++
drivers/gpu/drm/xe/xe_guc.h | 2 +
drivers/gpu/drm/xe/xe_huc.c | 14 ++++++
drivers/gpu/drm/xe/xe_huc.h | 1 +
drivers/gpu/drm/xe/xe_uc.c | 74 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_uc.h | 2 +
drivers/gpu/drm/xe/xe_uc_types.h | 14 ++++++
11 files changed, 176 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index db669a953886..8edb8cee3cbd 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -550,6 +550,20 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
flush_work(&gsc->work);
}
+/**
+ * xe_gsc_reinit() - Re-initialize GSC after FLR
+ * @gsc: The GSC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gsc_reinit(struct xe_gsc *gsc)
+{
+ if (!xe_uc_fw_is_loadable(&gsc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&gsc->fw);
+}
+
void xe_gsc_stop_prepare(struct xe_gsc *gsc)
{
struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..ce390bffb163 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -15,6 +15,7 @@ struct xe_hw_engine;
int xe_gsc_init(struct xe_gsc *gsc);
int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
+int xe_gsc_reinit(struct xe_gsc *gsc);
void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
void xe_gsc_stop_prepare(struct xe_gsc *gsc);
void xe_gsc_load_start(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 60d35ada2853..d7cc6668a63b 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -945,6 +945,29 @@ static int do_gt_restart(struct xe_gt *gt)
return 0;
}
+/**
+ * xe_gt_flr_prepare() - Prepare GT for FLR
+ * @gt: the GT object
+ *
+ * Prepare all GT uCs for FLR.
+ */
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+ xe_gt_sanitize(gt);
+ xe_uc_flr_prepare(>->uc);
+}
+
+/**
+ * xe_gt_reinit() - Re-initialize GT after FLR
+ * @gt: the GT object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gt_reinit(struct xe_gt *gt)
+{
+ return xe_uc_reinit(>->uc);
+}
+
static void gt_reset_worker(struct work_struct *w)
{
struct xe_gt *gt = container_of(w, typeof(*gt), reset.worker);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 7b6952fe804c..59787e634cc2 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -37,8 +37,10 @@
})
struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
+void xe_gt_flr_prepare(struct xe_gt *gt);
int xe_gt_init_early(struct xe_gt *gt);
int xe_gt_init(struct xe_gt *gt);
+int xe_gt_reinit(struct xe_gt *gt);
void xe_gt_mmio_init(struct xe_gt *gt);
void xe_gt_wedge_declare(struct xe_gt *gt);
int xe_gt_record_default_lrcs(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index b1f4e132fa0c..e79f6c9a9519 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1727,6 +1727,35 @@ void xe_guc_sanitize(struct xe_guc *guc)
xe_guc_submit_disable(guc);
}
+/**
+ * xe_guc_flr_prepare() - Prepare GuC for FLR
+ * @guc: The GuC object
+ *
+ * Stop GuC submission and tear down exec queues.
+ */
+void xe_guc_flr_prepare(struct xe_guc *guc)
+{
+ if (!xe_uc_fw_is_loadable(&guc->fw))
+ return;
+
+ xe_guc_submit_stop(guc);
+ xe_guc_submit_pause_abort(guc);
+}
+
+/**
+ * xe_guc_reinit() - Re-initialize GuC after FLR
+ * @guc: The GuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_guc_reinit(struct xe_guc *guc)
+{
+ if (!xe_uc_fw_is_loadable(&guc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&guc->fw);
+}
+
int xe_guc_reset_prepare(struct xe_guc *guc)
{
return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 75c4b9acb065..e8e7d96fafef 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -33,10 +33,12 @@ struct drm_printer;
struct xe_gt;
void xe_guc_comm_init_early(struct xe_guc *guc);
+void xe_guc_flr_prepare(struct xe_guc *guc);
int xe_guc_init_noalloc(struct xe_guc *guc);
int xe_guc_init(struct xe_guc *guc);
int xe_guc_init_post_hwconfig(struct xe_guc *guc);
int xe_guc_post_load_init(struct xe_guc *guc);
+int xe_guc_reinit(struct xe_guc *guc);
int xe_guc_reset(struct xe_guc *guc);
int xe_guc_upload(struct xe_guc *guc);
int xe_guc_min_load_for_hwconfig(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..c73e1acbd091 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,20 @@ void xe_huc_sanitize(struct xe_huc *huc)
xe_uc_fw_sanitize(&huc->fw);
}
+/**
+ * xe_huc_reinit() - Re-initialize HuC after FLR
+ * @huc: The HuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_huc_reinit(struct xe_huc *huc)
+{
+ if (!xe_uc_fw_is_loadable(&huc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&huc->fw);
+}
+
void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
{
struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..cb1a770b4a9c 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -19,6 +19,7 @@ enum xe_huc_auth_types {
int xe_huc_init(struct xe_huc *huc);
int xe_huc_init_post_hwconfig(struct xe_huc *huc);
+int xe_huc_reinit(struct xe_huc *huc);
int xe_huc_upload(struct xe_huc *huc);
int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type);
bool xe_huc_is_authenticated(struct xe_huc *huc, enum xe_huc_auth_types type);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 686c28856014..17b8f7a8f0f8 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -18,6 +18,8 @@
#include "xe_guc_submit.h"
#include "xe_huc.h"
#include "xe_sriov.h"
+#include "xe_uc_fw.h"
+#include "xe_wedge.h"
#include "xe_wopcm.h"
static struct xe_gt *
@@ -278,6 +280,78 @@ static void uc_reset_wait(struct xe_uc *uc)
goto again;
}
+static void uc_flr_prepare(struct work_struct *w)
+{
+ struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+ struct xe_uc *uc = flr->uc;
+
+ xe_gt_assert(uc_to_gt(uc), xe_wedged(uc_to_xe(uc)));
+
+ xe_uc_reset_prepare(uc);
+ xe_guc_flr_prepare(&uc->guc);
+}
+
+static void uc_flr_sanitize(struct work_struct *w)
+{
+ struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+ struct xe_uc *uc = flr->uc;
+
+ /* TODO: Sanitize GSC firmware */
+ xe_gt_assert(uc_to_gt(uc), IS_DGFX(uc_to_xe(uc)));
+ xe_gt_assert(uc_to_gt(uc), !xe_uc_fw_is_loadable(&uc->gsc.fw));
+
+ xe_uc_stop(uc);
+ xe_uc_sanitize(uc);
+}
+
+/**
+ * xe_uc_flr_prepare() - Prepare uCs for FLR
+ * @uc: The uC object
+ *
+ * Tear down pending work and stop all uCs.
+ */
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+ struct xe_uc_flr flr = { .uc = uc };
+ struct xe_gt *gt = uc_to_gt(uc);
+
+ /*
+ * We'll be tearing down exec queues which signals all fences and frees the
+ * jobs but all of that happens asynchronously, so make sure we don't disrupt
+ * the scheduler while jobs are still in-flight.
+ */
+ INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
+ queue_work(gt->ordered_wq, &flr.work);
+ flush_work(&flr.work);
+ destroy_work_on_stack(&flr.work);
+
+ INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
+ queue_work(gt->ordered_wq, &flr.work);
+ flush_work(&flr.work);
+ destroy_work_on_stack(&flr.work);
+}
+
+/**
+ * xe_uc_reinit() - Re-initialize uCs after FLR
+ * @uc: The uC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_reinit(struct xe_uc *uc)
+{
+ int ret;
+
+ ret = xe_guc_reinit(&uc->guc);
+ if (ret)
+ return ret;
+
+ ret = xe_huc_reinit(&uc->huc);
+ if (ret)
+ return ret;
+
+ return xe_gsc_reinit(&uc->gsc);
+}
+
void xe_uc_suspend_prepare(struct xe_uc *uc)
{
xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 23bc0ce1c42f..b4684a628b20 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,10 +8,12 @@
struct xe_uc;
+void xe_uc_flr_prepare(struct xe_uc *uc);
int xe_uc_init_noalloc(struct xe_uc *uc);
int xe_uc_init(struct xe_uc *uc);
int xe_uc_init_post_hwconfig(struct xe_uc *uc);
int xe_uc_load_hw(struct xe_uc *uc);
+int xe_uc_reinit(struct xe_uc *uc);
int xe_uc_reset_prepare(struct xe_uc *uc);
void xe_uc_runtime_resume(struct xe_uc *uc);
void xe_uc_runtime_suspend(struct xe_uc *uc);
diff --git a/drivers/gpu/drm/xe/xe_uc_types.h b/drivers/gpu/drm/xe/xe_uc_types.h
index 1708379dc834..2b47382f7b3b 100644
--- a/drivers/gpu/drm/xe/xe_uc_types.h
+++ b/drivers/gpu/drm/xe/xe_uc_types.h
@@ -25,4 +25,18 @@ struct xe_uc {
struct xe_wopcm wopcm;
};
+/**
+ * struct xe_uc_flr - uC FLR teardown
+ */
+struct xe_uc_flr {
+ /** @uc: uC to schedule FLR worker on */
+ struct xe_uc *uc;
+
+ /**
+ * @work: worker for FLR teardown to be done async allowing to safely
+ * flush all code paths
+ */
+ struct work_struct work;
+};
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map()
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
` (2 preceding siblings ...)
2026-10-26 5:06 ` [PATCH v11 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
` (5 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav, Varun Gupta
PCIe FLR clears all hardware state along with GGTT mappings of all
existing bos. Iterate over early and late kernel bo list and restore
their GGTT mappings in hardware, so that driver can make use of them
during re-initialization after PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Varun Gupta <varun.gupta@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
drivers/gpu/drm/xe/xe_bo_evict.c | 43 ++++++++++++++++++++++++++------
drivers/gpu/drm/xe/xe_bo_evict.h | 1 +
2 files changed, 37 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 7661fca7f278..16f8cec4934e 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
xe_bo_evict_pinned);
}
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
{
- int ret;
-
- ret = xe_bo_restore_pinned(bo);
- if (ret)
- return ret;
-
if (bo->flags & XE_BO_FLAG_GGTT) {
struct xe_tile *tile;
u8 id;
@@ -212,6 +206,41 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
return 0;
}
+/**
+ * xe_bo_restore_map() - Restore GGTT mappings of kernel bos
+ * @xe: xe device
+ *
+ * PCIe FLR clears all hardware state along with GGTT mappings of all
+ * existing bos. Iterate over early and late kernel bo list and restore
+ * their GGTT mappings in hardware, so that driver can make use of them
+ * during re-initialization after PCIe FLR.
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_bo_restore_map(struct xe_device *xe)
+{
+ int ret;
+
+ ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+ &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+ if (!ret)
+ ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+ &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+ return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+ int ret;
+
+ ret = xe_bo_restore_pinned(bo);
+ if (ret)
+ return ret;
+
+ return xe_bo_map_ggtt(bo);
+}
+
/**
* xe_bo_restore_early - restore early phase kernel BOs to VRAM
*
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..aabba06f0abf 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,6 +14,7 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
int xe_bo_restore_early(struct xe_device *xe);
int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
void xe_bo_pci_dev_remove_all(struct xe_device *xe);
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
` (3 preceding siblings ...)
2026-10-26 5:06 ` [PATCH v11 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
` (4 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
v6: Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
v9: Add negative asserts for GSC and PXP (Daniele)
Provide xe_lrc_ctx_init() as regular function (Daniele)
---
drivers/gpu/drm/xe/xe_exec_queue.c | 47 +++++++++++++++++++++++++++---
drivers/gpu/drm/xe/xe_exec_queue.h | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 15 ++++++++--
drivers/gpu/drm/xe/xe_lrc.h | 2 ++
4 files changed, 59 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 9a8efa2bf2bf..f929e8ea8af5 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -28,6 +28,7 @@
#include "xe_migrate.h"
#include "xe_pm.h"
#include "xe_trace.h"
+#include "xe_uc_fw.h"
#include "xe_vm.h"
#include "xe_pxp.h"
@@ -390,9 +391,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
xe_lrc_put(q->lrc[i]);
}
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
{
- int i, err;
u32 flags = 0;
/*
@@ -415,6 +415,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
if (q->flags & EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX)
flags |= XE_LRC_DISABLE_STATE_CACHE_PERF_FIX;
+ return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+ int i, err;
+
err = q->ops->init(q);
if (err)
return err;
@@ -438,8 +445,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
- lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
- xe_lrc_ring_size(), q->msix_vec, flags);
+ lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+ q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
if (IS_ERR(lrc)) {
err = PTR_ERR(lrc);
goto err_lrc;
@@ -461,6 +468,38 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
return err;
}
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+ struct xe_gt *gt = q->gt;
+ int i, err;
+
+ /* TODO: Re-initialize GSC and PXP queues */
+ xe_gt_assert(gt, IS_DGFX(gt_to_xe(gt)));
+ xe_gt_assert(gt, !xe_uc_fw_is_loadable(>->uc.gsc.fw));
+ xe_gt_assert(gt, !xe_pxp_is_enabled(gt_to_xe(gt)->pxp));
+
+ /* Re-initialization only allowed for kernel queues */
+ xe_gt_assert(gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+ /* Re-initialize submission backend */
+ q->ops->reinit_kernel(q);
+
+ for (i = 0; i < q->width; i++) {
+ err = xe_lrc_ctx_init(q->lrc[i], q->hwe, q->vm, q->replay_state,
+ q->msix_vec, xe_lrc_init_flags(q, q->flags));
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
/**
* xe_exec_queue_create() - Create an exec queue
* @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index e8963f85cabd..d48775ef6baf 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
void xe_exec_queue_fini(struct xe_exec_queue *q);
void xe_exec_queue_destroy(struct kref *ref);
void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
static inline struct xe_exec_queue *
xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 040a52f9320e..8e4f767d7f59 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1536,8 +1536,19 @@ static void xe_lrc_set_gpgpu_preemption_level(struct xe_lrc *lrc, struct xe_gt *
xe_lrc_write_ctx_reg(lrc, CTX_CS_CHICKEN1, val);
}
-static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
- void *replay_state, u16 msix_vec, u32 init_flags)
+/**
+ * xe_lrc_ctx_init() - Initialize LRC with context details
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags)
{
struct xe_gt *gt = hwe->gt;
struct xe_tile *tile = gt_to_tile(gt);
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index f2e829e62168..840f303db97e 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -63,6 +63,8 @@ struct xe_lrc_snapshot {
struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags);
void xe_lrc_destroy(struct kref *ref);
/**
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 06/10] drm/xe/migrate: Introduce xe_migrate_reinit()
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
` (4 preceding siblings ...)
2026-10-26 5:06 ` [PATCH v11 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
` (3 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing migrate context
after PCIe FLR, introduce xe_migrate_reinit() helper. Migrate exec queue
and pt_bo already exist in migrate structure but since their contents live
on VRAM, they are lost on PCIe FLR and need re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
drivers/gpu/drm/xe/xe_gt.c | 10 ++++++++++
drivers/gpu/drm/xe/xe_migrate.c | 12 ++++++++++++
drivers/gpu/drm/xe/xe_migrate.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index d7cc6668a63b..751d4ee9934d 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -965,6 +965,16 @@ void xe_gt_flr_prepare(struct xe_gt *gt)
*/
int xe_gt_reinit(struct xe_gt *gt)
{
+ int err;
+
+ if (xe_gt_is_main_type(gt)) {
+ struct xe_tile *tile = gt_to_tile(gt);
+
+ err = xe_migrate_reinit(tile->migrate);
+ if (err)
+ return err;
+ }
+
return xe_uc_reinit(>->uc);
}
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 70408fa0a606..4527ae3dbea1 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -778,6 +778,18 @@ static void xe_migrate_ulls_exit(struct work_struct *work)
drm_dev_exit(idx);
}
+/**
+ * xe_migrate_reinit() - Re-initialize a migrate context
+ * @m: The migration context
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_migrate_reinit(struct xe_migrate *m)
+{
+ xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
+ return xe_exec_queue_reinit(m->q);
+}
+
/**
* xe_migrate_init() - Initialize a migrate context
* @m: The migration context
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 2e8be10fdb71..100b485e519b 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -36,6 +36,7 @@ enum xe_migrate_copy_dir {
struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_reinit(struct xe_migrate *m);
struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
unsigned long npages,
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 07/10] drm/xe/pm: Introduce xe_device_suspend/resume()
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
` (5 preceding siblings ...)
2026-10-26 5:06 ` [PATCH v11 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
` (2 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
PCIe FLR prepare/re-initialization flows pretty much reflect system
suspend/resume flows with a few notable exceptions. Repurpose existing
helpers for PCIe FLR with an explicit flag to distinguish between both
flows.
Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
v6: Repurpose system suspend/resume helpers for FLR (Daniele)
v11: Wait for xe_pcode_ready() before resume (Riana)
---
drivers/gpu/drm/xe/xe_device.c | 147 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_device.h | 2 +
drivers/gpu/drm/xe/xe_pm.c | 103 ++---------------------
3 files changed, 157 insertions(+), 95 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index a07655b4c7a9..a0be738068cc 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -39,6 +39,7 @@
#include "xe_force_wake.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
+#include "xe_gt_idle.h"
#include "xe_gt_mcr.h"
#include "xe_gt_printk.h"
#include "xe_gt_sriov_vf.h"
@@ -69,6 +70,7 @@
#include "xe_soc_remapper.h"
#include "xe_survivability_mode.h"
#include "xe_sriov.h"
+#include "xe_sriov_vf_ccs.h"
#include "xe_svm.h"
#include "xe_sysctrl.h"
#include "xe_tile.h"
@@ -1372,3 +1374,148 @@ void xe_device_exit(void)
wait_var_event(&xe_device_count, !atomic_read(&xe_device_count));
}
}
+
+/**
+ * xe_device_suspend() - Common helper for system suspend and FLR prepare
+ * @xe: xe device instance
+ * @flr: indicate FLR prepare
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_suspend(struct xe_device *xe, bool flr)
+{
+ struct xe_gt *gt;
+ u8 id;
+ int err;
+
+ err = xe_pxp_pm_suspend(xe->pxp);
+ if (err)
+ return err;
+
+ xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
+ for_each_gt(gt, xe, id)
+ xe_gt_suspend_prepare(gt);
+
+ if (flr) {
+ for_each_gt(gt, xe, id)
+ xe_gt_flr_prepare(gt);
+ } else {
+ xe_display_pm_suspend(xe);
+
+ /* FIXME: Super racey... */
+ err = xe_bo_evict_all(xe);
+ if (err)
+ goto err_display;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_suspend(gt);
+ if (err)
+ goto err_display;
+ }
+ }
+
+ xe_irq_suspend(xe);
+
+ if (flr) {
+ unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
+ } else {
+ xe_display_pm_suspend_late(xe);
+
+ xe_i2c_pm_suspend(xe);
+ }
+
+ return 0;
+
+err_display:
+ xe_display_pm_resume(xe);
+ xe_pxp_pm_resume(xe->pxp);
+ return err;
+}
+
+/**
+ * xe_device_resume() - Common helper for system resume and re-initialization post FLR
+ * @xe: xe device instance
+ * @flr: indicate re-initialization post FLR
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_resume(struct xe_device *xe, bool flr)
+{
+ struct xe_tile *tile;
+ struct xe_gt *gt;
+ u8 id;
+ int err;
+
+ err = xe_pcode_ready(xe, true);
+ if (err)
+ return err;
+
+ assert_lmem_ready(xe);
+
+ for_each_gt(gt, xe, id)
+ xe_gt_idle_disable_c6(gt);
+
+ for_each_tile(tile, xe, id)
+ xe_wa_apply_tile_workarounds(tile);
+
+ if (flr) {
+ err = xe_bo_restore_map(xe);
+ if (err)
+ return err;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_reinit(gt);
+ if (err)
+ return err;
+ }
+ } else {
+ xe_display_pm_resume_early(xe);
+
+ /*
+ * This only restores pinned memory which is the memory required for the
+ * GT(s) to resume.
+ */
+ err = xe_bo_restore_early(xe);
+ if (err)
+ return err;
+ }
+
+ xe_i2c_pm_resume(xe, true);
+
+ xe_sysctrl_pm_resume(xe);
+
+ xe_irq_resume(xe);
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_resume(gt);
+ if (err)
+ break;
+ }
+
+ if (flr) {
+ if (err)
+ return err;
+ } else {
+ /*
+ * Try to bring up display before bailing from GT resume failure,
+ * so we don't leave the user clueless with a blank screen.
+ */
+ xe_display_pm_resume(xe);
+ if (err)
+ return err;
+
+ err = xe_bo_restore_late(xe);
+ if (err)
+ return err;
+
+ if (IS_VF_CCS_READY(xe))
+ xe_sriov_vf_ccs_register_context(xe);
+ }
+
+ xe_pxp_pm_resume(xe->pxp);
+
+ xe_late_bind_fw_load(&xe->late_bind);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 6df60edcb8f8..4d9e3c23b221 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -48,7 +48,9 @@ int xe_device_init_early(struct xe_device *xe);
int xe_device_probe_early(struct xe_device *xe);
int xe_device_probe(struct xe_device *xe);
void xe_device_remove(struct xe_device *xe);
+int xe_device_resume(struct xe_device *xe, bool flr);
void xe_device_shutdown(struct xe_device *xe);
+int xe_device_suspend(struct xe_device *xe, bool flr);
void xe_device_wmb(struct xe_device *xe);
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 4a745c3a933b..a9041c4d0242 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -172,52 +172,18 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe)
*/
int xe_pm_suspend(struct xe_device *xe)
{
- struct xe_gt *gt;
- u8 id;
int err;
drm_dbg(&xe->drm, "Suspending device\n");
xe_pm_block_begin_signalling();
trace_xe_pm_suspend(xe, __builtin_return_address(0));
- err = xe_pxp_pm_suspend(xe->pxp);
+ err = xe_device_suspend(xe, false);
if (err)
- goto err;
+ drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
+ else
+ drm_dbg(&xe->drm, "Device suspended\n");
- xe_late_bind_wait_for_worker_completion(&xe->late_bind);
-
- for_each_gt(gt, xe, id)
- xe_gt_suspend_prepare(gt);
-
- xe_display_pm_suspend(xe);
-
- /* FIXME: Super racey... */
- err = xe_bo_evict_all(xe);
- if (err)
- goto err_display;
-
- for_each_gt(gt, xe, id) {
- err = xe_gt_suspend(gt);
- if (err)
- goto err_display;
- }
-
- xe_irq_suspend(xe);
-
- xe_display_pm_suspend_late(xe);
-
- xe_i2c_pm_suspend(xe);
-
- drm_dbg(&xe->drm, "Device suspended\n");
- xe_pm_block_end_signalling();
-
- return 0;
-
-err_display:
- xe_display_pm_resume(xe);
- xe_pxp_pm_resume(xe->pxp);
-err:
- drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
xe_pm_block_end_signalling();
return err;
}
@@ -230,71 +196,18 @@ int xe_pm_suspend(struct xe_device *xe)
*/
int xe_pm_resume(struct xe_device *xe)
{
- struct xe_tile *tile;
- struct xe_gt *gt;
- u8 id;
int err;
xe_pm_block_begin_signalling();
drm_dbg(&xe->drm, "Resuming device\n");
trace_xe_pm_resume(xe, __builtin_return_address(0));
- for_each_gt(gt, xe, id)
- xe_gt_idle_disable_c6(gt);
-
- for_each_tile(tile, xe, id)
- xe_wa_apply_tile_workarounds(tile);
-
- err = xe_pcode_ready(xe, true);
- if (err)
- return err;
-
- xe_display_pm_resume_early(xe);
-
- /*
- * This only restores pinned memory which is the memory required for the
- * GT(s) to resume.
- */
- err = xe_bo_restore_early(xe);
- if (err)
- goto err;
-
- xe_i2c_pm_resume(xe, true);
-
- xe_sysctrl_pm_resume(xe);
-
- xe_irq_resume(xe);
-
- for_each_gt(gt, xe, id) {
- err = xe_gt_resume(gt);
- if (err)
- break;
- }
-
- /*
- * Try to bring up display before bailing from GT resume failure,
- * so we don't leave the user clueless with a blank screen.
- */
- xe_display_pm_resume(xe);
- if (err)
- goto err;
-
- err = xe_bo_restore_late(xe);
+ err = xe_device_resume(xe, false);
if (err)
- goto err;
-
- xe_pxp_pm_resume(xe->pxp);
-
- if (IS_VF_CCS_READY(xe))
- xe_sriov_vf_ccs_register_context(xe);
-
- xe_late_bind_fw_load(&xe->late_bind);
+ drm_dbg(&xe->drm, "Device resume failed %d\n", err);
+ else
+ drm_dbg(&xe->drm, "Device resumed\n");
- drm_dbg(&xe->drm, "Device resumed\n");
- xe_pm_block_end_signalling();
- return 0;
-err:
- drm_dbg(&xe->drm, "Device resume failed %d\n", err);
xe_pm_block_end_signalling();
return err;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 08/10] drm/xe: Introduce temporary device wedging
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
` (6 preceding siblings ...)
2026-10-26 5:06 ` [PATCH v11 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-29 6:14 ` Tauro, Riana
2026-10-26 5:06 ` [PATCH v11 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
2026-10-26 5:07 ` [PATCH v11 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
9 siblings, 1 reply; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
Currently, wedged state is serving a single usecase where the device is
permanently declared wedged, but this doesn't allow any wedged state
management for runtime usecases. In preparation of usecases which require
to facilitate temporary device wedging, convert wedged.flag to wedged.ref
which serves as a driver internal refcount for wedged state and blocks
critical path execution during device lifetime. While at it, introduce
wedged.perm which signifies permanent device wedging and operates
independent of the refcount allowing relevant cleanup action on unwind
path.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v9: Redesign to prevent races (Sashiko)
v10: Spell out temporary device wedging in subject (Lukasz)
v11: Update GuC CT path to check against permanent wedging (Lukasz, Riana)
Put wedge reference only if device is wedged during resume() (Riana)
---
drivers/gpu/drm/xe/xe_guc_ct.c | 6 +--
drivers/gpu/drm/xe/xe_pci.c | 2 +
drivers/gpu/drm/xe/xe_pci_error.c | 18 +++++++--
drivers/gpu/drm/xe/xe_wedge.c | 58 +++++++++++++++++++++++++++--
drivers/gpu/drm/xe/xe_wedge.h | 5 ++-
drivers/gpu/drm/xe/xe_wedge_types.h | 13 ++++++-
6 files changed, 88 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index d42f0133c1eb..152fccf8f6f1 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -1162,7 +1162,7 @@ static int __guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action,
xe_gt_assert(gt, g2h_len || !num_g2h);
lockdep_assert_held(&ct->lock);
- if (xe_wedged(ct_to_xe(ct))) {
+ if (xe_wedge_not_recoverable(ct_to_xe(ct))) {
ret = -ENOTRECOVERABLE;
goto out;
}
@@ -1591,7 +1591,7 @@ static int guc_ct_send_recv(struct xe_guc_ct *ct, const u32 *action, u32 len,
if (g2h_fence.fail) {
if (g2h_fence.cancel) {
xe_gt_dbg(gt, "H2G request %#x canceled!\n", action[0]);
- ret = xe_wedged(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
+ ret = xe_wedge_not_recoverable(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
goto unlock;
}
xe_gt_err(gt, "H2G request %#x failed: error %#x hint %#x\n",
@@ -1936,7 +1936,7 @@ static int g2h_read(struct xe_guc_ct *ct, u32 *msg, bool fast_path)
lockdep_assert_held(&ct->fast_lock);
/* Keep in sync with g2h_err_is_fatal() */
- if (xe_wedged(xe))
+ if (xe_wedge_not_recoverable(xe))
return -ENOTRECOVERABLE;
if (ct->state == XE_GUC_CT_STATE_DISABLED)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 605c452a9c33..531d38bcfd1c 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -39,6 +39,7 @@
#include "xe_survivability_mode.h"
#include "xe_tile.h"
#include "xe_tile_printk.h"
+#include "xe_wedge.h"
enum toggle_d3cold {
D3COLD_DISABLE,
@@ -1400,6 +1401,7 @@ static int xe_pci_runtime_suspend(struct device *dev)
*/
xe_assert(xe, !IS_SRIOV_VF(xe));
xe_assert(xe, !pci_num_vf(pdev));
+ xe_assert(xe, !xe_wedged(xe));
err = xe_pm_runtime_suspend(xe);
if (err)
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 9bf0da3a3d15..cdd0af4ec139 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -26,8 +26,7 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
* xe_wedge_fini() releases runtime pm if wedged flag is set, so acquire a runtime
* pm reference to avoid underflow.
*/
- if (!atomic_xchg(&xe->wedged.flag, 1))
- xe_pm_runtime_get_noresume(xe);
+ xe_wedge_get(xe);
xe_device_set_in_reset(xe);
@@ -41,10 +40,16 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action)
{
+ struct xe_device *xe = xe_any_to_xe(pdev);
+
switch (action) {
case XE_RAS_RECOVERY_ACTION_RECOVERED:
return PCI_ERS_RESULT_RECOVERED;
case XE_RAS_RECOVERY_ACTION_RESET:
+ /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
+ if (atomic_xchg(&xe->wedged.perm, 1))
+ return PCI_ERS_RESULT_DISCONNECT;
+
prepare_device_for_reset(pdev);
return PCI_ERS_RESULT_NEED_RESET;
case XE_RAS_RECOVERY_ACTION_DISCONNECT:
@@ -71,6 +76,10 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
case pci_channel_io_normal:
return PCI_ERS_RESULT_CAN_RECOVER;
case pci_channel_io_frozen:
+ /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
+ if (atomic_xchg(&xe->wedged.perm, 1))
+ return PCI_ERS_RESULT_DISCONNECT;
+
prepare_device_for_reset(pdev);
return PCI_ERS_RESULT_NEED_RESET;
default:
@@ -129,7 +138,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
xe = pdev_to_xe_device(pdev);
/* Wedge the device to prevent I/O operations till the resume callback */
- atomic_set(&xe->wedged.flag, 1);
+ xe_wedge_get(xe);
return PCI_ERS_RESULT_RECOVERED;
}
@@ -140,7 +149,8 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
xe_info(xe, "PCI error: resume\n");
- atomic_set(&xe->wedged.flag, 0);
+ if (xe_wedged(xe))
+ xe_wedge_put(xe);
}
const struct pci_error_handlers xe_pci_error_handlers = {
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index 2f35937c5e66..49fd9251448b 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -6,6 +6,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_managed.h>
+#include "xe_assert.h"
#include "xe_defaults.h"
#include "xe_device.h"
#include "xe_gt.h"
@@ -55,6 +56,53 @@
* firmware and restore device to normal operation.
*/
+/**
+ * xe_wedge_get() - Acquire wedge reference
+ * @xe: xe device instance
+ *
+ * Get runtime PM reference and block critical path execution.
+ */
+void xe_wedge_get(struct xe_device *xe)
+{
+ int ref;
+
+ /* We should not be runtime suspending as long as critical paths are blocked */
+ xe_pm_runtime_get_noresume(xe);
+
+ ref = atomic_inc_return(&xe->wedged.ref);
+ xe_assert(xe, ref > 0);
+}
+
+/**
+ * xe_wedge_put() - Relinquish wedge reference
+ * @xe: xe device instance
+ *
+ * Restore critical path execution and put runtime PM reference.
+ */
+void xe_wedge_put(struct xe_device *xe)
+{
+ int ref;
+
+ ref = atomic_dec_return(&xe->wedged.ref);
+ xe_assert(xe, ref >= 0);
+
+ xe_pm_runtime_put(xe);
+}
+
+/**
+ * xe_wedge_not_recoverable() - Check for unrecoverable device
+ * @xe: xe device instance
+ *
+ * Do not abuse this. Use xe_wedged() instead where possible. Only
+ * use this as a last resort where xe_wedged() is problematic.
+ *
+ * Returns: %true if device is unrecoverable, %false otherwise.
+ */
+bool xe_wedge_not_recoverable(struct xe_device *xe)
+{
+ return atomic_read(&xe->wedged.perm);
+}
+
static void wedge_work(struct work_struct *work)
{
struct xe_device *xe = container_of(work, struct xe_device, wedged.work);
@@ -97,11 +145,11 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
return;
}
- if (atomic_xchg(&xe->wedged.flag, 1))
+ if (atomic_xchg(&xe->wedged.perm, 1))
return;
+ xe_wedge_get(xe);
xe->needs_flr_on_fini = true;
- xe_pm_runtime_get_noresume(xe);
xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");
xe_err_once(xe, "IOCTLs and executions are now blocked!\n"
@@ -239,8 +287,10 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
disable_work_sync(&xe->wedged.work);
- if (atomic_read(&xe->wedged.flag))
- xe_pm_runtime_put(xe);
+ if (atomic_read(&xe->wedged.perm))
+ xe_wedge_put(xe);
+
+ xe_assert(xe, !xe_wedged(xe));
}
/**
diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
index 3b5499dfc30d..28f43295948e 100644
--- a/drivers/gpu/drm/xe/xe_wedge.h
+++ b/drivers/gpu/drm/xe/xe_wedge.h
@@ -14,11 +14,14 @@
static inline bool xe_wedged(struct xe_device *xe)
{
- return atomic_read(&xe->wedged.flag);
+ return atomic_read(&xe->wedged.ref);
}
void xe_wedge_declare(struct xe_device *xe, unsigned long method);
int xe_wedge_init(struct xe_device *xe);
int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode);
+void xe_wedge_get(struct xe_device *xe);
+void xe_wedge_put(struct xe_device *xe);
+bool xe_wedge_not_recoverable(struct xe_device *xe);
#endif
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index e472c5fcbd26..8e87290444dd 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -29,8 +29,17 @@ enum xe_wedged_mode {
* struct xe_wedge - Struct to control Wedged States and mode
*/
struct xe_wedge {
- /** @flag: Xe device faced a critical error and is now blocked. */
- atomic_t flag;
+ /**
+ * @ref: Refcount for wedged device, blocks critical path execution. Used for
+ * driver internal usecases which require temporarily blocking user access of
+ * the device during autonomous recovery, like PCIe FLR and bus reset.
+ */
+ atomic_t ref;
+ /**
+ * @perm: Permanently wedged device, not recoverable. Only to be set when
+ * notifying userspace of wedged device through drm wedged uevent.
+ */
+ atomic_t perm;
/** @mode: Mode controlled by kernel parameter and debugfs */
enum xe_wedged_mode mode;
/** @method: Recovery method to be sent in the drm device wedged uevent */
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 09/10] drm/xe/pci: Introduce PCIe Function Level Reset
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
` (7 preceding siblings ...)
2026-10-26 5:06 ` [PATCH v11 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
@ 2026-10-26 5:06 ` Raag Jadav
2026-10-29 8:40 ` Tauro, Riana
2026-10-26 5:07 ` [PATCH v11 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
9 siblings, 1 reply; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) support which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
v2: Spell out Function Level Reset (Jani)
v5: Prevent PM ref leak for wedged device (Matthew Brost)
v6: Add PCIe FLR documentation (Daniele)
v7: Refine PCIe FLR documentation (Daniele)
Introduce xe_pci_reset_skip() helper (Lukasz)
v9: Add 'Xe' prefix to document title (Rodrigo)
v10: Update documentation to include PCI Error Handling (Lukasz)
Maintain wedge reference on FLR failure (Lukasz)
v11: Cleanup wedge reference logic in ->reset_prepare() (Lukasz)
Use 'PCI reset' in logs (Riana)
---
drivers/gpu/drm/xe/xe_device_types.h | 3 +
drivers/gpu/drm/xe/xe_pci_error.c | 134 +++++++++++++++++++++++++++
2 files changed, 137 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 0eb36fd91539..73028a45f677 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -521,6 +521,9 @@ struct xe_device {
/** @pxp: Encapsulate Protected Xe Path support */
struct xe_pxp *pxp;
+ /** @flr_prepared: Prepared for function-reset */
+ bool flr_prepared;
+
/** @needs_flr_on_fini: requests function-reset on fini */
bool needs_flr_on_fini;
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index cdd0af4ec139..3ec687256309 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -12,9 +12,55 @@
#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_ras.h"
+#include "xe_sriov_pf_helpers.h"
#include "xe_survivability_mode.h"
#include "xe_wedge.h"
+/**
+ * DOC: Xe PCI Error Handling
+ *
+ * Xe driver registers PCI callbacks which are called by PCI core in case of
+ * bus errors or resets.
+ *
+ * Currently both Function Level Reset (FLR) and bus error handling callbacks are
+ * supported. Both wipe the VRAM and resets the state of all the hardware units.
+ * Therefore, the contents of all exec queues and BOs in VRAM are lost, and the
+ * hardware needs a full re-initialization. The way Xe driver handles it, is
+ * pretty much similar to system suspend/resume flow with a few notable exceptions.
+ *
+ * Prepare phase:
+ *
+ * - Temporarily wedge the device to prevent userspace access
+ * - Kill exec queues which signals all fences and frees in-flight jobs
+ * - Stop the scheduler and all submissions to GuC
+ * - The fact that FLR is needed is because hardware could be in corrupted state
+ * and access unreliable, so skip memory eviction due to untrustworthy VRAM
+ * contents
+ * - Remove all memory mappings since VRAM contents will be lost
+ *
+ * Re-initialization phase:
+ *
+ * - Recreate kernel BOs due to skipped memory eviction in prepare phase
+ * - Restore kernel queues which were killed in prepare phase
+ * - Reload all uC firmwares
+ * - Bring up all hardware units
+ * - Unwedge the device to allow userspace access
+ *
+ * Since VRAM contents are lost, the user is expected to recreate user memory
+ * and reload context.
+ *
+ * TODO: Reuse FLR callbacks for bus error handling.
+ *
+ * Current implementation is only limited to re-initializing GT. This needs to
+ * be extended for a lot of components listed below.
+ *
+ * - Proper re-initialization of GSC and PXP for integrated platforms
+ * - SR-IOV cases which need PF and VF synchronization
+ * - Re-initialization of all child devices registered by Xe
+ * - MM corner cases
+ * - Display
+ */
+
static void prepare_device_for_reset(struct pci_dev *pdev)
{
struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -153,9 +199,97 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
xe_wedge_put(xe);
}
+static inline bool xe_pci_reset_skip(struct xe_device *xe)
+{
+ return !IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe_sriov_pf_num_vfs(xe) || xe->info.probe_display;
+}
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+ int err;
+
+ /* No guarantees by PCI core */
+ if (!pm_runtime_active(&pdev->dev))
+ return;
+
+ err = xe_wedged(xe);
+ if (err)
+ xe_err(xe, "PCI reset failed, device in unexpected state\n");
+
+ /* Wedge the device to prevent userspace access but don't send the event yet */
+ xe_wedge_get(xe);
+ if (err)
+ return;
+
+ err = xe_pci_reset_skip(xe);
+ if (err) {
+ xe_err(xe, "PCI reset not supported\n");
+ return;
+ }
+
+ /*
+ * The hardware could be in corrupted state and access unreliable, but we try to
+ * update data structures and cleanup any pending work to avoid side effects during
+ * PCIe FLR. This will be similar to system suspend flow but without eviction.
+ */
+ err = xe_device_suspend(xe, true);
+ if (err) {
+ xe_err(xe, "Failed to prepare for PCI reset\n");
+ return;
+ }
+
+ xe->flr_prepared = true;
+ xe_info(xe, "Prepared for PCI reset\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+ int err;
+
+ /* No guarantees by PCI core */
+ if (!pm_runtime_active(&pdev->dev))
+ return;
+
+ err = xe_pci_reset_skip(xe);
+ if (err)
+ goto out;
+
+ if (!xe->flr_prepared)
+ goto out;
+
+ /* Unprepare early in case we fail */
+ xe->flr_prepared = false;
+
+ /*
+ * We already have the data structures intact, so try to re-initialize the device.
+ * This will be similar to system resume flow, except we'll also need to recreate
+ * kernel bos and restore kernel queues.
+ */
+ err = xe_device_resume(xe, true);
+ if (err) {
+ xe_err(xe, "Re-initialization failed\n");
+ goto out;
+ }
+
+ /* Unwedge to allow userspace access */
+ xe_wedge_put(xe);
+ xe_info(xe, "Re-initialization success\n");
+
+ return;
+out:
+ /* Most likely the device is unusable and there's nothing we can do about it */
+ xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_REBIND | DRM_WEDGE_RECOVERY_BUS_RESET);
+ /* Drop local reference */
+ xe_wedge_put(xe);
+}
+
const struct pci_error_handlers xe_pci_error_handlers = {
.error_detected = xe_pci_error_detected,
.mmio_enabled = xe_pci_error_mmio_enabled,
.slot_reset = xe_pci_error_slot_reset,
.resume = xe_pci_error_resume,
+ .reset_prepare = xe_pci_reset_prepare,
+ .reset_done = xe_pci_reset_done,
};
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v11 10/10] drm/xe/doc: Wire up PCI Error Handling
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
` (8 preceding siblings ...)
2026-10-26 5:06 ` [PATCH v11 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
@ 2026-10-26 5:07 ` Raag Jadav
9 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-26 5:07 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
Wire up PCI Error Handling documentation.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
Documentation/gpu/xe/index.rst | 1 +
Documentation/gpu/xe/xe_pci_error.rst | 8 ++++++++
2 files changed, 9 insertions(+)
create mode 100644 Documentation/gpu/xe/xe_pci_error.rst
diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst
index 0247a255f7e6..497a0a4b12f6 100644
--- a/Documentation/gpu/xe/index.rst
+++ b/Documentation/gpu/xe/index.rst
@@ -36,3 +36,4 @@ The display, or :ref:`drm-kms`, support for drm/xe is provided by
xe_configfs
xe_gt_stats
xe_sigid
+ xe_pci_error
diff --git a/Documentation/gpu/xe/xe_pci_error.rst b/Documentation/gpu/xe/xe_pci_error.rst
new file mode 100644
index 000000000000..25cc5a8adf99
--- /dev/null
+++ b/Documentation/gpu/xe/xe_pci_error.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+=====================
+Xe PCI Error Handling
+=====================
+
+.. kernel-doc:: drivers/gpu/drm/xe/xe_pci_error.c
+ :doc: Xe PCI Error Handling
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v11 08/10] drm/xe: Introduce temporary device wedging
2026-10-26 5:06 ` [PATCH v11 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
@ 2026-10-29 6:14 ` Tauro, Riana
2026-10-29 8:20 ` Raag Jadav
0 siblings, 1 reply; 14+ messages in thread
From: Tauro, Riana @ 2026-10-29 6:14 UTC (permalink / raw)
To: Raag Jadav, intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, michal.wajdeczko,
matthew.d.roper, michal.winiarski, matthew.auld, dev, jani.nikula,
lukasz.laguna, lukas, daniele.ceraolospurio, badal.nilawar
On 26-10-2026 10:36, Raag Jadav wrote:
> Currently, wedged state is serving a single usecase where the device is
> permanently declared wedged, but this doesn't allow any wedged state
> management for runtime usecases. In preparation of usecases which require
> to facilitate temporary device wedging, convert wedged.flag to wedged.ref
> which serves as a driver internal refcount for wedged state and blocks
> critical path execution during device lifetime. While at it, introduce
> wedged.perm which signifies permanent device wedging and operates
> independent of the refcount allowing relevant cleanup action on unwind
> path.
>
> Signed-off-by: Raag Jadav<raag.jadav@intel.com>
> ---
> v9: Redesign to prevent races (Sashiko)
> v10: Spell out temporary device wedging in subject (Lukasz)
> v11: Update GuC CT path to check against permanent wedging (Lukasz, Riana)
> Put wedge reference only if device is wedged during resume() (Riana)
> ---
> drivers/gpu/drm/xe/xe_guc_ct.c | 6 +--
> drivers/gpu/drm/xe/xe_pci.c | 2 +
> drivers/gpu/drm/xe/xe_pci_error.c | 18 +++++++--
> drivers/gpu/drm/xe/xe_wedge.c | 58 +++++++++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_wedge.h | 5 ++-
> drivers/gpu/drm/xe/xe_wedge_types.h | 13 ++++++-
> 6 files changed, 88 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> index d42f0133c1eb..152fccf8f6f1 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -1162,7 +1162,7 @@ static int __guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action,
> xe_gt_assert(gt, g2h_len || !num_g2h);
> lockdep_assert_held(&ct->lock);
>
> - if (xe_wedged(ct_to_xe(ct))) {
> + if (xe_wedge_not_recoverable(ct_to_xe(ct))) {
> ret = -ENOTRECOVERABLE;
> goto out;
> }
> @@ -1591,7 +1591,7 @@ static int guc_ct_send_recv(struct xe_guc_ct *ct, const u32 *action, u32 len,
> if (g2h_fence.fail) {
> if (g2h_fence.cancel) {
> xe_gt_dbg(gt, "H2G request %#x canceled!\n", action[0]);
> - ret = xe_wedged(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
> + ret = xe_wedge_not_recoverable(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
> goto unlock;
> }
> xe_gt_err(gt, "H2G request %#x failed: error %#x hint %#x\n",
> @@ -1936,7 +1936,7 @@ static int g2h_read(struct xe_guc_ct *ct, u32 *msg, bool fast_path)
> lockdep_assert_held(&ct->fast_lock);
>
> /* Keep in sync with g2h_err_is_fatal() */
> - if (xe_wedged(xe))
> + if (xe_wedge_not_recoverable(xe))
> return -ENOTRECOVERABLE;
>
> if (ct->state == XE_GUC_CT_STATE_DISABLED)
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 605c452a9c33..531d38bcfd1c 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -39,6 +39,7 @@
> #include "xe_survivability_mode.h"
> #include "xe_tile.h"
> #include "xe_tile_printk.h"
> +#include "xe_wedge.h"
>
> enum toggle_d3cold {
> D3COLD_DISABLE,
> @@ -1400,6 +1401,7 @@ static int xe_pci_runtime_suspend(struct device *dev)
> */
> xe_assert(xe, !IS_SRIOV_VF(xe));
> xe_assert(xe, !pci_num_vf(pdev));
> + xe_assert(xe, !xe_wedged(xe));
>
> err = xe_pm_runtime_suspend(xe);
> if (err)
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 9bf0da3a3d15..cdd0af4ec139 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -26,8 +26,7 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
> * xe_wedge_fini() releases runtime pm if wedged flag is set, so acquire a runtime
> * pm reference to avoid underflow.
> */
> - if (!atomic_xchg(&xe->wedged.flag, 1))
> - xe_pm_runtime_get_noresume(xe);
> + xe_wedge_get(xe);
>
> xe_device_set_in_reset(xe);
>
> @@ -41,10 +40,16 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
>
> static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action)
> {
> + struct xe_device *xe = xe_any_to_xe(pdev);
> +
> switch (action) {
> case XE_RAS_RECOVERY_ACTION_RECOVERED:
> return PCI_ERS_RESULT_RECOVERED;
> case XE_RAS_RECOVERY_ACTION_RESET:
> + /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
> + if (atomic_xchg(&xe->wedged.perm, 1))
> + return PCI_ERS_RESULT_DISCONNECT;
> +
> prepare_device_for_reset(pdev);
> return PCI_ERS_RESULT_NEED_RESET;
> case XE_RAS_RECOVERY_ACTION_DISCONNECT:
> @@ -71,6 +76,10 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> case pci_channel_io_normal:
> return PCI_ERS_RESULT_CAN_RECOVER;
> case pci_channel_io_frozen:
> + /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
> + if (atomic_xchg(&xe->wedged.perm, 1))
> + return PCI_ERS_RESULT_DISCONNECT;
> +
> prepare_device_for_reset(pdev);
> return PCI_ERS_RESULT_NEED_RESET;
> default:
> @@ -129,7 +138,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
> xe = pdev_to_xe_device(pdev);
>
> /* Wedge the device to prevent I/O operations till the resume callback */
> - atomic_set(&xe->wedged.flag, 1);
> + xe_wedge_get(xe);
>
> return PCI_ERS_RESULT_RECOVERED;
> }
> @@ -140,7 +149,8 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
>
> xe_info(xe, "PCI error: resume\n");
>
> - atomic_set(&xe->wedged.flag, 0);
> + if (xe_wedged(xe))
> + xe_wedge_put(xe);
> }
>
> const struct pci_error_handlers xe_pci_error_handlers = {
> diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
> index 2f35937c5e66..49fd9251448b 100644
> --- a/drivers/gpu/drm/xe/xe_wedge.c
> +++ b/drivers/gpu/drm/xe/xe_wedge.c
> @@ -6,6 +6,7 @@
> #include <drm/drm_drv.h>
> #include <drm/drm_managed.h>
>
> +#include "xe_assert.h"
> #include "xe_defaults.h"
> #include "xe_device.h"
> #include "xe_gt.h"
> @@ -55,6 +56,53 @@
> * firmware and restore device to normal operation.
> */
>
> +/**
> + * xe_wedge_get() - Acquire wedge reference
> + * @xe: xe device instance
> + *
> + * Get runtime PM reference and block critical path execution.
Add a documentation that this is temporary should not be used unless
required to temporarily block
userspace access like resets.
Shouldn't runtime pm be associated with permanent wedging instead of
temporary?
> + */
> +void xe_wedge_get(struct xe_device *xe)
> +{
> + int ref;
> +
> + /* We should not be runtime suspending as long as critical paths are blocked */
> + xe_pm_runtime_get_noresume(xe);
> +
> + ref = atomic_inc_return(&xe->wedged.ref);
> + xe_assert(xe, ref > 0);
> +}
> +
> +/**
> + * xe_wedge_put() - Relinquish wedge reference
> + * @xe: xe device instance
> + *
> + * Restore critical path execution and put runtime PM reference.
> + */
> +void xe_wedge_put(struct xe_device *xe)
> +{
> + int ref;
> +
> + ref = atomic_dec_return(&xe->wedged.ref);
> + xe_assert(xe, ref >= 0);
> +
> + xe_pm_runtime_put(xe);
> +}
> +
> +/**
> + * xe_wedge_not_recoverable() - Check for unrecoverable device
> + * @xe: xe device instance
> + *
> + * Do not abuse this. Use xe_wedged() instead where possible. Only
> + * use this as a last resort where xe_wedged() is problematic.
> + *
> + * Returns: %true if device is unrecoverable, %false otherwise.
> + */
> +bool xe_wedge_not_recoverable(struct xe_device *xe)
xe_wedged_permanent?
Thanks
Riana
> +{
> + return atomic_read(&xe->wedged.perm);
> +}
> +
> static void wedge_work(struct work_struct *work)
> {
> struct xe_device *xe = container_of(work, struct xe_device, wedged.work);
> @@ -97,11 +145,11 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
> return;
> }
>
> - if (atomic_xchg(&xe->wedged.flag, 1))
> + if (atomic_xchg(&xe->wedged.perm, 1))
> return;
>
> + xe_wedge_get(xe);
> xe->needs_flr_on_fini = true;
> - xe_pm_runtime_get_noresume(xe);
>
> xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");
> xe_err_once(xe, "IOCTLs and executions are now blocked!\n"
> @@ -239,8 +287,10 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
>
> disable_work_sync(&xe->wedged.work);
>
> - if (atomic_read(&xe->wedged.flag))
> - xe_pm_runtime_put(xe);
> + if (atomic_read(&xe->wedged.perm))
> + xe_wedge_put(xe);
> +
> + xe_assert(xe, !xe_wedged(xe));
> }
>
> /**
> diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
> index 3b5499dfc30d..28f43295948e 100644
> --- a/drivers/gpu/drm/xe/xe_wedge.h
> +++ b/drivers/gpu/drm/xe/xe_wedge.h
> @@ -14,11 +14,14 @@
>
> static inline bool xe_wedged(struct xe_device *xe)
> {
> - return atomic_read(&xe->wedged.flag);
> + return atomic_read(&xe->wedged.ref);
> }
>
> void xe_wedge_declare(struct xe_device *xe, unsigned long method);
> int xe_wedge_init(struct xe_device *xe);
> int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode);
> +void xe_wedge_get(struct xe_device *xe);
> +void xe_wedge_put(struct xe_device *xe);
> +bool xe_wedge_not_recoverable(struct xe_device *xe);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
> index e472c5fcbd26..8e87290444dd 100644
> --- a/drivers/gpu/drm/xe/xe_wedge_types.h
> +++ b/drivers/gpu/drm/xe/xe_wedge_types.h
> @@ -29,8 +29,17 @@ enum xe_wedged_mode {
> * struct xe_wedge - Struct to control Wedged States and mode
> */
> struct xe_wedge {
> - /** @flag: Xe device faced a critical error and is now blocked. */
> - atomic_t flag;
> + /**
> + * @ref: Refcount for wedged device, blocks critical path execution. Used for
> + * driver internal usecases which require temporarily blocking user access of
> + * the device during autonomous recovery, like PCIe FLR and bus reset.
> + */
> + atomic_t ref;
> + /**
> + * @perm: Permanently wedged device, not recoverable. Only to be set when
> + * notifying userspace of wedged device through drm wedged uevent.
> + */
> + atomic_t perm;
> /** @mode: Mode controlled by kernel parameter and debugfs */
> enum xe_wedged_mode mode;
> /** @method: Recovery method to be sent in the drm device wedged uevent */
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v11 08/10] drm/xe: Introduce temporary device wedging
2026-10-29 6:14 ` Tauro, Riana
@ 2026-10-29 8:20 ` Raag Jadav
0 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2026-10-29 8:20 UTC (permalink / raw)
To: Tauro, Riana
Cc: intel-xe, matthew.brost, rodrigo.vivi, thomas.hellstrom,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar
On Thu, Oct 29, 2026 at 11:44:53AM +0530, Tauro, Riana wrote:
> On 26-10-2026 10:36, Raag Jadav wrote:
> > Currently, wedged state is serving a single usecase where the device is
> > permanently declared wedged, but this doesn't allow any wedged state
> > management for runtime usecases. In preparation of usecases which require
> > to facilitate temporary device wedging, convert wedged.flag to wedged.ref
> > which serves as a driver internal refcount for wedged state and blocks
> > critical path execution during device lifetime. While at it, introduce
> > wedged.perm which signifies permanent device wedging and operates
> > independent of the refcount allowing relevant cleanup action on unwind
> > path.
> >
> > Signed-off-by: Raag Jadav<raag.jadav@intel.com>
> > ---
> > v9: Redesign to prevent races (Sashiko)
> > v10: Spell out temporary device wedging in subject (Lukasz)
> > v11: Update GuC CT path to check against permanent wedging (Lukasz, Riana)
> > Put wedge reference only if device is wedged during resume() (Riana)
> > ---
> > drivers/gpu/drm/xe/xe_guc_ct.c | 6 +--
> > drivers/gpu/drm/xe/xe_pci.c | 2 +
> > drivers/gpu/drm/xe/xe_pci_error.c | 18 +++++++--
> > drivers/gpu/drm/xe/xe_wedge.c | 58 +++++++++++++++++++++++++++--
> > drivers/gpu/drm/xe/xe_wedge.h | 5 ++-
> > drivers/gpu/drm/xe/xe_wedge_types.h | 13 ++++++-
> > 6 files changed, 88 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> > index d42f0133c1eb..152fccf8f6f1 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> > @@ -1162,7 +1162,7 @@ static int __guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action,
> > xe_gt_assert(gt, g2h_len || !num_g2h);
> > lockdep_assert_held(&ct->lock);
> > - if (xe_wedged(ct_to_xe(ct))) {
> > + if (xe_wedge_not_recoverable(ct_to_xe(ct))) {
> > ret = -ENOTRECOVERABLE;
> > goto out;
> > }
> > @@ -1591,7 +1591,7 @@ static int guc_ct_send_recv(struct xe_guc_ct *ct, const u32 *action, u32 len,
> > if (g2h_fence.fail) {
> > if (g2h_fence.cancel) {
> > xe_gt_dbg(gt, "H2G request %#x canceled!\n", action[0]);
> > - ret = xe_wedged(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
> > + ret = xe_wedge_not_recoverable(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
> > goto unlock;
> > }
> > xe_gt_err(gt, "H2G request %#x failed: error %#x hint %#x\n",
> > @@ -1936,7 +1936,7 @@ static int g2h_read(struct xe_guc_ct *ct, u32 *msg, bool fast_path)
> > lockdep_assert_held(&ct->fast_lock);
> > /* Keep in sync with g2h_err_is_fatal() */
> > - if (xe_wedged(xe))
> > + if (xe_wedge_not_recoverable(xe))
> > return -ENOTRECOVERABLE;
> > if (ct->state == XE_GUC_CT_STATE_DISABLED)
> > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> > index 605c452a9c33..531d38bcfd1c 100644
> > --- a/drivers/gpu/drm/xe/xe_pci.c
> > +++ b/drivers/gpu/drm/xe/xe_pci.c
> > @@ -39,6 +39,7 @@
> > #include "xe_survivability_mode.h"
> > #include "xe_tile.h"
> > #include "xe_tile_printk.h"
> > +#include "xe_wedge.h"
> > enum toggle_d3cold {
> > D3COLD_DISABLE,
> > @@ -1400,6 +1401,7 @@ static int xe_pci_runtime_suspend(struct device *dev)
> > */
> > xe_assert(xe, !IS_SRIOV_VF(xe));
> > xe_assert(xe, !pci_num_vf(pdev));
> > + xe_assert(xe, !xe_wedged(xe));
> > err = xe_pm_runtime_suspend(xe);
> > if (err)
> > diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> > index 9bf0da3a3d15..cdd0af4ec139 100644
> > --- a/drivers/gpu/drm/xe/xe_pci_error.c
> > +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> > @@ -26,8 +26,7 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
> > * xe_wedge_fini() releases runtime pm if wedged flag is set, so acquire a runtime
> > * pm reference to avoid underflow.
> > */
> > - if (!atomic_xchg(&xe->wedged.flag, 1))
> > - xe_pm_runtime_get_noresume(xe);
> > + xe_wedge_get(xe);
> > xe_device_set_in_reset(xe);
> > @@ -41,10 +40,16 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
> > static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action)
> > {
> > + struct xe_device *xe = xe_any_to_xe(pdev);
> > +
> > switch (action) {
> > case XE_RAS_RECOVERY_ACTION_RECOVERED:
> > return PCI_ERS_RESULT_RECOVERED;
> > case XE_RAS_RECOVERY_ACTION_RESET:
> > + /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
> > + if (atomic_xchg(&xe->wedged.perm, 1))
> > + return PCI_ERS_RESULT_DISCONNECT;
> > +
> > prepare_device_for_reset(pdev);
> > return PCI_ERS_RESULT_NEED_RESET;
> > case XE_RAS_RECOVERY_ACTION_DISCONNECT:
> > @@ -71,6 +76,10 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> > case pci_channel_io_normal:
> > return PCI_ERS_RESULT_CAN_RECOVER;
> > case pci_channel_io_frozen:
> > + /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
> > + if (atomic_xchg(&xe->wedged.perm, 1))
> > + return PCI_ERS_RESULT_DISCONNECT;
> > +
> > prepare_device_for_reset(pdev);
> > return PCI_ERS_RESULT_NEED_RESET;
> > default:
> > @@ -129,7 +138,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
> > xe = pdev_to_xe_device(pdev);
> > /* Wedge the device to prevent I/O operations till the resume callback */
> > - atomic_set(&xe->wedged.flag, 1);
> > + xe_wedge_get(xe);
> > return PCI_ERS_RESULT_RECOVERED;
> > }
> > @@ -140,7 +149,8 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
> > xe_info(xe, "PCI error: resume\n");
> > - atomic_set(&xe->wedged.flag, 0);
> > + if (xe_wedged(xe))
> > + xe_wedge_put(xe);
> > }
> > const struct pci_error_handlers xe_pci_error_handlers = {
> > diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
> > index 2f35937c5e66..49fd9251448b 100644
> > --- a/drivers/gpu/drm/xe/xe_wedge.c
> > +++ b/drivers/gpu/drm/xe/xe_wedge.c
> > @@ -6,6 +6,7 @@
> > #include <drm/drm_drv.h>
> > #include <drm/drm_managed.h>
> > +#include "xe_assert.h"
> > #include "xe_defaults.h"
> > #include "xe_device.h"
> > #include "xe_gt.h"
> > @@ -55,6 +56,53 @@
> > * firmware and restore device to normal operation.
> > */
> > +/**
> > + * xe_wedge_get() - Acquire wedge reference
> > + * @xe: xe device instance
> > + *
> > + * Get runtime PM reference and block critical path execution.
>
> Add a documentation that this is temporary should not be used unless
> required to temporarily block
> userspace access like resets.
I'll paste the header doc here.
> Shouldn't runtime pm be associated with permanent wedging instead of
> temporary?
No, wedged.ref is blocking a lot of critical paths and you'd probably crash
and burn in case of autosuspend.
> > + */
> > +void xe_wedge_get(struct xe_device *xe)
> > +{
> > + int ref;
> > +
> > + /* We should not be runtime suspending as long as critical paths are blocked */
> > + xe_pm_runtime_get_noresume(xe);
> > +
> > + ref = atomic_inc_return(&xe->wedged.ref);
> > + xe_assert(xe, ref > 0);
> > +}
> > +
> > +/**
> > + * xe_wedge_put() - Relinquish wedge reference
> > + * @xe: xe device instance
> > + *
> > + * Restore critical path execution and put runtime PM reference.
> > + */
> > +void xe_wedge_put(struct xe_device *xe)
> > +{
> > + int ref;
> > +
> > + ref = atomic_dec_return(&xe->wedged.ref);
> > + xe_assert(xe, ref >= 0);
> > +
> > + xe_pm_runtime_put(xe);
> > +}
> > +
> > +/**
> > + * xe_wedge_not_recoverable() - Check for unrecoverable device
> > + * @xe: xe device instance
> > + *
> > + * Do not abuse this. Use xe_wedged() instead where possible. Only
> > + * use this as a last resort where xe_wedged() is problematic.
> > + *
> > + * Returns: %true if device is unrecoverable, %false otherwise.
> > + */
> > +bool xe_wedge_not_recoverable(struct xe_device *xe)
>
> xe_wedged_permanent?
Sure.
Raag
> > +{
> > + return atomic_read(&xe->wedged.perm);
> > +}
> > +
> > static void wedge_work(struct work_struct *work)
> > {
> > struct xe_device *xe = container_of(work, struct xe_device, wedged.work);
> > @@ -97,11 +145,11 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
> > return;
> > }
> > - if (atomic_xchg(&xe->wedged.flag, 1))
> > + if (atomic_xchg(&xe->wedged.perm, 1))
> > return;
> > + xe_wedge_get(xe);
> > xe->needs_flr_on_fini = true;
> > - xe_pm_runtime_get_noresume(xe);
> > xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");
> > xe_err_once(xe, "IOCTLs and executions are now blocked!\n"
> > @@ -239,8 +287,10 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
> > disable_work_sync(&xe->wedged.work);
> > - if (atomic_read(&xe->wedged.flag))
> > - xe_pm_runtime_put(xe);
> > + if (atomic_read(&xe->wedged.perm))
> > + xe_wedge_put(xe);
> > +
> > + xe_assert(xe, !xe_wedged(xe));
> > }
> > /**
> > diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
> > index 3b5499dfc30d..28f43295948e 100644
> > --- a/drivers/gpu/drm/xe/xe_wedge.h
> > +++ b/drivers/gpu/drm/xe/xe_wedge.h
> > @@ -14,11 +14,14 @@
> > static inline bool xe_wedged(struct xe_device *xe)
> > {
> > - return atomic_read(&xe->wedged.flag);
> > + return atomic_read(&xe->wedged.ref);
> > }
> > void xe_wedge_declare(struct xe_device *xe, unsigned long method);
> > int xe_wedge_init(struct xe_device *xe);
> > int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode);
> > +void xe_wedge_get(struct xe_device *xe);
> > +void xe_wedge_put(struct xe_device *xe);
> > +bool xe_wedge_not_recoverable(struct xe_device *xe);
> > #endif
> > diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
> > index e472c5fcbd26..8e87290444dd 100644
> > --- a/drivers/gpu/drm/xe/xe_wedge_types.h
> > +++ b/drivers/gpu/drm/xe/xe_wedge_types.h
> > @@ -29,8 +29,17 @@ enum xe_wedged_mode {
> > * struct xe_wedge - Struct to control Wedged States and mode
> > */
> > struct xe_wedge {
> > - /** @flag: Xe device faced a critical error and is now blocked. */
> > - atomic_t flag;
> > + /**
> > + * @ref: Refcount for wedged device, blocks critical path execution. Used for
> > + * driver internal usecases which require temporarily blocking user access of
> > + * the device during autonomous recovery, like PCIe FLR and bus reset.
> > + */
> > + atomic_t ref;
> > + /**
> > + * @perm: Permanently wedged device, not recoverable. Only to be set when
> > + * notifying userspace of wedged device through drm wedged uevent.
> > + */
> > + atomic_t perm;
> > /** @mode: Mode controlled by kernel parameter and debugfs */
> > enum xe_wedged_mode mode;
> > /** @method: Recovery method to be sent in the drm device wedged uevent */
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v11 09/10] drm/xe/pci: Introduce PCIe Function Level Reset
2026-10-26 5:06 ` [PATCH v11 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
@ 2026-10-29 8:40 ` Tauro, Riana
0 siblings, 0 replies; 14+ messages in thread
From: Tauro, Riana @ 2026-10-29 8:40 UTC (permalink / raw)
To: Raag Jadav, intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, michal.wajdeczko,
matthew.d.roper, michal.winiarski, matthew.auld, dev, jani.nikula,
lukasz.laguna, lukas, daniele.ceraolospurio, badal.nilawar
On 26-10-2026 10:36, Raag Jadav wrote:
> With bare minimum pieces in place, we can finally introduce PCIe Function
> Level Reset (FLR) support which re-initializes hardware state without the
> need for reloading the driver from userspace. All VRAM contents are lost
> along with hardware state and driver takes care of recreating the required
> kernel bos as part of re-initialization, but user still needs to recreate
> user bos and reload context after PCIe FLR.
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> v2: Spell out Function Level Reset (Jani)
> v5: Prevent PM ref leak for wedged device (Matthew Brost)
> v6: Add PCIe FLR documentation (Daniele)
> v7: Refine PCIe FLR documentation (Daniele)
> Introduce xe_pci_reset_skip() helper (Lukasz)
> v9: Add 'Xe' prefix to document title (Rodrigo)
> v10: Update documentation to include PCI Error Handling (Lukasz)
> Maintain wedge reference on FLR failure (Lukasz)
> v11: Cleanup wedge reference logic in ->reset_prepare() (Lukasz)
> Use 'PCI reset' in logs (Riana)
> ---
> drivers/gpu/drm/xe/xe_device_types.h | 3 +
> drivers/gpu/drm/xe/xe_pci_error.c | 134 +++++++++++++++++++++++++++
> 2 files changed, 137 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 0eb36fd91539..73028a45f677 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -521,6 +521,9 @@ struct xe_device {
> /** @pxp: Encapsulate Protected Xe Path support */
> struct xe_pxp *pxp;
>
> + /** @flr_prepared: Prepared for function-reset */
> + bool flr_prepared;
> +
> /** @needs_flr_on_fini: requests function-reset on fini */
> bool needs_flr_on_fini;
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index cdd0af4ec139..3ec687256309 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -12,9 +12,55 @@
> #include "xe_pm.h"
> #include "xe_printk.h"
> #include "xe_ras.h"
> +#include "xe_sriov_pf_helpers.h"
> #include "xe_survivability_mode.h"
> #include "xe_wedge.h"
>
> +/**
> + * DOC: Xe PCI Error Handling
> + *
> + * Xe driver registers PCI callbacks which are called by PCI core in case of
> + * bus errors or resets.
> + *
> + * Currently both Function Level Reset (FLR) and bus error handling callbacks are
> + * supported. Both wipe the VRAM and resets the state of all the hardware units.
> + * Therefore, the contents of all exec queues and BOs in VRAM are lost, and the
> + * hardware needs a full re-initialization. The way Xe driver handles it, is
> + * pretty much similar to system suspend/resume flow with a few notable exceptions.
> + *
> + * Prepare phase:
> + *
> + * - Temporarily wedge the device to prevent userspace access
> + * - Kill exec queues which signals all fences and frees in-flight jobs
> + * - Stop the scheduler and all submissions to GuC
> + * - The fact that FLR is needed is because hardware could be in corrupted state
> + * and access unreliable, so skip memory eviction due to untrustworthy VRAM
> + * contents
> + * - Remove all memory mappings since VRAM contents will be lost
> + *
> + * Re-initialization phase:
> + *
> + * - Recreate kernel BOs due to skipped memory eviction in prepare phase
> + * - Restore kernel queues which were killed in prepare phase
> + * - Reload all uC firmwares
> + * - Bring up all hardware units
> + * - Unwedge the device to allow userspace access
> + *
> + * Since VRAM contents are lost, the user is expected to recreate user memory
> + * and reload context.
> + *
> + * TODO: Reuse FLR callbacks for bus error handling.
> + *
> + * Current implementation is only limited to re-initializing GT. This needs to
> + * be extended for a lot of components listed below.
> + *
> + * - Proper re-initialization of GSC and PXP for integrated platforms
> + * - SR-IOV cases which need PF and VF synchronization
> + * - Re-initialization of all child devices registered by Xe
> + * - MM corner cases
> + * - Display
> + */
> +
> static void prepare_device_for_reset(struct pci_dev *pdev)
> {
> struct xe_device *xe = pdev_to_xe_device(pdev);
> @@ -153,9 +199,97 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
> xe_wedge_put(xe);
> }
>
> +static inline bool xe_pci_reset_skip(struct xe_device *xe)
> +{
> + return !IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe_sriov_pf_num_vfs(xe) || xe->info.probe_display;
> +}
> +
> +static void xe_pci_reset_prepare(struct pci_dev *pdev)
> +{
> + struct xe_device *xe = pdev_to_xe_device(pdev);
> + int err;
> +
> + /* No guarantees by PCI core */
> + if (!pm_runtime_active(&pdev->dev))
> + return;
Add a log here. xe_dbg should also be okay
> +
> + err = xe_wedged(xe);
> + if (err)
> + xe_err(xe, "PCI reset failed, device in unexpected state\n");
> +
> + /* Wedge the device to prevent userspace access but don't send the event yet */
> + xe_wedge_get(xe);
> + if (err)
> + return;
> +
> + err = xe_pci_reset_skip(xe);
> + if (err) {
> + xe_err(xe, "PCI reset not supported\n");
> + return;
> + }
> +
> + /*
> + * The hardware could be in corrupted state and access unreliable, but we try to
> + * update data structures and cleanup any pending work to avoid side effects during
> + * PCIe FLR. This will be similar to system suspend flow but without eviction.
> + */
> + err = xe_device_suspend(xe, true);
> + if (err) {
> + xe_err(xe, "Failed to prepare for PCI reset\n");
> + return;
> + }
> +
> + xe->flr_prepared = true;
> + xe_info(xe, "Prepared for PCI reset\n");
> +}
> +
> +static void xe_pci_reset_done(struct pci_dev *pdev)
> +{
> + struct xe_device *xe = pdev_to_xe_device(pdev);
> + int err;
> +
> + /* No guarantees by PCI core */
> + if (!pm_runtime_active(&pdev->dev))
> + return;
Same
> +
> + err = xe_pci_reset_skip(xe);
> + if (err)
> + goto out;
> +
> + if (!xe->flr_prepared)
> + goto out;
> +
> + /* Unprepare early in case we fail */
> + xe->flr_prepared = false;
> +
> + /*
> + * We already have the data structures intact, so try to re-initialize the device.
> + * This will be similar to system resume flow, except we'll also need to recreate
> + * kernel bos and restore kernel queues.
> + */
> + err = xe_device_resume(xe, true);
> + if (err) {
> + xe_err(xe, "Re-initialization failed\n");
> + goto out;
> + }
> +
> + /* Unwedge to allow userspace access */
> + xe_wedge_put(xe);
> + xe_info(xe, "Re-initialization success\n");
Add PCI reset in log. Maybe PCI reset done
With the above logs added
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> +
> + return;
> +out:
> + /* Most likely the device is unusable and there's nothing we can do about it */
> + xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_REBIND | DRM_WEDGE_RECOVERY_BUS_RESET);
> + /* Drop local reference */
> + xe_wedge_put(xe);
> +}
> +
> const struct pci_error_handlers xe_pci_error_handlers = {
> .error_detected = xe_pci_error_detected,
> .mmio_enabled = xe_pci_error_mmio_enabled,
> .slot_reset = xe_pci_error_slot_reset,
> .resume = xe_pci_error_resume,
> + .reset_prepare = xe_pci_reset_prepare,
> + .reset_done = xe_pci_reset_done,
> };
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2026-10-29 8:40 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-26 5:06 [PATCH v11 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-10-26 5:06 ` [PATCH v11 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-10-26 5:06 ` [PATCH v11 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
2026-10-26 5:06 ` [PATCH v11 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
2026-10-26 5:06 ` [PATCH v11 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
2026-10-26 5:06 ` [PATCH v11 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
2026-10-26 5:06 ` [PATCH v11 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
2026-10-26 5:06 ` [PATCH v11 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
2026-10-26 5:06 ` [PATCH v11 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
2026-10-29 6:14 ` Tauro, Riana
2026-10-29 8:20 ` Raag Jadav
2026-10-26 5:06 ` [PATCH v11 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
2026-10-29 8:40 ` Tauro, Riana
2026-10-26 5:07 ` [PATCH v11 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.