* [PATCH v7 01/10] drm/xe/cper: Add CPER reporting entry point for xe_log
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
@ 2026-10-29 8:27 ` Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 02/10] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
` (12 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:27 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Introduce xe_cper_emit() as the single entry point for emitting
CPER records from xe_log. xe_log now forwards every SIGID log entry
with its full context (component, location, data/len and formatted
message), and xe_cper decides how to report it. Hardware SIGIDs are
routed to a hardware error helper, software SIGIDs are left as TODO.
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/Makefile | 2 ++
drivers/gpu/drm/xe/xe_cper.c | 47 ++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_cper.h | 26 ++++++++++++++++++++
drivers/gpu/drm/xe/xe_log.c | 5 +++-
4 files changed, 79 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/xe/xe_cper.c
create mode 100644 drivers/gpu/drm/xe/xe_cper.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index a8476e2e8d54..655487a6550f 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -169,6 +169,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
+xe-$(CONFIG_UEFI_CPER) += xe_cper.o
+
# graphics virtualization (SR-IOV) support
xe-y += \
xe_gt_sriov_vf.o \
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
new file mode 100644
index 000000000000..ee7ca3cbae9b
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/err.h>
+#include <linux/minmax.h>
+
+#include "xe_cper.h"
+#include "xe_device.h"
+#include "xe_ras_types.h"
+
+static bool is_hw_sigid(enum xe_sigid sigid)
+{
+ return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
+}
+
+static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+ const struct xe_ras_error_class *counter)
+{
+ /* TODO */
+}
+
+/**
+ * xe_cper_emit() - Emit a CPER record for a SIGID log entry
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @component: Component identifier
+ * @location: Location details of the @component
+ * @data: Pointer to the additional details, or ERR_PTR, or NULL if not applicable
+ * @len: Length of the @data in bytes, or 0 if not applicable
+ * @vaf: Formatted log message
+ *
+ * Emit a CPER record for a SIGID log entry
+ */
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+ u32 component, u32 location, const void *data, size_t len,
+ struct va_format *vaf)
+{
+ if (is_hw_sigid(sigid) && !IS_ERR_OR_NULL(data)) {
+ cper_emit_hw_err(xe, cper_sev, sigid, data);
+ return;
+ }
+
+ /* TODO software CPER */
+}
diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
new file mode 100644
index 000000000000..84676c7645a5
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_H_
+#define _XE_CPER_H_
+
+#include <linux/types.h>
+
+#include "abi/xe_sigid_abi.h"
+
+struct va_format;
+struct xe_device;
+
+#if IS_ENABLED(CONFIG_UEFI_CPER)
+void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+ u32 component, u32 location, const void *data, size_t len,
+ struct va_format *vaf);
+#else
+static inline void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+ u32 component, u32 location, const void *data, size_t len,
+ struct va_format *vaf) {}
+#endif
+
+#endif /* _XE_CPER_H_ */
diff --git a/drivers/gpu/drm/xe/xe_log.c b/drivers/gpu/drm/xe/xe_log.c
index 29eb16db3320..80e2b1724ceb 100644
--- a/drivers/gpu/drm/xe/xe_log.c
+++ b/drivers/gpu/drm/xe/xe_log.c
@@ -8,6 +8,7 @@
#include "abi/xe_log_abi.h"
+#include "xe_cper.h"
#include "xe_device.h"
#include "xe_log.h"
#include "xe_pci_types.h"
@@ -19,7 +20,9 @@ static void log_emit_cper(struct pci_dev *pdev, int cper_sev, enum xe_sigid sigi
{
KUNIT_STATIC_STUB_REDIRECT(log_emit_cper, pdev, cper_sev, sigid,
component, location, data, len, vaf);
- /* TODO */
+
+ xe_cper_emit(xe_any_to_xe(pdev), cper_sev, sigid,
+ component, location, data, len, vaf);
}
static const char *log_unknown_component_prefix(u32 component)
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 02/10] drm/xe/cper: Retrieve the error counter record for CPER reporting
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 01/10] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
@ 2026-10-29 8:27 ` Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 03/10] drm/xe/cper: Initialize Intel-specific CPER header Badal Nilawar
` (11 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:27 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Retrieve error counter record required to build a CPER record.
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/xe_cper.c | 14 ++++++++++++-
drivers/gpu/drm/xe/xe_ras.c | 39 ++++++++++++++++++++++++++++--------
drivers/gpu/drm/xe/xe_ras.h | 2 ++
3 files changed, 46 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index ee7ca3cbae9b..484f1b025558 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -4,10 +4,13 @@
*/
#include <linux/err.h>
+#include <linux/kernel.h>
#include <linux/minmax.h>
#include "xe_cper.h"
#include "xe_device.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
#include "xe_ras_types.h"
static bool is_hw_sigid(enum xe_sigid sigid)
@@ -18,7 +21,16 @@ static bool is_hw_sigid(enum xe_sigid sigid)
static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
const struct xe_ras_error_class *counter)
{
- /* TODO */
+ struct xe_ras_get_counter_response response = {};
+
+ /* Fetching the counter sends a sysctrl command */
+ might_sleep();
+ xe_device_assert_mem_access(xe);
+
+ if (xe_ras_get_counter_response(xe, counter, &response)) {
+ xe_err(xe, "CPER: failed to get counter, skipping record\n");
+ return;
+ }
}
/**
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index db3cbc186a51..0555b86b63b2 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -679,6 +679,30 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value)
{
struct xe_ras_get_counter_response response = {0};
+ int ret;
+
+ ret = xe_ras_get_counter_response(xe, counter, &response);
+ if (ret)
+ return ret;
+
+ *value = response.value;
+
+ return 0;
+}
+
+/**
+ * xe_ras_get_counter_response() - Get error counter record
+ * @xe: Xe device instance
+ * @counter: RAS error class
+ * @response: Counter record retrieved
+ *
+ * Retrieve the counter record of a specific error class from firmware.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+ struct xe_ras_get_counter_response *response)
+{
struct xe_ras_get_counter_request request = {0};
struct xe_sysctrl_mailbox_command command = {0};
struct xe_ras_error_common *common;
@@ -688,7 +712,7 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
request.counter = *counter;
xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_COUNTER,
- &request, sizeof(request), &response, sizeof(response));
+ &request, sizeof(request), response, sizeof(*response));
ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
if (ret) {
@@ -696,20 +720,19 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
return ret;
}
- if (rlen != sizeof(response)) {
+ if (rlen != sizeof(*response)) {
xe_err(xe, "sysctrl: unexpected get counter response length %zu (expected %zu)\n",
- rlen, sizeof(response));
+ rlen, sizeof(*response));
return -EIO;
}
- if (!ras_counter_is_valid(xe, &response.counter))
+ if (!ras_counter_is_valid(xe, &response->counter))
return -EBADMSG;
- common = &response.counter.common;
- *value = response.value;
+ common = &response->counter.common;
- xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", *value, comp_to_str(common->component),
- sev_to_str(common->severity));
+ xe_dbg(xe, "[RAS]: get counter %u for %s %s\n", response->value,
+ comp_to_str(common->component), sev_to_str(common->severity));
return 0;
}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 1b358c7d040f..c44fa172011f 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -23,5 +23,7 @@ int xe_ras_init(struct xe_device *xe);
enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
u32 xe_ras_get_max_pages(struct xe_device *xe);
+int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
+ struct xe_ras_get_counter_response *response);
#endif
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 03/10] drm/xe/cper: Initialize Intel-specific CPER header
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 01/10] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 02/10] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
@ 2026-10-29 8:27 ` Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 04/10] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
` (10 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:27 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Define the Intel-specific CPER header and initialize it
from the error counter record for Intel GPU hardware errors.
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/xe_cper.c | 50 ++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_cper_types.h | 49 +++++++++++++++++++++++++++++
2 files changed, 99 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 484f1b025558..3a6e3ad1e130 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -6,18 +6,66 @@
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/minmax.h>
+#include <linux/pci.h>
#include "xe_cper.h"
+#include "xe_cper_types.h"
#include "xe_device.h"
#include "xe_printk.h"
#include "xe_ras.h"
#include "xe_ras_types.h"
+static bool is_sigid(u32 sigid)
+{
+ return sigid != INTEL_SIGID_INVALID && sigid != U32_MAX;
+}
+
static bool is_hw_sigid(enum xe_sigid sigid)
{
return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
}
+static void cper_init_intel_hdr(struct xe_device *xe, const struct xe_ras_error_class *counter,
+ u64 first_timestamp, u32 sig_id, u32 error_count,
+ struct xe_cper_intel_hdr *ihdr)
+{
+ ihdr->counter = *counter;
+ ihdr->validation_bits |= XE_CPER_VALID_LOCATION;
+ ihdr->sig_id = U32_MAX;
+
+ if (first_timestamp) {
+ ihdr->first_timestamp = first_timestamp;
+ ihdr->validation_bits |= XE_CPER_VALID_FIRST_TIMESTAMP;
+ }
+
+ if (is_sigid(sig_id)) {
+ ihdr->sig_id = sig_id;
+ ihdr->validation_bits |= XE_CPER_VALID_SIG_ID;
+ }
+
+ ihdr->error_count = error_count;
+
+ strscpy(ihdr->pci_bdf, pci_name(to_pci_dev(xe->drm.dev)), sizeof(ihdr->pci_bdf));
+ ihdr->validation_bits |= XE_CPER_VALID_PCI_BDF;
+
+#ifdef MODULE
+ if (THIS_MODULE->srcversion) {
+ strscpy(ihdr->drv_version, THIS_MODULE->srcversion, sizeof(ihdr->drv_version));
+ ihdr->validation_bits |= XE_CPER_VALID_DRV_VERSION;
+ }
+#endif
+}
+
+static void cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+ const struct xe_ras_error_class *counter,
+ const struct xe_ras_get_counter_response *response)
+{
+ struct xe_cper_intel_hdr ihdr = {};
+
+ cper_init_intel_hdr(xe, counter, response->timestamp,
+ sigid, response->value, &ihdr);
+}
+
static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
const struct xe_ras_error_class *counter)
{
@@ -31,6 +79,8 @@ static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid s
xe_err(xe, "CPER: failed to get counter, skipping record\n");
return;
}
+
+ cper_emit_counter(xe, cper_sev, sigid, counter, &response);
}
/**
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
new file mode 100644
index 000000000000..a42f4f2bd719
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CPER_TYPES_H_
+#define _XE_CPER_TYPES_H_
+
+#include <linux/types.h>
+
+#include "xe_ras_types.h"
+
+/*
+ * Validation bits definition for validation_bits in struct
+ * xe_cper_intel_hdr. When set, corresponding fields in header
+ * contains valid data
+ */
+#define XE_CPER_VALID_LOCATION 0x0001
+#define XE_CPER_VALID_FIRST_TIMESTAMP 0x0002
+#define XE_CPER_VALID_SIG_ID 0x0004
+#define XE_CPER_VALID_PCI_BDF 0x0008
+#define XE_CPER_VALID_DRV_VERSION 0x0010
+
+/**
+ * struct xe_cper_intel_hdr - Intel-specific CPER header
+ *
+ * Fixed-size header for the Intel GPU error section of a CPER record.
+ * All multi-byte fields are little-endian.
+ */
+struct xe_cper_intel_hdr {
+ /** @counter: Error class (severity, component, location, cause) */
+ struct xe_ras_error_class counter;
+ /** @first_timestamp: First occurrence of this error class, in ticks */
+ u64 first_timestamp;
+ /** @sig_id: Aggregated error class SIG ID; set to U32_MAX if unknown */
+ u32 sig_id;
+ /** @error_count: Number of times this error has been observed */
+ u32 error_count;
+ /** @validation_bits: Raw u16 view of all valid bits */
+ u16 validation_bits;
+ /** @pci_bdf: PCI location string, format "DDDD:bb:dd.f" */
+ char pci_bdf[16];
+ /** @drv_version: Driver source version string (THIS_MODULE->srcversion) */
+ char drv_version[25];
+ /** @reserved: Reserved for future use, must be zero */
+ u8 reserved[261];
+} __packed;
+
+#endif
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 04/10] drm/xe/cper: Construct CPER record for hardware errors
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (2 preceding siblings ...)
2026-10-29 8:27 ` [PATCH v7 03/10] drm/xe/cper: Initialize Intel-specific CPER header Badal Nilawar
@ 2026-10-29 8:27 ` Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 05/10] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
` (9 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:27 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Assemble the CPER record header, section descriptor and the Intel
error section for Intel GPU hardware errors.
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v7:
- Add GUID of PCI ID 6752
---
drivers/gpu/drm/xe/xe_cper.c | 140 +++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_cper_types.h | 53 +++++++++++
2 files changed, 193 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 3a6e3ad1e130..3a733cd00c0d 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -3,10 +3,14 @@
* Copyright © 2026 Intel Corporation
*/
+#include <linux/bcd.h>
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/minmax.h>
#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/time.h>
+#include <linux/timekeeping.h>
#include "xe_cper.h"
#include "xe_cper_types.h"
@@ -25,6 +29,58 @@ static bool is_hw_sigid(enum xe_sigid sigid)
return in_range(sigid, INTEL_SIGID_GPU_XE_HARDWARE_START, INTEL_SIGID_BATCH);
}
+/* CPER platform_id GUIDs (RFC 9562 UUIDv5) for each PCI device ID. */
+static const struct xe_device_guid_entry xe_device_guids[] = {
+ { 0x674C, GUID_INIT(0x9046afe5, 0x9041, 0x5124,
+ 0x86, 0x14, 0x92, 0x55, 0x0d, 0x9e, 0x9d, 0xa6) },
+ { 0x674D, GUID_INIT(0xf95911b8, 0x6564, 0x5905,
+ 0xa6, 0xa7, 0xb9, 0xbf, 0x54, 0xab, 0x6c, 0x27) },
+ { 0x674E, GUID_INIT(0xb8d24106, 0x0108, 0x59f1,
+ 0x8f, 0xfc, 0x9f, 0xc4, 0xa9, 0xc9, 0xb7, 0xb0) },
+ { 0x674F, GUID_INIT(0xdd8dd88e, 0xef2f, 0x59b1,
+ 0x99, 0x15, 0xdb, 0x6f, 0x1d, 0xc9, 0xb4, 0x5d) },
+ { 0x6750, GUID_INIT(0x1dd66c44, 0x87d5, 0x524a,
+ 0xad, 0x6e, 0xfc, 0x18, 0x9d, 0x42, 0x6f, 0x1a) },
+ { 0x6751, GUID_INIT(0x17d0dd04, 0x2fad, 0x5400,
+ 0x99, 0xc8, 0x9b, 0x45, 0x51, 0x3b, 0x67, 0xe3) },
+ { 0x6752, GUID_INIT(0xb778ead8, 0x0009, 0x59a7,
+ 0xa1, 0x3a, 0x78, 0xce, 0x4d, 0xdd, 0xae, 0xf5) },
+};
+
+static const guid_t *lookup_device_guid(struct xe_device *xe)
+{
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(xe_device_guids); i++)
+ if (xe_device_guids[i].device_id == pdev->device)
+ return &xe_device_guids[i].guid;
+ return NULL;
+}
+
+static u64 cper_timestamp_now(void)
+{
+ struct tm tm;
+ u64 ts = 0;
+ u8 *p = (u8 *)&ts;
+ int year;
+
+ time64_to_tm(ktime_get_real_seconds(), 0, &tm);
+
+ year = tm.tm_year + 1900;
+
+ p[0] = bin2bcd(tm.tm_sec);
+ p[1] = bin2bcd(tm.tm_min);
+ p[2] = bin2bcd(tm.tm_hour);
+ p[3] = 0x0;
+ p[4] = bin2bcd(tm.tm_mday);
+ p[5] = bin2bcd(tm.tm_mon + 1);
+ p[6] = bin2bcd(year % 100);
+ p[7] = bin2bcd(year / 100);
+
+ return ts;
+}
+
static void cper_init_intel_hdr(struct xe_device *xe, const struct xe_ras_error_class *counter,
u64 first_timestamp, u32 sig_id, u32 error_count,
struct xe_cper_intel_hdr *ihdr)
@@ -56,6 +112,89 @@ static void cper_init_intel_hdr(struct xe_device *xe, const struct xe_ras_error_
#endif
}
+static void cper_init_record_hdr(struct xe_device *xe, u8 severity,
+ const guid_t *notification_type,
+ struct cper_record_header *rhdr,
+ u32 total_len)
+{
+ const guid_t *device_guid;
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+
+ /* Assemble the CPER record header (UEFI Appendix N.2.1) */
+ memcpy(rhdr->signature, CPER_SIG_RECORD, CPER_SIG_SIZE);
+ rhdr->revision = CPER_RECORD_REV;
+ rhdr->signature_end = CPER_SIG_END;
+ rhdr->section_count = 1;
+ rhdr->error_severity = severity;
+ rhdr->validation_bits = CPER_VALID_TIMESTAMP;
+ rhdr->record_length = total_len;
+ rhdr->timestamp = cper_timestamp_now();
+ rhdr->creator_id = INTEL_CPER_CREATOR_XEKMD;
+ rhdr->notification_type = *notification_type;
+ rhdr->record_id = cper_next_record_id();
+ device_guid = lookup_device_guid(xe);
+ if (device_guid) {
+ rhdr->platform_id = *device_guid;
+ rhdr->validation_bits |= CPER_VALID_PLATFORM_ID;
+ } else {
+ xe_printk(xe, warn_once, "CPER: no platform GUID for device %04x\n",
+ pdev->device);
+ }
+}
+
+static void cper_init_section_desc(struct xe_device *xe, u8 severity,
+ struct cper_section_descriptor *sdesc,
+ u32 einfo_len)
+{
+ sdesc->section_offset = sizeof(struct cper_record_header) +
+ sizeof(struct cper_section_descriptor);
+ sdesc->section_length = sizeof(struct xe_cper_intel_hdr) + einfo_len;
+ sdesc->revision = CPER_SEC_REV;
+ sdesc->validation_bits = 0;
+ sdesc->section_type = INTEL_CPER_SECTION_ACCEL_GENERIC;
+ sdesc->section_severity = severity;
+ if (xe->info.has_device_uid) {
+ memcpy(&sdesc->fru_id, &xe->device_uid, sizeof(xe->device_uid));
+ sdesc->validation_bits |= CPER_SEC_VALID_FRU_ID;
+ }
+}
+
+static void cper_record_emit(struct xe_device *xe, u8 severity,
+ const guid_t *notification_type,
+ const struct xe_cper_intel_hdr *ihdr,
+ const void *einfo, u32 einfo_len)
+{
+ struct cper_section_descriptor *sdesc;
+ struct cper_record_header *rhdr;
+ struct xe_cper_nonstd_record *rec;
+ u32 total_len;
+
+ total_len = sizeof(struct xe_cper_nonstd_record) + einfo_len;
+ rec = kzalloc(total_len, GFP_KERNEL);
+ if (!rec)
+ return;
+
+ rhdr = &rec->record_hdr;
+ sdesc = &rec->section_desc;
+
+ /* Assemble the CPER record header (UEFI Appendix N.2.1) */
+ cper_init_record_hdr(xe, severity, notification_type, rhdr, total_len);
+
+ /* Assemble the section descriptor (UEFI Appendix N.2.2) */
+ cper_init_section_desc(xe, severity, sdesc, einfo_len);
+
+ /* Copy the Intel-specific section header */
+ rec->intel_hdr = *ihdr;
+
+ /* Append optional variable-length error info */
+ if (einfo && einfo_len)
+ memcpy((u8 *)rec + sizeof(*rec), einfo, einfo_len);
+
+ /* TODO: Emit trace event */
+
+ kfree(rec);
+}
+
static void cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
const struct xe_ras_error_class *counter,
const struct xe_ras_get_counter_response *response)
@@ -64,6 +203,7 @@ static void cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid
cper_init_intel_hdr(xe, counter, response->timestamp,
sigid, response->value, &ihdr);
+ cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR, &ihdr, NULL, 0);
}
static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
index a42f4f2bd719..ce1ae53b3415 100644
--- a/drivers/gpu/drm/xe/xe_cper_types.h
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -6,7 +6,9 @@
#ifndef _XE_CPER_TYPES_H_
#define _XE_CPER_TYPES_H_
+#include <linux/cper.h>
#include <linux/types.h>
+#include <linux/uuid.h>
#include "xe_ras_types.h"
@@ -21,6 +23,28 @@
#define XE_CPER_VALID_PCI_BDF 0x0008
#define XE_CPER_VALID_DRV_VERSION 0x0010
+/*
+ * Intel CPER GUID Namespace — RFC 9562 UUIDv5 (SHA-1 name-based)
+ *
+ * All values below are generated deterministically by uuid generator.
+ * Do not hand-edit the byte values.
+ */
+
+/* Creator IDs */
+#define INTEL_CPER_CREATOR_XEKMD \
+ GUID_INIT(0x9a42070f, 0xdf9d, 0x555e, \
+ 0xba, 0x02, 0x7c, 0xbc, 0x86, 0x3d, 0x37, 0x1c)
+
+/* Notification Types */
+#define INTEL_CPER_NOTIFY_GPU_ERROR \
+ GUID_INIT(0x4ae12aef, 0x8745, 0x5fc7, \
+ 0xb9, 0x96, 0x71, 0xee, 0xbb, 0x51, 0xf2, 0x23)
+
+/* Section Types */
+#define INTEL_CPER_SECTION_ACCEL_GENERIC \
+ GUID_INIT(0xea9d8f84, 0x4258, 0x5227, \
+ 0x80, 0x28, 0xb9, 0xb1, 0x3e, 0x6d, 0x58, 0xb0)
+
/**
* struct xe_cper_intel_hdr - Intel-specific CPER header
*
@@ -46,4 +70,33 @@ struct xe_cper_intel_hdr {
u8 reserved[261];
} __packed;
+/**
+ * struct xe_cper_nonstd_record - Intel GPU CPER record
+ *
+ * Contains the standard CPER record header, section descriptor, and the
+ * Intel error section header.
+ */
+struct xe_cper_nonstd_record {
+ /** @record_hdr: Standard CPER record header (UEFI Appendix N.2.1) */
+ struct cper_record_header record_hdr;
+ /** @section_desc: CPER section descriptor */
+ struct cper_section_descriptor section_desc;
+ /** @intel_hdr: Intel-specific CPER header */
+ struct xe_cper_intel_hdr intel_hdr;
+} __packed;
+
+/**
+ * struct xe_device_guid_entry - Mapping from PCI device ID to CPER device GUID
+ *
+ * Used to resolve the platform_id field in a CPER record header.
+ * GUIDs are UUIDv5 (RFC 9562, SHA-1) derived from the Intel CPER namespace
+ * with name string "platform/8086:<dev_id_hex_lower>".
+ */
+struct xe_device_guid_entry {
+ /** @device_id: PCI device ID */
+ u16 device_id;
+ /** @guid: Corresponding UUIDv5 device GUID */
+ guid_t guid;
+};
+
#endif
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 05/10] drm/xe/cper: Log CPER records for aggregate counter retrieval
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (3 preceding siblings ...)
2026-10-29 8:27 ` [PATCH v7 04/10] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
@ 2026-10-29 8:27 ` Badal Nilawar
2026-10-29 8:27 ` [PATCH v7 06/10] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
` (8 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:27 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Log CPER records for aggregate counter retrieval from userspace when
cper_on_query sysfs is enabled.
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
v7: Fix offlined_pages leak on sysfs init failure by registering
ras_fini() early, and make GPU health sysfs failure fatal (sashiko)
---
.../ABI/testing/sysfs-driver-intel-xe-cper | 18 +++++
drivers/gpu/drm/xe/xe_cper.c | 67 +++++++++++++++++--
drivers/gpu/drm/xe/xe_cper.h | 11 +++
drivers/gpu/drm/xe/xe_cper_types.h | 8 +++
drivers/gpu/drm/xe/xe_device_types.h | 4 ++
drivers/gpu/drm/xe/xe_ras.c | 56 ++++++++++++++--
6 files changed, 153 insertions(+), 11 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-cper b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
new file mode 100644
index 000000000000..2faccc318b34
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-cper
@@ -0,0 +1,18 @@
+What: /sys/bus/pci/drivers/xe/.../cper_on_query
+Date: October 2026
+KernelVersion: 7.5
+Contact: intel-xe@lists.freedesktop.org
+Description:
+ This file controls whether a CPER (Common Platform Error Record)
+ is emitted each time a RAS error counter is queried.
+
+ This sysfs file is present only on Intel Xe platforms that support
+ the RAS error counter interface and when the kernel is built with
+ CPER support. Reading the current setting is available to all
+ users, while updating it is restricted to administrative users
+ only.
+
+ The value is a boolean. When set to 1, every counter query emits
+ a CPER record built from the counter and its associated info
+ queue data. When set to 0 (default), no record is emitted on
+ query.
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index 3a733cd00c0d..af10a2b24fd5 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -4,11 +4,13 @@
*/
#include <linux/bcd.h>
+#include <linux/device.h>
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/minmax.h>
#include <linux/pci.h>
#include <linux/slab.h>
+#include <linux/sysfs.h>
#include <linux/time.h>
#include <linux/timekeeping.h>
@@ -195,12 +197,24 @@ static void cper_record_emit(struct xe_device *xe, u8 severity,
kfree(rec);
}
-static void cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
- const struct xe_ras_error_class *counter,
- const struct xe_ras_get_counter_response *response)
+/**
+ * xe_cper_emit_counter() - Emit CPER records for an already fetched error counter
+ * @xe: The &xe_device
+ * @cper_sev: CPER severity
+ * @sigid: Error signature identifier
+ * @counter: RAS error class
+ * @response: Counter response returned by firmware for @counter
+ *
+ * Build and emit a CPER record from @response.
+ */
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+ const struct xe_ras_error_class *counter,
+ const struct xe_ras_get_counter_response *response)
{
struct xe_cper_intel_hdr ihdr = {};
+ xe_assert(xe, is_hw_sigid(sigid));
+
cper_init_intel_hdr(xe, counter, response->timestamp,
sigid, response->value, &ihdr);
cper_record_emit(xe, cper_sev, &INTEL_CPER_NOTIFY_GPU_ERROR, &ihdr, NULL, 0);
@@ -220,7 +234,7 @@ static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid s
return;
}
- cper_emit_counter(xe, cper_sev, sigid, counter, &response);
+ xe_cper_emit_counter(xe, cper_sev, sigid, counter, &response);
}
/**
@@ -247,3 +261,48 @@ void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
/* TODO software CPER */
}
+
+static ssize_t cper_on_query_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct xe_device *xe = kdev_to_xe_device(dev);
+
+ return sysfs_emit(buf, "%u\n", READ_ONCE(xe->cper.on_query));
+}
+
+static ssize_t cper_on_query_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct xe_device *xe = kdev_to_xe_device(dev);
+ bool enable;
+ int ret;
+
+ ret = kstrtobool(buf, &enable);
+ if (ret)
+ return ret;
+
+ WRITE_ONCE(xe->cper.on_query, enable);
+
+ return count;
+}
+static DEVICE_ATTR_RW(cper_on_query);
+
+static struct attribute *cper_attrs[] = {
+ &dev_attr_cper_on_query.attr,
+ NULL
+};
+
+/* See Documentation/ABI/testing/sysfs-driver-intel-xe-cper */
+static const struct attribute_group cper_group = {
+ .attrs = cper_attrs,
+};
+
+/**
+ * xe_cper_sysfs_init() - Create the CPER sysfs attributes
+ * @xe: The &xe_device
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_cper_sysfs_init(struct xe_device *xe)
+{
+ return devm_device_add_group(xe->drm.dev, &cper_group);
+}
diff --git a/drivers/gpu/drm/xe/xe_cper.h b/drivers/gpu/drm/xe/xe_cper.h
index 84676c7645a5..915460db2a74 100644
--- a/drivers/gpu/drm/xe/xe_cper.h
+++ b/drivers/gpu/drm/xe/xe_cper.h
@@ -12,15 +12,26 @@
struct va_format;
struct xe_device;
+struct xe_ras_error_class;
+struct xe_ras_get_counter_response;
#if IS_ENABLED(CONFIG_UEFI_CPER)
void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
u32 component, u32 location, const void *data, size_t len,
struct va_format *vaf);
+void xe_cper_emit_counter(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
+ const struct xe_ras_error_class *error_class,
+ const struct xe_ras_get_counter_response *response);
+int xe_cper_sysfs_init(struct xe_device *xe);
#else
static inline void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
u32 component, u32 location, const void *data, size_t len,
struct va_format *vaf) {}
+static inline void xe_cper_emit_counter(struct xe_device *xe, int cper_sev,
+ enum xe_sigid sigid,
+ const struct xe_ras_error_class *error_class,
+ const struct xe_ras_get_counter_response *response) {}
+static inline int xe_cper_sysfs_init(struct xe_device *xe) { return 0; }
#endif
#endif /* _XE_CPER_H_ */
diff --git a/drivers/gpu/drm/xe/xe_cper_types.h b/drivers/gpu/drm/xe/xe_cper_types.h
index ce1ae53b3415..68e30df0440e 100644
--- a/drivers/gpu/drm/xe/xe_cper_types.h
+++ b/drivers/gpu/drm/xe/xe_cper_types.h
@@ -99,4 +99,12 @@ struct xe_device_guid_entry {
guid_t guid;
};
+/**
+ * struct xe_cper - Xe CPER state
+ */
+struct xe_cper {
+ /** @on_query: Emit a CPER record on each RAS counter query */
+ bool on_query;
+};
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 6a6f9a24365c..b98418795d5e 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -12,6 +12,7 @@
#include <drm/drm_file.h>
#include <drm/ttm/ttm_device.h>
+#include "xe_cper_types.h"
#include "xe_devcoredump_types.h"
#include "xe_drm_ras_types.h"
#include "xe_heci_gsc.h"
@@ -566,6 +567,9 @@ struct xe_device {
struct xe_ras_state state;
} ras;
+ /** @cper: CPER state */
+ struct xe_cper cper;
+
/** @i2c: I2C host controller */
struct xe_i2c *i2c;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 0555b86b63b2..8bdb9c626ddd 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -6,6 +6,7 @@
#include "xe_assert.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_cper.h"
#include "xe_debugfs.h"
#include "xe_device.h"
#include "xe_drm_ras.h"
@@ -110,7 +111,8 @@ static const char * const gpu_health_states[] = {
};
static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_MAX);
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value);
+static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
+ u32 *value, bool emit_cper);
static u8 drm_to_xe_ras_severity(u8 severity)
{
@@ -136,6 +138,20 @@ static u8 xe_to_drm_ras_severity(u8 severity)
}
}
+static u8 ras_sev_to_cper_sev(u8 severity)
+{
+ switch (severity) {
+ case XE_RAS_SEV_CORRECTABLE:
+ return CPER_SEV_CORRECTED;
+ case XE_RAS_SEV_UNCORRECTABLE:
+ return CPER_SEV_RECOVERABLE;
+ case XE_RAS_SEV_INFORMATIONAL:
+ return CPER_SEV_INFORMATIONAL;
+ default:
+ return CPER_SEV_RECOVERABLE;
+ }
+}
+
static u8 drm_to_xe_ras_component(u8 component)
{
switch (component) {
@@ -172,6 +188,24 @@ static u8 xe_to_drm_ras_component(u8 component)
}
}
+static enum xe_sigid ras_comp_to_hw_sigid(u8 component)
+{
+ switch (component) {
+ case XE_RAS_COMP_DEVICE_MEMORY:
+ return XE_SIGID_DEVICE_MEMORY;
+ case XE_RAS_COMP_CORE_COMPUTE:
+ return XE_SIGID_CORE_COMPUTE;
+ case XE_RAS_COMP_PCIE:
+ return XE_SIGID_PCIE;
+ case XE_RAS_COMP_FABRIC:
+ return XE_SIGID_FABRIC;
+ case XE_RAS_COMP_SOC_INTERNAL:
+ return XE_SIGID_SOC_INTERNAL;
+ default:
+ return XE_SIGID_HW;
+ }
+}
+
static int ras_status_to_errno(u32 status)
{
switch (status) {
@@ -534,7 +568,7 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component
counter.common.severity = severity;
counter.common.component = component;
- ret = get_counter(xe, &counter, &value);
+ ret = get_counter(xe, &counter, &value, false);
if (ret)
return;
@@ -676,7 +710,8 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
}
}
-static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter, u32 *value)
+static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
+ u32 *value, bool emit_cper)
{
struct xe_ras_get_counter_response response = {0};
int ret;
@@ -686,7 +721,10 @@ static int get_counter(struct xe_device *xe, struct xe_ras_error_class *counter,
return ret;
*value = response.value;
-
+ if (emit_cper)
+ xe_cper_emit_counter(xe, ras_sev_to_cper_sev(counter->common.severity),
+ ras_comp_to_hw_sigid(counter->common.component),
+ counter, &response);
return 0;
}
@@ -867,7 +905,7 @@ int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8 component, u32 *val
counter.common.component = drm_to_xe_ras_component(component);
guard(xe_pm_runtime)(xe);
- return get_counter(xe, &counter, value);
+ return get_counter(xe, &counter, value, READ_ONCE(xe->cper.on_query));
}
/**
@@ -1231,6 +1269,10 @@ int xe_ras_init(struct xe_device *xe)
xa_init(&state->offlined_pages);
+ ret = devm_add_action_or_reset(xe->drm.dev, ras_fini, xe);
+ if (ret)
+ return ret;
+
/* Fetch the offline list before queue to avoid duplication */
get_offline_list(xe);
get_offline_queue(xe);
@@ -1244,7 +1286,7 @@ int xe_ras_init(struct xe_device *xe)
ret = devm_device_add_group(xe->drm.dev, &gpu_health_group);
if (ret)
- xe_err(xe, "Failed to create GPU health sysfs, err=%d\n", ret);
+ return ret;
- return devm_add_action_or_reset(xe->drm.dev, ras_fini, xe);
+ return xe_cper_sysfs_init(xe);
}
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 06/10] drm/xe/cper: Emit cper record to trace buf
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (4 preceding siblings ...)
2026-10-29 8:27 ` [PATCH v7 05/10] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
@ 2026-10-29 8:27 ` Badal Nilawar
2026-10-29 8:28 ` [PATCH v7 07/10] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
` (7 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:27 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Add the xe_error_cper tracepoint and emit each assembled CPER record
through it. Besides the raw record, the event carries the device name,
platform ID, FRU ID, severity and the Intel error section header, so
tools can pick up the records from the trace buffer.
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/Makefile | 3 +-
drivers/gpu/drm/xe/xe_cper.c | 15 ++++++-
drivers/gpu/drm/xe/xe_trace_cper.c | 9 +++++
drivers/gpu/drm/xe/xe_trace_cper.h | 65 ++++++++++++++++++++++++++++++
4 files changed, 90 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 655487a6550f..0392ba58dd65 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -169,7 +169,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
-xe-$(CONFIG_UEFI_CPER) += xe_cper.o
+xe-$(CONFIG_UEFI_CPER) += xe_cper.o \
+ xe_trace_cper.o
# graphics virtualization (SR-IOV) support
xe-y += \
diff --git a/drivers/gpu/drm/xe/xe_cper.c b/drivers/gpu/drm/xe/xe_cper.c
index af10a2b24fd5..60fbc71f5f3e 100644
--- a/drivers/gpu/drm/xe/xe_cper.c
+++ b/drivers/gpu/drm/xe/xe_cper.c
@@ -20,6 +20,7 @@
#include "xe_printk.h"
#include "xe_ras.h"
#include "xe_ras_types.h"
+#include "xe_trace_cper.h"
static bool is_sigid(u32 sigid)
{
@@ -192,7 +193,8 @@ static void cper_record_emit(struct xe_device *xe, u8 severity,
if (einfo && einfo_len)
memcpy((u8 *)rec + sizeof(*rec), einfo, einfo_len);
- /* TODO: Emit trace event */
+ trace_xe_error_cper(xe, &rhdr->platform_id, &sdesc->fru_id, severity,
+ &rec->intel_hdr, total_len, (u8 *)rec);
kfree(rec);
}
@@ -249,6 +251,17 @@ static void cper_emit_hw_err(struct xe_device *xe, int cper_sev, enum xe_sigid s
* @vaf: Formatted log message
*
* Emit a CPER record for a SIGID log entry
+ *
+ * Example trace output::
+ *
+ * xe_error_cper: dev=0000:03:00.0 severity=2
+ * platform_id=9046afe5-9041-5124-8614-92550d9e9da6
+ * fru_id=91befe38-2f61-3d7b-0000-000000000000
+ * intel_hdr_raw=
+ * 01 02 00 18 00 00 00 01 00 00 00 00 64 77 51 14 ...
+ * cper_len=1772
+ * cper_raw=
+ * 43 50 45 52 00 01 ff ff ff ff 01 00 02 00 00 00 ...
*/
void xe_cper_emit(struct xe_device *xe, int cper_sev, enum xe_sigid sigid,
u32 component, u32 location, const void *data, size_t len,
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.c b/drivers/gpu/drm/xe/xe_trace_cper.c
new file mode 100644
index 000000000000..caea8783ab7c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __CHECKER__
+#define CREATE_TRACE_POINTS
+#include "xe_trace_cper.h"
+#endif
diff --git a/drivers/gpu/drm/xe/xe_trace_cper.h b/drivers/gpu/drm/xe/xe_trace_cper.h
new file mode 100644
index 000000000000..af952a6e168c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_trace_cper.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM xe
+
+#if !defined(_XE_TRACE_CPER_H_) || defined(TRACE_HEADER_MULTI_READ)
+#define _XE_TRACE_CPER_H_
+
+#include <linux/tracepoint.h>
+#include <linux/types.h>
+
+#include "xe_cper_types.h"
+#include "xe_device_types.h"
+
+#define __dev_name_xe(xe) dev_name((xe)->drm.dev)
+
+TRACE_EVENT(xe_error_cper,
+ TP_PROTO(struct xe_device *xe,
+ const guid_t *platform_id, const guid_t *fru_id,
+ const u8 severity,
+ const struct xe_cper_intel_hdr *ihdr,
+ u32 cper_len, const u8 *cper),
+ TP_ARGS(xe, platform_id, fru_id, severity, ihdr, cper_len, cper),
+
+ TP_STRUCT__entry(
+ __string(dev, __dev_name_xe(xe))
+ __array(char, platform_id, UUID_SIZE)
+ __array(char, fru_id, UUID_SIZE)
+ __field(u8, sev)
+ __array(u8, ihdr_raw, sizeof(struct xe_cper_intel_hdr))
+ __field(u32, cper_len)
+ __dynamic_array(u8, cper, cper_len)
+ ),
+
+ TP_fast_assign(
+ __assign_str(dev);
+ __entry->sev = severity;
+ memcpy(__entry->platform_id, platform_id, UUID_SIZE);
+ memcpy(__entry->fru_id, fru_id, UUID_SIZE);
+ memcpy(__entry->ihdr_raw, ihdr, sizeof(struct xe_cper_intel_hdr));
+ __entry->cper_len = cper_len;
+ memcpy(__get_dynamic_array(cper), cper, cper_len);
+ ),
+
+ TP_printk("dev=%s severity=%d platform_id=%pUl fru_id=%pUl intel_hdr_raw=%s cper_len=%u cper_raw=%s",
+ __get_str(dev), __entry->sev,
+ __entry->platform_id, __entry->fru_id,
+ __print_hex(__entry->ihdr_raw,
+ sizeof(struct xe_cper_intel_hdr)),
+ __entry->cper_len,
+ __print_hex(__get_dynamic_array(cper),
+ __entry->cper_len))
+);
+
+#endif
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
+#define TRACE_INCLUDE_FILE xe_trace_cper
+#include <trace/define_trace.h>
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 07/10] drm/xe/xe_ras: Report device memory errors using SIGID
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (5 preceding siblings ...)
2026-10-29 8:27 ` [PATCH v7 06/10] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
@ 2026-10-29 8:28 ` Badal Nilawar
2026-10-29 8:28 ` [PATCH v7 08/10] drm/xe/xe_ras: Report core compute " Badal Nilawar
` (6 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:28 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Use xe_log_comp_info helper to report device memory errors using the
corresponding SIGID.
Example:
xe 0000:03:00.0: [drm] SIGID=202 (020100020008002000300000)
DEVICE_MEMORY: Double-bit ECC error at sw address 0x63000
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/xe_ras.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 8bdb9c626ddd..03826e9900df 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -644,6 +644,7 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_array *arr)
{
struct xe_ras_memory_error *info = (void *)arr->details;
+ u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
int ret;
/*
@@ -655,17 +656,25 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
*/
switch (info->category) {
case XE_RAS_MEMORY_POISON:
- xe_info(xe, "[RAS]: Poison error detected\n");
+ xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+ "Poison error detected\n");
break;
case XE_RAS_MEMORY_DATA_PARITY:
- xe_info(xe, "[RAS]: Data parity error detected\n");
+ xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+ "Data parity error detected\n");
break;
case XE_RAS_MEMORY_DB_ECC:
ret = handle_page_offline(xe, info->sw_address, true);
+ xe_log_comp(xe, ret ? cper_sev : CPER_SEV_INFORMATIONAL,
+ DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+ "Double-bit ECC error detected at sw address 0x%llx\n",
+ info->sw_address);
if (ret)
return XE_RAS_RECOVERY_ACTION_RESET;
break;
default:
+ xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+ "Unknown error detected\n");
return XE_RAS_RECOVERY_ACTION_RESET;
}
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 08/10] drm/xe/xe_ras: Report core compute errors using SIGID
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (6 preceding siblings ...)
2026-10-29 8:28 ` [PATCH v7 07/10] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
@ 2026-10-29 8:28 ` Badal Nilawar
2026-10-29 8:28 ` [PATCH v7 09/10] drm/xe/xe_ras: Report soc internal " Badal Nilawar
` (5 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:28 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Use xe_log_* helpers to report core compute errors.
Example:
xe 0000:03:00.0: [drm] *ERROR* SIGID=203 (02020012000a000200000800)
[Hardware Error]: CORE_COMPUTE: Uncorrectable error detected, type 2
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/xe_ras.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 03826e9900df..685b491e6b27 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -578,13 +578,17 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component
xe_drm_ras_event(xe, drm_component, drm_severity, value);
}
-static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)
+static u8 handle_core_compute_errors(struct xe_device *xe, struct xe_ras_error_array *arr)
{
struct xe_ras_compute_error *error_info = (void *)arr->details;
+ u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
u8 uncorr_type;
uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->log_header);
+ xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, sizeof(arr->counter),
+ "Uncorrectable error detected, type %u\n", uncorr_type);
+
/* Request a reset if error is global */
if (uncorr_type == GLOBAL_UNCORR_ERROR)
return XE_RAS_RECOVERY_ACTION_RESET;
@@ -861,7 +865,7 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
switch (component) {
case XE_RAS_COMP_CORE_COMPUTE:
- action = handle_core_compute_errors(arr);
+ action = handle_core_compute_errors(xe, arr);
break;
case XE_RAS_COMP_SOC_INTERNAL:
action = handle_soc_internal_errors(xe, arr);
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 09/10] drm/xe/xe_ras: Report soc internal errors using SIGID
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (7 preceding siblings ...)
2026-10-29 8:28 ` [PATCH v7 08/10] drm/xe/xe_ras: Report core compute " Badal Nilawar
@ 2026-10-29 8:28 ` Badal Nilawar
2026-10-29 8:28 ` [PATCH v7 10/10] drm/xe/xe_ras: Report correctable " Badal Nilawar
` (4 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:28 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Use xe_log_* helpers to report soc internal errors.
Example:
xe 0000:03:00.0: [drm] *ERROR* SIGID=205 FATAL
(020600700000000000000000) [Hardware Error]: SOC_INTERNAL:
PUNIT error detected: 0x00000002
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/xe_ras.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 685b491e6b27..58d3834345bc 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -609,7 +609,7 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
{
struct xe_ras_soc_error *info = (void *)arr->details;
struct xe_ras_soc_error_source *source = &info->source;
- struct xe_ras_error_class *counter = &arr->counter;
+ u32 raw_source;
if (source->csc) {
struct xe_ras_csc_error *csc_error = (void *)info->details;
@@ -623,9 +623,8 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
* is required.
*/
if (csc_error->hec_fw_error) {
- xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
- sev_to_str(counter->common.severity),
- csc_error->hec_fw_error);
+ xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+ "CSC error detected: 0x%08x\n", csc_error->hec_fw_error);
xe_survivability_mode_runtime_enable(xe);
return XE_RAS_RECOVERY_ACTION_DISCONNECT;
}
@@ -633,15 +632,19 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
struct xe_ras_ieh_error *ieh_error = (void *)info->details;
if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
- xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
- sev_to_str(counter->common.severity),
- ieh_error->global_error_status);
+ xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
+ "PUNIT error detected: 0x%08x\n",
+ ieh_error->global_error_status);
punit_error_handler(xe);
return XE_RAS_RECOVERY_ACTION_DISCONNECT;
}
}
/* For other SoC internal errors, request a reset as recovery mechanism */
+ memcpy(&raw_source, source, sizeof(raw_source));
+ xe_log_comp(xe, ras_sev_to_cper_sev(arr->counter.common.severity), SOC_INTERNAL,
+ &arr->counter, sizeof(arr->counter),
+ "Unknown error detected (source=0x%08x)\n", raw_source);
return XE_RAS_RECOVERY_ACTION_RESET;
}
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 10/10] drm/xe/xe_ras: Report correctable errors using SIGID
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (8 preceding siblings ...)
2026-10-29 8:28 ` [PATCH v7 09/10] drm/xe/xe_ras: Report soc internal " Badal Nilawar
@ 2026-10-29 8:28 ` Badal Nilawar
2026-10-29 8:42 ` sashiko-bot
2026-10-29 8:40 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev7) Patchwork
` (3 subsequent siblings)
13 siblings, 1 reply; 17+ messages in thread
From: Badal Nilawar @ 2026-10-29 8:28 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio, raag.jadav,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
Use xe_log_* helper to report correctable errors.
Example:
xe 0000:03:00.0: [drm] *ERROR* SIGID=203 CORRECTED
(010200180000000100000000) [Hardware Error]: CORE_COMPUTE: error detected
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Cc: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/xe/xe_ras.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 58d3834345bc..09b3c96042d5 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,6 +3,8 @@
* Copyright © 2026 Intel Corporation
*/
+#include <linux/bitfield.h>
+
#include "xe_assert.h"
#include "xe_bo.h"
#include "xe_configfs.h"
@@ -226,6 +228,12 @@ static int ras_status_to_errno(u32 status)
}
}
+static u16 ras_comp_to_log_comp(u8 component)
+{
+ return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
+ FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
+}
+
static inline const char *sev_to_str(u8 severity)
{
if (severity >= XE_RAS_SEV_MAX)
@@ -714,8 +722,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
if (!ras_counter_is_valid(xe, &errors[id]))
continue;
- xe_warn(xe, "[RAS]: %s %s detected\n",
- comp_to_str(component), sev_to_str(severity));
+ xe_log_from(xe, ras_sev_to_cper_sev(severity),
+ ras_comp_to_hw_sigid(component),
+ ras_comp_to_log_comp(component),
+ &errors[id], sizeof(errors[id]),
+ "error detected\n");
/* Send event once per component */
if (sent & BIT(component))
--
2.56.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v7 10/10] drm/xe/xe_ras: Report correctable errors using SIGID
2026-10-29 8:28 ` [PATCH v7 10/10] drm/xe/xe_ras: Report correctable " Badal Nilawar
@ 2026-10-29 8:42 ` sashiko-bot
2026-10-29 9:48 ` Nilawar, Badal
0 siblings, 1 reply; 17+ messages in thread
From: sashiko-bot @ 2026-10-29 8:42 UTC (permalink / raw)
To: Badal Nilawar, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/xe/ras: unrecognized log component for XE_RAS_COMP_RESERVED in ras_comp_to_log_comp()
--
commit 523a0553a8f4f634b0b558643739a2f201d23a02
Author: Badal Nilawar <badal.nilawar@intel.com>
drm/xe/xe_ras: Report correctable errors using SIGID
This commit replaces xe_warn() in xe_ras_counter_threshold_crossed() with
xe_log_from() to report RAS counter threshold crossings using hardware
SIGIDs and log components.
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 58d3834345bc1..09b3c96042d5b 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
[ ... ]
> @@ -226,6 +228,12 @@ static int ras_status_to_errno(u32 status)
> }
> }
>
> +static u16 ras_comp_to_log_comp(u8 component)
> +{
> + return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
> + FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
> +}
> +
> static inline const char *sev_to_str(u8 severity)
> {
> if (severity >= XE_RAS_SEV_MAX)
> @@ -714,8 +722,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> if (!ras_counter_is_valid(xe, &errors[id]))
> continue;
>
> - xe_warn(xe, "[RAS]: %s %s detected\n",
> - comp_to_str(component), sev_to_str(severity));
> + xe_log_from(xe, ras_sev_to_cper_sev(severity),
> + ras_comp_to_hw_sigid(component),
> + ras_comp_to_log_comp(component),
> + &errors[id], sizeof(errors[id]),
> + "error detected\n");
[Severity: Medium]
What happens if the system controller reports a counter with component set
to XE_RAS_COMP_RESERVED (3)?
In drivers/gpu/drm/xe/xe_ras.c, ras_counter_is_valid() only checks the outer
bounds of component:
if (!in_range(component, XE_RAS_COMP_NOT_SUPPORTED + 1, XE_RAS_COMP_MAX - 1)) {
xe_err(xe, "sysctrl: unexpected component %u\n", component);
return false;
}
This allows XE_RAS_COMP_RESERVED (3) to pass validation. While
ras_comp_to_hw_sigid() uses a switch statement that falls back to
XE_SIGID_HW for unhandled values, ras_comp_to_log_comp() unconditionally
encodes component into XE_LOG_COMPONENT_TYPE_MASK under
XE_LOG_COMPONENT_CLASS_HARDWARE.
Because hardware component 3 is reserved and omitted from
DEFINE_XE_LOG_HARDWARE_COMPONENTS in drivers/gpu/drm/xe/abi/xe_log_abi.h:
#define DEFINE_XE_LOG_HARDWARE_COMPONENTS(define) \
define(HARDWARE, 1, DEVICE_MEMORY, DEVICE_MEMORY, "Device Memory") \
define(HARDWARE, 2, CORE_COMPUTE, CORE_COMPUTE, "Core Compute") \
/* HARDWARE, 3, RESERVED */ \
define(HARDWARE, 4, PCIE, PCIE, "PCIe Interface") \
define(HARDWARE, 5, FABRIC, FABRIC, "Fabric") \
define(HARDWARE, 6, SOC_INTERNAL, SOC_INTERNAL, "SoC Internal") \
passing that encoded value to xe_log_from() will miss all cases in
log_component_prefix() and hit log_unknown_component_prefix() in
drivers/gpu/drm/xe/xe_log.c:
WARN(IS_ENABLED(CONFIG_DRM_XE_DEBUG), "LOG: unrecognized component %u.%u\n", class, type);
Should ras_counter_is_valid() reject XE_RAS_COMP_RESERVED, or should
ras_comp_to_log_comp() handle unmapped components like
ras_comp_to_hw_sigid() does?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261029082752.1739281-12-badal.nilawar@intel.com?part=10
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v7 10/10] drm/xe/xe_ras: Report correctable errors using SIGID
2026-10-29 8:42 ` sashiko-bot
@ 2026-10-29 9:48 ` Nilawar, Badal
0 siblings, 0 replies; 17+ messages in thread
From: Nilawar, Badal @ 2026-10-29 9:48 UTC (permalink / raw)
To: sashiko-reviews, intel-xe
On 29-10-2026 14:12, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] drm/xe/ras: unrecognized log component for XE_RAS_COMP_RESERVED in ras_comp_to_log_comp()
> --
>
> commit 523a0553a8f4f634b0b558643739a2f201d23a02
> Author: Badal Nilawar <badal.nilawar@intel.com>
>
> drm/xe/xe_ras: Report correctable errors using SIGID
>
> This commit replaces xe_warn() in xe_ras_counter_threshold_crossed() with
> xe_log_from() to report RAS counter threshold crossings using hardware
> SIGIDs and log components.
>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 58d3834345bc1..09b3c96042d5b 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
> [ ... ]
>> @@ -226,6 +228,12 @@ static int ras_status_to_errno(u32 status)
>> }
>> }
>>
>> +static u16 ras_comp_to_log_comp(u8 component)
>> +{
>> + return FIELD_PREP(XE_LOG_COMPONENT_CLASS_MASK, XE_LOG_COMPONENT_CLASS_HARDWARE) |
>> + FIELD_PREP(XE_LOG_COMPONENT_TYPE_MASK, component);
>> +}
>> +
>> static inline const char *sev_to_str(u8 severity)
>> {
>> if (severity >= XE_RAS_SEV_MAX)
>> @@ -714,8 +722,11 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
>> if (!ras_counter_is_valid(xe, &errors[id]))
>> continue;
>>
>> - xe_warn(xe, "[RAS]: %s %s detected\n",
>> - comp_to_str(component), sev_to_str(severity));
>> + xe_log_from(xe, ras_sev_to_cper_sev(severity),
>> + ras_comp_to_hw_sigid(component),
>> + ras_comp_to_log_comp(component),
>> + &errors[id], sizeof(errors[id]),
>> + "error detected\n");
> [Severity: Medium]
> What happens if the system controller reports a counter with component set
> to XE_RAS_COMP_RESERVED (3)?
>
> In drivers/gpu/drm/xe/xe_ras.c, ras_counter_is_valid() only checks the outer
> bounds of component:
>
> if (!in_range(component, XE_RAS_COMP_NOT_SUPPORTED + 1, XE_RAS_COMP_MAX - 1)) {
> xe_err(xe, "sysctrl: unexpected component %u\n", component);
> return false;
> }
>
> This allows XE_RAS_COMP_RESERVED (3) to pass validation. While
> ras_comp_to_hw_sigid() uses a switch statement that falls back to
> XE_SIGID_HW for unhandled values, ras_comp_to_log_comp() unconditionally
> encodes component into XE_LOG_COMPONENT_TYPE_MASK under
> XE_LOG_COMPONENT_CLASS_HARDWARE.
>
> Because hardware component 3 is reserved and omitted from
> DEFINE_XE_LOG_HARDWARE_COMPONENTS in drivers/gpu/drm/xe/abi/xe_log_abi.h:
>
> #define DEFINE_XE_LOG_HARDWARE_COMPONENTS(define) \
> define(HARDWARE, 1, DEVICE_MEMORY, DEVICE_MEMORY, "Device Memory") \
> define(HARDWARE, 2, CORE_COMPUTE, CORE_COMPUTE, "Core Compute") \
> /* HARDWARE, 3, RESERVED */ \
> define(HARDWARE, 4, PCIE, PCIE, "PCIe Interface") \
> define(HARDWARE, 5, FABRIC, FABRIC, "Fabric") \
> define(HARDWARE, 6, SOC_INTERNAL, SOC_INTERNAL, "SoC Internal") \
>
> passing that encoded value to xe_log_from() will miss all cases in
> log_component_prefix() and hit log_unknown_component_prefix() in
> drivers/gpu/drm/xe/xe_log.c:
>
> WARN(IS_ENABLED(CONFIG_DRM_XE_DEBUG), "LOG: unrecognized component %u.%u\n", class, type);
>
> Should ras_counter_is_valid() reject XE_RAS_COMP_RESERVED, or should
> ras_comp_to_log_comp() handle unmapped components like
> ras_comp_to_hw_sigid() does?
XE_RAS_COMP_RESERVED is a reserved value and is not reported by the
firmware. Therefore, rejecting it explicitly in ras_counter_is_valid()
is not required.
Thanks,
Badal
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev7)
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (9 preceding siblings ...)
2026-10-29 8:28 ` [PATCH v7 10/10] drm/xe/xe_ras: Report correctable " Badal Nilawar
@ 2026-10-29 8:40 ` Patchwork
2026-10-29 8:42 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-10-29 8:40 UTC (permalink / raw)
To: Badal Nilawar; +Cc: intel-xe
== Series Details ==
Series: Add CPER logging support for CRI (rev7)
URL : https://patchwork.freedesktop.org/series/169692/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 5a5bbc7600b3c1b4c1b88bede197a365ce3f1322
Author: Badal Nilawar <badal.nilawar@intel.com>
Date: Thu Oct 29 13:58:03 2026 +0530
drm/xe/xe_ras: Report correctable errors using SIGID
Use xe_log_* helper to report correctable errors.
Example:
xe 0000:03:00.0: [drm] *ERROR* SIGID=203 CORRECTED
(010200180000000100000000) [Hardware Error]: CORE_COMPUTE: error detected
Assisted-by: LLM
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Cc: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
+ /mt/dim checkpatch adf57aa7454332ef1651f5735de1ab6a1cc6b201 drm-intel
fa9d5f9d7baf drm/xe/cper: Add CPER reporting entry point for xe_log
-:30: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#30:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 98 lines checked
472f7ee2a1ce drm/xe/cper: Retrieve the error counter record for CPER reporting
e4a1e6c3032b drm/xe/cper: Initialize Intel-specific CPER header
-:94: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#94:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 123 lines checked
b2121d181841 drm/xe/cper: Construct CPER record for hardware errors
9da399ebfe0e drm/xe/cper: Log CPER records for aggregate counter retrieval
-:14: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#14:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 283 lines checked
fdc88eb49917 drm/xe/cper: Emit cper record to trace buf
-:70: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#70:
new file mode 100644
-:117: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#117: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:28:
+ TP_STRUCT__entry(
-:127: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#127: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:38:
+ TP_fast_assign(
-:152: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#152: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
^
-:152: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#152: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
^
-:152: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#152: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
^
-:152: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#152: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
^
-:152: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#152: FILE: drivers/gpu/drm/xe/xe_trace_cper.h:63:
+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/xe
^
total: 0 errors, 1 warnings, 7 checks, 116 lines checked
a90e692adee4 drm/xe/xe_ras: Report device memory errors using SIGID
90af1bac5574 drm/xe/xe_ras: Report core compute errors using SIGID
439b5a6c5ae1 drm/xe/xe_ras: Report soc internal errors using SIGID
5a5bbc7600b3 drm/xe/xe_ras: Report correctable errors using SIGID
^ permalink raw reply [flat|nested] 17+ messages in thread* ✓ CI.KUnit: success for Add CPER logging support for CRI (rev7)
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (10 preceding siblings ...)
2026-10-29 8:40 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev7) Patchwork
@ 2026-10-29 8:42 ` Patchwork
2026-10-29 9:17 ` [PATCH v7 00/10] Add CPER logging support for CRI Raag Jadav
2026-10-29 9:26 ` ✓ Xe.CI.BAT: success for Add CPER logging support for CRI (rev7) Patchwork
13 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-10-29 8:42 UTC (permalink / raw)
To: Badal Nilawar; +Cc: intel-xe
== Series Details ==
Series: Add CPER logging support for CRI (rev7)
URL : https://patchwork.freedesktop.org/series/169692/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[08:40:08] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:40:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:40:33] Starting KUnit Kernel (1/1)...
[08:40:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:40:33] ================= gpu_buddy (14 subtests) ==================
[08:40:33] [PASSED] gpu_test_buddy_alloc_limit
[08:40:33] [PASSED] gpu_test_buddy_alloc_optimistic
[08:40:33] [PASSED] gpu_test_buddy_alloc_pessimistic
[08:40:33] [PASSED] gpu_test_buddy_alloc_pathological
[08:40:33] [PASSED] gpu_test_buddy_alloc_contiguous
[08:40:33] [PASSED] gpu_test_buddy_alloc_clear
[08:40:33] [PASSED] gpu_test_buddy_alloc_range
[08:40:34] [PASSED] gpu_test_buddy_alloc_range_bias
[08:40:34] [PASSED] gpu_test_buddy_fragmentation_performance
[08:40:35] [PASSED] gpu_test_buddy_dirty_tracker_performance
[08:40:35] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[08:40:35] [PASSED] gpu_test_buddy_offset_aligned_allocation
[08:40:35] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[08:40:35] [PASSED] gpu_test_buddy_addr_to_block
[08:40:35] ==================== [PASSED] gpu_buddy ====================
[08:40:35] ============================================================
[08:40:35] Testing complete. Ran 14 tests: passed: 14
[08:40:35] Elapsed time: 26.794s total, 4.475s configuring, 20.452s building, 1.829s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:40:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:40:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:41:16] Starting KUnit Kernel (1/1)...
[08:41:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:41:16] ================== guc_buf (11 subtests) ===================
[08:41:16] [PASSED] test_smallest
[08:41:16] [PASSED] test_largest
[08:41:16] [PASSED] test_granular
[08:41:16] [PASSED] test_unique
[08:41:16] [PASSED] test_overlap
[08:41:16] [PASSED] test_reusable
[08:41:16] [PASSED] test_too_big
[08:41:16] [PASSED] test_flush
[08:41:16] [PASSED] test_lookup
[08:41:16] [PASSED] test_data
[08:41:16] [PASSED] test_class
[08:41:16] ===================== [PASSED] guc_buf =====================
[08:41:16] =================== guc_dbm (7 subtests) ===================
[08:41:16] [PASSED] test_empty
[08:41:16] [PASSED] test_default
[08:41:16] ======================== test_size ========================
[08:41:16] [PASSED] 4
[08:41:16] [PASSED] 8
[08:41:16] [PASSED] 32
[08:41:16] [PASSED] 256
[08:41:16] ==================== [PASSED] test_size ====================
[08:41:16] ======================= test_reuse ========================
[08:41:16] [PASSED] 4
[08:41:16] [PASSED] 8
[08:41:16] [PASSED] 32
[08:41:16] [PASSED] 256
[08:41:16] =================== [PASSED] test_reuse ====================
[08:41:16] =================== test_range_overlap ====================
[08:41:16] [PASSED] 4
[08:41:16] [PASSED] 8
[08:41:16] [PASSED] 32
[08:41:16] [PASSED] 256
[08:41:16] =============== [PASSED] test_range_overlap ================
[08:41:16] =================== test_range_compact ====================
[08:41:16] [PASSED] 4
[08:41:16] [PASSED] 8
[08:41:16] [PASSED] 32
[08:41:16] [PASSED] 256
[08:41:16] =============== [PASSED] test_range_compact ================
[08:41:16] ==================== test_range_spare =====================
[08:41:16] [PASSED] 4
[08:41:16] [PASSED] 8
[08:41:16] [PASSED] 32
[08:41:16] [PASSED] 256
[08:41:16] ================ [PASSED] test_range_spare =================
[08:41:16] ===================== [PASSED] guc_dbm =====================
[08:41:16] ================== guc_idm (22 subtests) ===================
[08:41:16] [PASSED] bad_init
[08:41:16] [PASSED] no_init
[08:41:16] [PASSED] init_fini
[08:41:16] [PASSED] check_init_small
[08:41:16] [PASSED] check_init_shared
[08:41:16] [PASSED] check_used
[08:41:16] [PASSED] check_quota
[08:41:16] [PASSED] check_all
[08:41:16] [PASSED] check_limits
[08:41:16] [PASSED] check_overlap
[08:41:16] [PASSED] check_overlap_alloc
[08:41:16] [PASSED] check_overlap_release
[08:41:16] [PASSED] check_overlap_partial_init
[08:41:16] [PASSED] check_overlap_partial_shared_range_blocking
[08:41:16] [PASSED] check_used_usable
[08:41:16] [PASSED] check_used_shareable
[08:41:16] [PASSED] check_used_mixed
[08:41:16] [PASSED] check_release_usable_range
[08:41:16] [PASSED] check_release_shareable_range
[08:41:16] [PASSED] check_split_boundaries
[08:41:16] [PASSED] check_shareable_spare
[08:41:16] [PASSED] check_shareable_spare_fragmented_tail
[08:41:16] ===================== [PASSED] guc_idm =====================
[08:41:16] ============== guc_klv_helpers (13 subtests) ===============
[08:41:16] [PASSED] test_count
[08:41:16] [PASSED] test_encode_u32
[08:41:16] [PASSED] test_encode_u64
[08:41:16] [PASSED] test_encode_string
[08:41:16] [PASSED] test_encode_object_raw
[08:41:16] [PASSED] test_encode_object_klv
[08:41:16] [PASSED] test_encode_object_nested
[08:41:16] [PASSED] test_encode_object_basic
[08:41:16] ===================== test_decode_u16 =====================
[08:41:16] [PASSED] empty
[08:41:16] [PASSED] valid
[08:41:16] [PASSED] max
[08:41:16] [PASSED] big
[08:41:16] [PASSED] long
[08:41:16] ================= [PASSED] test_decode_u16 =================
[08:41:16] ===================== test_decode_u32 =====================
[08:41:16] [PASSED] empty
[08:41:16] [PASSED] valid
[08:41:16] [PASSED] max
[08:41:16] [PASSED] long
[08:41:16] ================= [PASSED] test_decode_u32 =================
[08:41:16] ===================== test_decode_u64 =====================
[08:41:16] [PASSED] empty
[08:41:16] [PASSED] short
[08:41:16] [PASSED] valid
[08:41:16] [PASSED] max
[08:41:16] [PASSED] long
[08:41:16] ================= [PASSED] test_decode_u64 =================
[08:41:16] ===================== test_decode_str =====================
[08:41:16] [PASSED] empty
[08:41:16] [PASSED] one
[08:41:16] [PASSED] one_trash
[08:41:16] [PASSED] two
[08:41:16] [PASSED] two_trash
[08:41:16] [PASSED] three
[08:41:16] [PASSED] dword
[08:41:16] [PASSED] four
[08:41:16] [PASSED] five
[08:41:16] [PASSED] six
[08:41:16] [PASSED] seven
[08:41:16] [PASSED] qword
[08:41:16] ================= [PASSED] test_decode_str =================
[08:41:16] [PASSED] test_print
[08:41:16] ================= [PASSED] guc_klv_helpers =================
[08:41:16] =================== xe_log (4 subtests) ====================
[08:41:16] [PASSED] demo_cper
[08:41:16] [PASSED] demo_dmesg
[08:41:16] ======================= test_dmesg ========================
[08:41:16] [PASSED] test_fatal
[08:41:16] [PASSED] test_fatal_tile
[08:41:16] [PASSED] test_fatal_gt
[08:41:16] [PASSED] test_fatal_comp
[08:41:16] [PASSED] test_fatal_comp_tile
[08:41:16] [PASSED] test_fatal_comp_gt
[08:41:16] [PASSED] test_fatal_all
[08:41:16] [PASSED] test_recoverable
[08:41:16] [PASSED] test_recoverable_tile
[08:41:16] [PASSED] test_recoverable_gt
[08:41:16] [PASSED] test_recoverable_comp
[08:41:16] [PASSED] test_recoverable_comp_tile
[08:41:16] [PASSED] test_recoverable_comp_gt
[08:41:16] [PASSED] test_recoverable_all
[08:41:16] [PASSED] test_info
[08:41:16] [PASSED] test_info_tile
[08:41:16] [PASSED] test_info_gt
[08:41:16] [PASSED] test_info_err
[08:41:16] [PASSED] test_info_comp
[08:41:16] [PASSED] test_info_comp_tile
[08:41:16] [PASSED] test_info_comp_gt
[08:41:16] [PASSED] test_info_all
[08:41:16] [PASSED] test_hw_fatal
[08:41:16] [PASSED] test_hw_recoverable
[08:41:16] [PASSED] test_hw_corrected
[08:41:16] [PASSED] test_hw_informational
[08:41:16] =================== [PASSED] test_dmesg ====================
[08:41:16] ====================== test_invalid =======================
[08:41:16] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[08:41:16] ================== [SKIPPED] test_invalid ==================
[08:41:16] ===================== [PASSED] xe_log ======================
[08:41:16] ================== no_relay (3 subtests) ===================
[08:41:16] [PASSED] xe_drops_guc2pf_if_not_ready
[08:41:16] [PASSED] xe_drops_guc2vf_if_not_ready
[08:41:16] [PASSED] xe_rejects_send_if_not_ready
[08:41:16] ==================== [PASSED] no_relay =====================
[08:41:16] ================== pf_relay (14 subtests) ==================
[08:41:16] [PASSED] pf_rejects_guc2pf_too_short
[08:41:16] [PASSED] pf_rejects_guc2pf_too_long
[08:41:16] [PASSED] pf_rejects_guc2pf_no_payload
[08:41:16] [PASSED] pf_fails_no_payload
[08:41:16] [PASSED] pf_fails_bad_origin
[08:41:16] [PASSED] pf_fails_bad_type
[08:41:16] [PASSED] pf_txn_reports_error
[08:41:16] [PASSED] pf_txn_sends_pf2guc
[08:41:16] [PASSED] pf_sends_pf2guc
[08:41:16] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:41:16] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:41:16] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:41:16] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:41:16] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[08:41:16] ==================== [PASSED] pf_relay =====================
[08:41:16] ================== vf_relay (3 subtests) ===================
[08:41:16] [PASSED] vf_rejects_guc2vf_too_short
[08:41:16] [PASSED] vf_rejects_guc2vf_too_long
[08:41:16] [PASSED] vf_rejects_guc2vf_no_payload
[08:41:16] ==================== [PASSED] vf_relay =====================
[08:41:16] ================ pf_gt_config (9 subtests) =================
[08:41:16] [PASSED] fair_contexts_1vf
[08:41:16] [PASSED] fair_doorbells_1vf
[08:41:16] [PASSED] fair_ggtt_1vf
[08:41:16] ====================== fair_vram_1vf ======================
[08:41:16] [PASSED] 3.50 GiB
[08:41:16] [PASSED] 11.5 GiB
[08:41:16] [PASSED] 15.5 GiB
[08:41:16] [PASSED] 31.5 GiB
[08:41:16] [PASSED] 63.5 GiB
[08:41:16] [PASSED] 1.91 GiB
[08:41:16] ================== [PASSED] fair_vram_1vf ==================
[08:41:16] ================ fair_vram_1vf_admin_only =================
[08:41:16] [PASSED] 3.50 GiB
[08:41:16] [PASSED] 11.5 GiB
[08:41:17] [PASSED] 15.5 GiB
[08:41:17] [PASSED] 31.5 GiB
[08:41:17] [PASSED] 63.5 GiB
[08:41:17] [PASSED] 1.91 GiB
[08:41:17] ============ [PASSED] fair_vram_1vf_admin_only =============
[08:41:17] ====================== fair_contexts ======================
[08:41:17] [PASSED] 1 VF
[08:41:17] [PASSED] 2 VFs
[08:41:17] [PASSED] 3 VFs
[08:41:17] [PASSED] 4 VFs
[08:41:17] [PASSED] 5 VFs
[08:41:17] [PASSED] 6 VFs
[08:41:17] [PASSED] 7 VFs
[08:41:17] [PASSED] 8 VFs
[08:41:17] [PASSED] 9 VFs
[08:41:17] [PASSED] 10 VFs
[08:41:17] [PASSED] 11 VFs
[08:41:17] [PASSED] 12 VFs
[08:41:17] [PASSED] 13 VFs
[08:41:17] [PASSED] 14 VFs
[08:41:17] [PASSED] 15 VFs
[08:41:17] [PASSED] 16 VFs
[08:41:17] [PASSED] 17 VFs
[08:41:17] [PASSED] 18 VFs
[08:41:17] [PASSED] 19 VFs
[08:41:17] [PASSED] 20 VFs
[08:41:17] [PASSED] 21 VFs
[08:41:17] [PASSED] 22 VFs
[08:41:17] [PASSED] 23 VFs
[08:41:17] [PASSED] 24 VFs
[08:41:17] [PASSED] 25 VFs
[08:41:17] [PASSED] 26 VFs
[08:41:17] [PASSED] 27 VFs
[08:41:17] [PASSED] 28 VFs
[08:41:17] [PASSED] 29 VFs
[08:41:17] [PASSED] 30 VFs
[08:41:17] [PASSED] 31 VFs
[08:41:17] [PASSED] 32 VFs
[08:41:17] [PASSED] 33 VFs
[08:41:17] [PASSED] 34 VFs
[08:41:17] [PASSED] 35 VFs
[08:41:17] [PASSED] 36 VFs
[08:41:17] [PASSED] 37 VFs
[08:41:17] [PASSED] 38 VFs
[08:41:17] [PASSED] 39 VFs
[08:41:17] [PASSED] 40 VFs
[08:41:17] [PASSED] 41 VFs
[08:41:17] [PASSED] 42 VFs
[08:41:17] [PASSED] 43 VFs
[08:41:17] [PASSED] 44 VFs
[08:41:17] [PASSED] 45 VFs
[08:41:17] [PASSED] 46 VFs
[08:41:17] [PASSED] 47 VFs
[08:41:17] [PASSED] 48 VFs
[08:41:17] [PASSED] 49 VFs
[08:41:17] [PASSED] 50 VFs
[08:41:17] [PASSED] 51 VFs
[08:41:17] [PASSED] 52 VFs
[08:41:17] [PASSED] 53 VFs
[08:41:17] [PASSED] 54 VFs
[08:41:17] [PASSED] 55 VFs
[08:41:17] [PASSED] 56 VFs
[08:41:17] [PASSED] 57 VFs
[08:41:17] [PASSED] 58 VFs
[08:41:17] [PASSED] 59 VFs
[08:41:17] [PASSED] 60 VFs
[08:41:17] [PASSED] 61 VFs
[08:41:17] [PASSED] 62 VFs
[08:41:17] [PASSED] 63 VFs
[08:41:17] ================== [PASSED] fair_contexts ==================
[08:41:17] ===================== fair_doorbells ======================
[08:41:17] [PASSED] 1 VF
[08:41:17] [PASSED] 2 VFs
[08:41:17] [PASSED] 3 VFs
[08:41:17] [PASSED] 4 VFs
[08:41:17] [PASSED] 5 VFs
[08:41:17] [PASSED] 6 VFs
[08:41:17] [PASSED] 7 VFs
[08:41:17] [PASSED] 8 VFs
[08:41:17] [PASSED] 9 VFs
[08:41:17] [PASSED] 10 VFs
[08:41:17] [PASSED] 11 VFs
[08:41:17] [PASSED] 12 VFs
[08:41:17] [PASSED] 13 VFs
[08:41:17] [PASSED] 14 VFs
[08:41:17] [PASSED] 15 VFs
[08:41:17] [PASSED] 16 VFs
[08:41:17] [PASSED] 17 VFs
[08:41:17] [PASSED] 18 VFs
[08:41:17] [PASSED] 19 VFs
[08:41:17] [PASSED] 20 VFs
[08:41:17] [PASSED] 21 VFs
[08:41:17] [PASSED] 22 VFs
[08:41:17] [PASSED] 23 VFs
[08:41:17] [PASSED] 24 VFs
[08:41:17] [PASSED] 25 VFs
[08:41:17] [PASSED] 26 VFs
[08:41:17] [PASSED] 27 VFs
[08:41:17] [PASSED] 28 VFs
[08:41:17] [PASSED] 29 VFs
[08:41:17] [PASSED] 30 VFs
[08:41:17] [PASSED] 31 VFs
[08:41:17] [PASSED] 32 VFs
[08:41:17] [PASSED] 33 VFs
[08:41:17] [PASSED] 34 VFs
[08:41:17] [PASSED] 35 VFs
[08:41:17] [PASSED] 36 VFs
[08:41:17] [PASSED] 37 VFs
[08:41:17] [PASSED] 38 VFs
[08:41:17] [PASSED] 39 VFs
[08:41:17] [PASSED] 40 VFs
[08:41:17] [PASSED] 41 VFs
[08:41:17] [PASSED] 42 VFs
[08:41:17] [PASSED] 43 VFs
[08:41:17] [PASSED] 44 VFs
[08:41:17] [PASSED] 45 VFs
[08:41:17] [PASSED] 46 VFs
[08:41:17] [PASSED] 47 VFs
[08:41:17] [PASSED] 48 VFs
[08:41:17] [PASSED] 49 VFs
[08:41:17] [PASSED] 50 VFs
[08:41:17] [PASSED] 51 VFs
[08:41:17] [PASSED] 52 VFs
[08:41:17] [PASSED] 53 VFs
[08:41:17] [PASSED] 54 VFs
[08:41:17] [PASSED] 55 VFs
[08:41:17] [PASSED] 56 VFs
[08:41:17] [PASSED] 57 VFs
[08:41:17] [PASSED] 58 VFs
[08:41:17] [PASSED] 59 VFs
[08:41:17] [PASSED] 60 VFs
[08:41:17] [PASSED] 61 VFs
[08:41:17] [PASSED] 62 VFs
[08:41:17] [PASSED] 63 VFs
[08:41:17] ================= [PASSED] fair_doorbells ==================
[08:41:17] ======================== fair_ggtt ========================
[08:41:17] [PASSED] 1 VF
[08:41:17] [PASSED] 2 VFs
[08:41:17] [PASSED] 3 VFs
[08:41:17] [PASSED] 4 VFs
[08:41:17] [PASSED] 5 VFs
[08:41:17] [PASSED] 6 VFs
[08:41:17] [PASSED] 7 VFs
[08:41:17] [PASSED] 8 VFs
[08:41:17] [PASSED] 9 VFs
[08:41:17] [PASSED] 10 VFs
[08:41:17] [PASSED] 11 VFs
[08:41:17] [PASSED] 12 VFs
[08:41:17] [PASSED] 13 VFs
[08:41:17] [PASSED] 14 VFs
[08:41:17] [PASSED] 15 VFs
[08:41:17] [PASSED] 16 VFs
[08:41:17] [PASSED] 17 VFs
[08:41:17] [PASSED] 18 VFs
[08:41:17] [PASSED] 19 VFs
[08:41:17] [PASSED] 20 VFs
[08:41:17] [PASSED] 21 VFs
[08:41:17] [PASSED] 22 VFs
[08:41:17] [PASSED] 23 VFs
[08:41:17] [PASSED] 24 VFs
[08:41:17] [PASSED] 25 VFs
[08:41:17] [PASSED] 26 VFs
[08:41:17] [PASSED] 27 VFs
[08:41:17] [PASSED] 28 VFs
[08:41:17] [PASSED] 29 VFs
[08:41:17] [PASSED] 30 VFs
[08:41:17] [PASSED] 31 VFs
[08:41:17] [PASSED] 32 VFs
[08:41:17] [PASSED] 33 VFs
[08:41:17] [PASSED] 34 VFs
[08:41:17] [PASSED] 35 VFs
[08:41:17] [PASSED] 36 VFs
[08:41:17] [PASSED] 37 VFs
[08:41:17] [PASSED] 38 VFs
[08:41:17] [PASSED] 39 VFs
[08:41:17] [PASSED] 40 VFs
[08:41:17] [PASSED] 41 VFs
[08:41:17] [PASSED] 42 VFs
[08:41:17] [PASSED] 43 VFs
[08:41:17] [PASSED] 44 VFs
[08:41:17] [PASSED] 45 VFs
[08:41:17] [PASSED] 46 VFs
[08:41:17] [PASSED] 47 VFs
[08:41:17] [PASSED] 48 VFs
[08:41:17] [PASSED] 49 VFs
[08:41:17] [PASSED] 50 VFs
[08:41:17] [PASSED] 51 VFs
[08:41:17] [PASSED] 52 VFs
[08:41:17] [PASSED] 53 VFs
[08:41:17] [PASSED] 54 VFs
[08:41:17] [PASSED] 55 VFs
[08:41:17] [PASSED] 56 VFs
[08:41:17] [PASSED] 57 VFs
[08:41:17] [PASSED] 58 VFs
[08:41:17] [PASSED] 59 VFs
[08:41:17] [PASSED] 60 VFs
[08:41:17] [PASSED] 61 VFs
[08:41:17] [PASSED] 62 VFs
[08:41:17] [PASSED] 63 VFs
[08:41:17] ==================== [PASSED] fair_ggtt ====================
[08:41:17] ======================== fair_vram ========================
[08:41:17] [PASSED] 1 VF
[08:41:17] [PASSED] 2 VFs
[08:41:17] [PASSED] 3 VFs
[08:41:17] [PASSED] 4 VFs
[08:41:17] [PASSED] 5 VFs
[08:41:17] [PASSED] 6 VFs
[08:41:17] [PASSED] 7 VFs
[08:41:17] [PASSED] 8 VFs
[08:41:17] [PASSED] 9 VFs
[08:41:17] [PASSED] 10 VFs
[08:41:17] [PASSED] 11 VFs
[08:41:17] [PASSED] 12 VFs
[08:41:17] [PASSED] 13 VFs
[08:41:17] [PASSED] 14 VFs
[08:41:17] [PASSED] 15 VFs
[08:41:17] [PASSED] 16 VFs
[08:41:17] [PASSED] 17 VFs
[08:41:17] [PASSED] 18 VFs
[08:41:17] [PASSED] 19 VFs
[08:41:17] [PASSED] 20 VFs
[08:41:17] [PASSED] 21 VFs
[08:41:17] [PASSED] 22 VFs
[08:41:17] [PASSED] 23 VFs
[08:41:17] [PASSED] 24 VFs
[08:41:17] [PASSED] 25 VFs
[08:41:17] [PASSED] 26 VFs
[08:41:17] [PASSED] 27 VFs
[08:41:17] [PASSED] 28 VFs
[08:41:17] [PASSED] 29 VFs
[08:41:17] [PASSED] 30 VFs
[08:41:17] [PASSED] 31 VFs
[08:41:17] [PASSED] 32 VFs
[08:41:17] [PASSED] 33 VFs
[08:41:17] [PASSED] 34 VFs
[08:41:17] [PASSED] 35 VFs
[08:41:17] [PASSED] 36 VFs
[08:41:17] [PASSED] 37 VFs
[08:41:17] [PASSED] 38 VFs
[08:41:17] [PASSED] 39 VFs
[08:41:17] [PASSED] 40 VFs
[08:41:17] [PASSED] 41 VFs
[08:41:17] [PASSED] 42 VFs
[08:41:17] [PASSED] 43 VFs
[08:41:17] [PASSED] 44 VFs
[08:41:17] [PASSED] 45 VFs
[08:41:17] [PASSED] 46 VFs
[08:41:17] [PASSED] 47 VFs
[08:41:17] [PASSED] 48 VFs
[08:41:17] [PASSED] 49 VFs
[08:41:17] [PASSED] 50 VFs
[08:41:17] [PASSED] 51 VFs
[08:41:17] [PASSED] 52 VFs
[08:41:17] [PASSED] 53 VFs
[08:41:17] [PASSED] 54 VFs
[08:41:17] [PASSED] 55 VFs
[08:41:17] [PASSED] 56 VFs
[08:41:17] [PASSED] 57 VFs
[08:41:17] [PASSED] 58 VFs
[08:41:17] [PASSED] 59 VFs
[08:41:17] [PASSED] 60 VFs
[08:41:17] [PASSED] 61 VFs
[08:41:17] [PASSED] 62 VFs
[08:41:17] [PASSED] 63 VFs
[08:41:17] ==================== [PASSED] fair_vram ====================
[08:41:17] ================== [PASSED] pf_gt_config ===================
[08:41:17] ===================== lmtt (1 subtest) =====================
[08:41:17] ======================== test_ops =========================
[08:41:17] [PASSED] 2-level
[08:41:17] [PASSED] multi-level
[08:41:17] ==================== [PASSED] test_ops =====================
[08:41:17] ====================== [PASSED] lmtt =======================
[08:41:17] ================= sriov_packet (1 subtest) =================
[08:41:17] [PASSED] test_descriptor_init
[08:41:17] ================== [PASSED] sriov_packet ===================
[08:41:17] ================= pf_service (11 subtests) =================
[08:41:17] [PASSED] pf_negotiate_any
[08:41:17] [PASSED] pf_negotiate_base_match
[08:41:17] [PASSED] pf_negotiate_base_newer
[08:41:17] [PASSED] pf_negotiate_base_next
[08:41:17] [SKIPPED] pf_negotiate_base_older (no older minor)
[08:41:17] [PASSED] pf_negotiate_base_prev
[08:41:17] [PASSED] pf_negotiate_latest_match
[08:41:17] [PASSED] pf_negotiate_latest_newer
[08:41:17] [PASSED] pf_negotiate_latest_next
[08:41:17] [SKIPPED] pf_negotiate_latest_older (no older minor)
[08:41:17] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[08:41:17] =================== [PASSED] pf_service ====================
[08:41:17] ================= xe_guc_g2g (2 subtests) ==================
[08:41:17] ============== xe_live_guc_g2g_kunit_default ==============
[08:41:17] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:41:17] ============== xe_live_guc_g2g_kunit_allmem ===============
[08:41:17] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:41:17] =================== [SKIPPED] xe_guc_g2g ===================
[08:41:17] =================== xe_mocs (2 subtests) ===================
[08:41:17] ================ xe_live_mocs_kernel_kunit ================
[08:41:17] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:41:17] ================ xe_live_mocs_reset_kunit =================
[08:41:17] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:41:17] ==================== [SKIPPED] xe_mocs =====================
[08:41:17] ================= xe_migrate (3 subtests) ==================
[08:41:17] ================= xe_migrate_sanity_kunit =================
[08:41:17] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:41:17] ================== xe_validate_ccs_kunit ==================
[08:41:17] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:41:17] ============= xe_migrate_access_memory_kunit ==============
[08:41:17] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[08:41:17] =================== [SKIPPED] xe_migrate ===================
[08:41:17] ================== xe_dma_buf (1 subtest) ==================
[08:41:17] ==================== xe_dma_buf_kunit =====================
[08:41:17] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:41:17] =================== [SKIPPED] xe_dma_buf ===================
[08:41:17] ================= xe_bo_shrink (1 subtest) =================
[08:41:17] =================== xe_bo_shrink_kunit ====================
[08:41:17] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:41:17] ================== [SKIPPED] xe_bo_shrink ==================
[08:41:17] ==================== xe_bo (2 subtests) ====================
[08:41:17] ================== xe_ccs_migrate_kunit ===================
[08:41:17] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:41:17] ==================== xe_bo_evict_kunit ====================
[08:41:17] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:41:17] ===================== [SKIPPED] xe_bo ======================
[08:41:17] =================== xe_any (9 subtests) ====================
[08:41:17] [PASSED] test_to_xe
[08:41:17] [PASSED] test_to_dev
[08:41:17] [PASSED] test_to_pdev
[08:41:17] [PASSED] test_to_drm
[08:41:17] [PASSED] test_if_pdev
[08:41:17] [PASSED] test_if_xe
[08:41:17] [PASSED] test_if_tile
[08:41:17] [PASSED] test_if_gt
[08:41:17] [PASSED] test_to_id
[08:41:17] ===================== [PASSED] xe_any ======================
[08:41:17] ==================== args (13 subtests) ====================
[08:41:17] [PASSED] count_args_test
[08:41:17] [PASSED] call_args_example
[08:41:17] [PASSED] call_args_test
[08:41:17] [PASSED] drop_first_arg_example
[08:41:17] [PASSED] drop_first_arg_test
[08:41:17] [PASSED] first_arg_example
[08:41:17] [PASSED] first_arg_test
[08:41:17] [PASSED] last_arg_example
[08:41:17] [PASSED] last_arg_test
[08:41:17] [PASSED] pick_arg_example
[08:41:17] [PASSED] if_args_example
[08:41:17] [PASSED] if_args_test
[08:41:17] [PASSED] sep_comma_example
[08:41:17] ====================== [PASSED] args =======================
[08:41:17] =================== xe_pci (3 subtests) ====================
[08:41:17] ==================== check_graphics_ip ====================
[08:41:17] [PASSED] 12.00 Xe_LP
[08:41:17] [PASSED] 12.10 Xe_LP+
[08:41:17] [PASSED] 12.55 Xe_HPG
[08:41:17] [PASSED] 12.60 Xe_HPC
[08:41:17] [PASSED] 12.70 Xe_LPG
[08:41:17] [PASSED] 12.71 Xe_LPG
[08:41:17] [PASSED] 12.74 Xe_LPG+
[08:41:17] [PASSED] 20.01 Xe2_HPG
[08:41:17] [PASSED] 20.02 Xe2_HPG
[08:41:17] [PASSED] 20.04 Xe2_LPG
[08:41:17] [PASSED] 30.00 Xe3_LPG
[08:41:17] [PASSED] 30.01 Xe3_LPG
[08:41:17] [PASSED] 30.03 Xe3_LPG
[08:41:17] [PASSED] 30.04 Xe3_LPG
[08:41:17] [PASSED] 30.05 Xe3_LPG
[08:41:17] [PASSED] 35.10 Xe3p_LPG
[08:41:17] [PASSED] 35.11 Xe3p_XPC
[08:41:17] ================ [PASSED] check_graphics_ip ================
[08:41:17] ===================== check_media_ip ======================
[08:41:17] [PASSED] 12.00 Xe_M
[08:41:17] [PASSED] 12.55 Xe_HPM
[08:41:17] [PASSED] 13.00 Xe_LPM+
[08:41:17] [PASSED] 13.01 Xe2_HPM
[08:41:17] [PASSED] 20.00 Xe2_LPM
[08:41:17] [PASSED] 30.00 Xe3_LPM
[08:41:17] [PASSED] 30.02 Xe3_LPM
[08:41:17] [PASSED] 35.00 Xe3p_LPM
[08:41:17] [PASSED] 35.03 Xe3p_HPM
[08:41:17] ================= [PASSED] check_media_ip ==================
[08:41:17] =================== check_platform_desc ===================
[08:41:17] [PASSED] 0x9A60 (TIGERLAKE)
[08:41:17] [PASSED] 0x9A68 (TIGERLAKE)
[08:41:17] [PASSED] 0x9A70 (TIGERLAKE)
[08:41:17] [PASSED] 0x9A40 (TIGERLAKE)
[08:41:17] [PASSED] 0x9A49 (TIGERLAKE)
[08:41:17] [PASSED] 0x9A59 (TIGERLAKE)
[08:41:17] [PASSED] 0x9A78 (TIGERLAKE)
[08:41:17] [PASSED] 0x9AC0 (TIGERLAKE)
[08:41:17] [PASSED] 0x9AC9 (TIGERLAKE)
[08:41:17] [PASSED] 0x9AD9 (TIGERLAKE)
[08:41:17] [PASSED] 0x9AF8 (TIGERLAKE)
[08:41:17] [PASSED] 0x4C80 (ROCKETLAKE)
[08:41:17] [PASSED] 0x4C8A (ROCKETLAKE)
[08:41:17] [PASSED] 0x4C8B (ROCKETLAKE)
[08:41:17] [PASSED] 0x4C8C (ROCKETLAKE)
[08:41:17] [PASSED] 0x4C90 (ROCKETLAKE)
[08:41:17] [PASSED] 0x4C9A (ROCKETLAKE)
[08:41:17] [PASSED] 0x4680 (ALDERLAKE_S)
[08:41:17] [PASSED] 0x4682 (ALDERLAKE_S)
[08:41:17] [PASSED] 0x4688 (ALDERLAKE_S)
[08:41:17] [PASSED] 0x468A (ALDERLAKE_S)
[08:41:17] [PASSED] 0x468B (ALDERLAKE_S)
[08:41:17] [PASSED] 0x4690 (ALDERLAKE_S)
[08:41:17] [PASSED] 0x4692 (ALDERLAKE_S)
[08:41:17] [PASSED] 0x4693 (ALDERLAKE_S)
[08:41:17] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46AA (ALDERLAKE_P)
[08:41:17] [PASSED] 0x462A (ALDERLAKE_P)
[08:41:17] [PASSED] 0x4626 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x4628 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:41:17] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:41:17] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:41:17] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:41:17] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:41:17] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:41:17] [PASSED] 0xA721 (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA720 (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:41:17] [PASSED] 0xA780 (ALDERLAKE_S)
[08:41:17] [PASSED] 0xA781 (ALDERLAKE_S)
[08:41:17] [PASSED] 0xA782 (ALDERLAKE_S)
[08:41:17] [PASSED] 0xA783 (ALDERLAKE_S)
[08:41:17] [PASSED] 0xA788 (ALDERLAKE_S)
[08:41:17] [PASSED] 0xA789 (ALDERLAKE_S)
[08:41:17] [PASSED] 0xA78A (ALDERLAKE_S)
[08:41:17] [PASSED] 0xA78B (ALDERLAKE_S)
[08:41:17] [PASSED] 0x4905 (DG1)
[08:41:17] [PASSED] 0x4906 (DG1)
[08:41:17] [PASSED] 0x4907 (DG1)
[08:41:17] [PASSED] 0x4908 (DG1)
[08:41:17] [PASSED] 0x4909 (DG1)
[08:41:17] [PASSED] 0x56C0 (DG2)
[08:41:17] [PASSED] 0x56C2 (DG2)
[08:41:17] [PASSED] 0x56C1 (DG2)
[08:41:17] [PASSED] 0x7D51 (METEORLAKE)
[08:41:17] [PASSED] 0x7DD1 (METEORLAKE)
[08:41:17] [PASSED] 0x7D41 (METEORLAKE)
[08:41:17] [PASSED] 0x7D67 (METEORLAKE)
[08:41:17] [PASSED] 0xB640 (METEORLAKE)
[08:41:17] [PASSED] 0x56A0 (DG2)
[08:41:17] [PASSED] 0x56A1 (DG2)
[08:41:17] [PASSED] 0x56A2 (DG2)
[08:41:17] [PASSED] 0x56BE (DG2)
[08:41:17] [PASSED] 0x56BF (DG2)
[08:41:17] [PASSED] 0x5690 (DG2)
[08:41:17] [PASSED] 0x5691 (DG2)
[08:41:17] [PASSED] 0x5692 (DG2)
[08:41:17] [PASSED] 0x56A5 (DG2)
[08:41:17] [PASSED] 0x56A6 (DG2)
[08:41:17] [PASSED] 0x56B0 (DG2)
[08:41:17] [PASSED] 0x56B1 (DG2)
[08:41:17] [PASSED] 0x56BA (DG2)
[08:41:17] [PASSED] 0x56BB (DG2)
[08:41:17] [PASSED] 0x56BC (DG2)
[08:41:17] [PASSED] 0x56BD (DG2)
[08:41:17] [PASSED] 0x5693 (DG2)
[08:41:17] [PASSED] 0x5694 (DG2)
[08:41:17] [PASSED] 0x5695 (DG2)
[08:41:17] [PASSED] 0x56A3 (DG2)
[08:41:17] [PASSED] 0x56A4 (DG2)
[08:41:17] [PASSED] 0x56B2 (DG2)
[08:41:17] [PASSED] 0x56B3 (DG2)
[08:41:17] [PASSED] 0x5696 (DG2)
[08:41:17] [PASSED] 0x5697 (DG2)
[08:41:17] [PASSED] 0xB69 (PVC)
[08:41:17] [PASSED] 0xB6E (PVC)
[08:41:17] [PASSED] 0xBD4 (PVC)
[08:41:17] [PASSED] 0xBD5 (PVC)
[08:41:17] [PASSED] 0xBD6 (PVC)
[08:41:17] [PASSED] 0xBD7 (PVC)
[08:41:17] [PASSED] 0xBD8 (PVC)
[08:41:17] [PASSED] 0xBD9 (PVC)
[08:41:17] [PASSED] 0xBDA (PVC)
[08:41:17] [PASSED] 0xBDB (PVC)
[08:41:17] [PASSED] 0xBE0 (PVC)
[08:41:17] [PASSED] 0xBE1 (PVC)
[08:41:17] [PASSED] 0xBE5 (PVC)
[08:41:17] [PASSED] 0x7D40 (METEORLAKE)
[08:41:17] [PASSED] 0x7D45 (METEORLAKE)
[08:41:17] [PASSED] 0x7D55 (METEORLAKE)
[08:41:17] [PASSED] 0x7D60 (METEORLAKE)
[08:41:17] [PASSED] 0x7DD5 (METEORLAKE)
[08:41:17] [PASSED] 0x6420 (LUNARLAKE)
[08:41:17] [PASSED] 0x64A0 (LUNARLAKE)
[08:41:17] [PASSED] 0x64B0 (LUNARLAKE)
[08:41:17] [PASSED] 0xE202 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE209 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE20B (BATTLEMAGE)
[08:41:17] [PASSED] 0xE20C (BATTLEMAGE)
[08:41:17] [PASSED] 0xE20D (BATTLEMAGE)
[08:41:17] [PASSED] 0xE210 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE211 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE212 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE216 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE220 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE221 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE222 (BATTLEMAGE)
[08:41:17] [PASSED] 0xE223 (BATTLEMAGE)
[08:41:17] [PASSED] 0xB080 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB081 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB082 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB083 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB084 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB085 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB086 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB087 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB08F (PANTHERLAKE)
[08:41:17] [PASSED] 0xB090 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB0A1 (PANTHERLAKE)
[08:41:17] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:41:17] [PASSED] 0xFD80 (PANTHERLAKE)
[08:41:17] [PASSED] 0xFD81 (PANTHERLAKE)
[08:41:17] [PASSED] 0xD740 (NOVALAKE_S)
[08:41:17] [PASSED] 0xD741 (NOVALAKE_S)
[08:41:17] [PASSED] 0xD742 (NOVALAKE_S)
[08:41:17] [PASSED] 0xD743 (NOVALAKE_S)
[08:41:17] [PASSED] 0xD745 (NOVALAKE_S)
[08:41:17] [PASSED] 0xD74A (NOVALAKE_S)
[08:41:17] [PASSED] 0xD74B (NOVALAKE_S)
[08:41:17] [PASSED] 0x674C (CRESCENTISLAND)
[08:41:17] [PASSED] 0x674D (CRESCENTISLAND)
[08:41:17] [PASSED] 0x674E (CRESCENTISLAND)
[08:41:17] [PASSED] 0x674F (CRESCENTISLAND)
[08:41:17] [PASSED] 0x6750 (CRESCENTISLAND)
[08:41:17] [PASSED] 0x6751 (CRESCENTISLAND)
[08:41:17] [PASSED] 0x6752 (CRESCENTISLAND)
[08:41:17] [PASSED] 0xD750 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD751 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD752 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD753 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD754 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD755 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD756 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD757 (NOVALAKE_P)
[08:41:17] [PASSED] 0xD75F (NOVALAKE_P)
[08:41:17] =============== [PASSED] check_platform_desc ===============
[08:41:17] ===================== [PASSED] xe_pci ======================
[08:41:17] ============= xe_rtp_tables_test (5 subtests) ==============
[08:41:17] ================== xe_rtp_table_gt_test ===================
[08:41:17] [PASSED] gt_was/14011060649
[08:41:17] [PASSED] gt_was/14011059788
[08:41:17] [PASSED] gt_was/14015795083
[08:41:17] [PASSED] gt_was/16021867713
[08:41:17] [PASSED] gt_was/14019449301
[08:41:17] [PASSED] gt_was/16028005424
[08:41:17] [PASSED] gt_was/14026578760
[08:41:17] [PASSED] gt_was/1409420604
[08:41:17] [PASSED] gt_was/1408615072
[08:41:17] [PASSED] gt_was/22010523718
[08:41:17] [PASSED] gt_was/14011006942
[08:41:17] [PASSED] gt_was/14014830051
[08:41:17] [PASSED] gt_was/18018781329
[08:41:17] [PASSED] gt_was/1509235366
[08:41:17] [PASSED] gt_was/18018781329
[08:41:17] [PASSED] gt_was/16016694945
[08:41:17] [PASSED] gt_was/14018575942
[08:41:17] [PASSED] gt_was/22016670082
[08:41:17] [PASSED] gt_was/22016670082
[08:41:17] [PASSED] gt_was/14017421178
[08:41:17] [PASSED] gt_was/16025250150
[08:41:17] [PASSED] gt_was/14021871409
[08:41:17] [PASSED] gt_was/16021865536
[08:41:17] [PASSED] gt_was/14021486841
[08:41:17] [PASSED] gt_was/14025160223
[08:41:17] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[08:41:17] [PASSED] gt_was/14025635424
[08:41:17] [PASSED] gt_was/16028005424
[08:41:17] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:41:17] ================== xe_rtp_table_gt_test ===================
[08:41:17] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[08:41:17] [PASSED] gt_tunings/Tuning: 32B Access Enable
[08:41:17] [PASSED] gt_tunings/Tuning: L3 cache
[08:41:17] [PASSED] gt_tunings/Tuning: L3 cache - media
[08:41:17] [PASSED] gt_tunings/Tuning: Compression Overfetch
[08:41:17] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[08:41:17] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[08:41:17] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[08:41:17] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[08:41:17] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[08:41:17] [PASSED] gt_tunings/Tuning: Stateless compression control
[08:41:17] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[08:41:17] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[08:41:17] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[08:41:17] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[08:41:17] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[08:41:17] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:41:17] ================== xe_rtp_table_oob_test ==================
[08:41:17] [PASSED] oob_was/1607983814
[08:41:17] [PASSED] oob_was/16010904313
[08:41:17] [PASSED] oob_was/18022495364
[08:41:17] [PASSED] oob_was/22012773006
[08:41:17] [PASSED] oob_was/14014475959
[08:41:17] [PASSED] oob_was/22011391025
[08:41:17] [PASSED] oob_was/22012727170
[08:41:17] [PASSED] oob_was/22012727685
[08:41:17] [PASSED] oob_was/22016596838
[08:41:17] [PASSED] oob_was/18020744125
[08:41:17] [PASSED] oob_was/1409600907
[08:41:17] [PASSED] oob_was/22014953428
[08:41:17] [PASSED] oob_was/16017236439
[08:41:17] [PASSED] oob_was/14019821291
[08:41:17] [PASSED] oob_was/14015076503
[08:41:17] [PASSED] oob_was/22016122933
[08:41:17] [PASSED] oob_was/14018913170
[08:41:17] [PASSED] oob_was/14018094691
[08:41:17] [PASSED] oob_was/18024947630
[08:41:17] [PASSED] oob_was/16022287689
[08:41:17] [PASSED] oob_was/13011645652
[08:41:17] [PASSED] oob_was/14022293748
[08:41:17] [PASSED] oob_was/22019794406
[08:41:17] [PASSED] oob_was/22019338487
[08:41:17] [PASSED] oob_was/16023588340
[08:41:17] [PASSED] oob_was/14019789679
[08:41:17] [PASSED] oob_was/14022866841
[08:41:17] [PASSED] oob_was/16021333562
[08:41:17] [PASSED] oob_was/14016712196
[08:41:17] [PASSED] oob_was/14015568240
[08:41:17] [PASSED] oob_was/18013179988
[08:41:17] [PASSED] oob_was/1508761755
[08:41:17] [PASSED] oob_was/16023105232
[08:41:17] [PASSED] oob_was/16026508708
[08:41:17] [PASSED] oob_was/14020001231
[08:41:17] [PASSED] oob_was/16023683509
[08:41:17] [PASSED] oob_was/14025515070
[08:41:17] [PASSED] oob_was/15015404425_disable
[08:41:17] [PASSED] oob_was/16026007364
[08:41:17] [PASSED] oob_was/14020316580
[08:41:17] [PASSED] oob_was/14025883347
[08:41:17] [PASSED] oob_was/16029380221
[08:41:17] [PASSED] oob_was/22022079272
[08:41:17] [PASSED] oob_was/16029897822
[08:41:17] [PASSED] oob_was/14026539277
[08:41:17] [PASSED] oob_was/14027054324
[08:41:17] [PASSED] oob_was/14025941587
[08:41:17] [PASSED] oob_was/16030224309
[08:41:17] ============== [PASSED] xe_rtp_table_oob_test ==============
[08:41:17] ================ xe_rtp_table_dev_oob_test ================
[08:41:17] [PASSED] device_oob_was/22010954014
[08:41:17] [PASSED] device_oob_was/15015404425
[08:41:17] [PASSED] device_oob_was/22019338487_display
[08:41:17] [PASSED] device_oob_was/14022085890
[08:41:17] [PASSED] device_oob_was/14026633728
[08:41:17] [PASSED] device_oob_was/14026746987
[08:41:17] [PASSED] device_oob_was/14026779378
[08:41:17] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[08:41:17] ========== xe_rtp_table_missing_upper_bound_test ==========
[08:41:17] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[08:41:17] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[08:41:17] [PASSED] register_whitelist/1806527549
[08:41:17] [PASSED] register_whitelist/allow_read_ctx_timestamp
[08:41:17] [PASSED] register_whitelist/allow_read_queue_timestamp
[08:41:17] [PASSED] register_whitelist/16014440446
[08:41:17] [PASSED] register_whitelist/16017236439
[08:41:17] [PASSED] register_whitelist/16020183090
[08:41:17] [PASSED] register_whitelist/14024997852
[08:41:17] [PASSED] register_whitelist/14024997852
[08:41:17] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[08:41:17] =============== [PASSED] xe_rtp_tables_test ================
[08:41:17] =================== xe_rtp (3 subtests) ====================
[08:41:17] =================== xe_rtp_rules_tests ====================
[08:41:17] [PASSED] no
[08:41:17] [PASSED] yes
[08:41:17] [PASSED] no-and-no
[08:41:17] [PASSED] no-and-yes
[08:41:17] [PASSED] yes-and-no
[08:41:17] [PASSED] yes-and-yes
[08:41:17] [PASSED] no-or-no
[08:41:17] [PASSED] no-or-yes
[08:41:17] [PASSED] yes-or-no
[08:41:17] [PASSED] yes-or-yes
[08:41:17] [PASSED] no-yes-or-yes-no
[08:41:17] [PASSED] no-yes-or-yes-yes
[08:41:17] [PASSED] yes-yes-or-no-yes
[08:41:17] [PASSED] yes-yes-or-yes-yes
[08:41:17] [PASSED] no-no-or-yes-or-no
[08:41:17] [PASSED] or
[08:41:17] [PASSED] or-yes
[08:41:17] [PASSED] or-no
[08:41:17] [PASSED] yes-or
[08:41:17] [PASSED] no-or
[08:41:17] [PASSED] no-or-or-yes
[08:41:17] [PASSED] yes-or-or-no
[08:41:17] [PASSED] no-or-or-no
[08:41:17] [PASSED] missing-context-engine-class
[08:41:17] [PASSED] missing-context-engine-class-or-yes
[08:41:17] [PASSED] missing-context-engine-class-or-or-yes
[08:41:17] =============== [PASSED] xe_rtp_rules_tests ================
[08:41:17] =============== xe_rtp_process_to_sr_tests ================
[08:41:17] [PASSED] coalesce-same-reg
[08:41:17] [PASSED] coalesce-same-reg-literal-and-func
[08:41:17] [PASSED] no-match-no-add
[08:41:17] [PASSED] two-regs-two-entries
[08:41:17] [PASSED] clr-one-set-other
[08:41:17] [PASSED] set-field
[08:41:17] [PASSED] conflict-duplicate
[08:41:17] [PASSED] conflict-not-disjoint
[08:41:17] [PASSED] conflict-not-disjoint-literal-and-func
[08:41:17] [PASSED] conflict-reg-type
[08:41:17] [PASSED] bad-mcr-reg-forced-to-regular
[08:41:17] [PASSED] bad-regular-reg-forced-to-mcr
[08:41:17] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:41:17] ================== xe_rtp_process_tests ===================
[08:41:17] [PASSED] active1
[08:41:17] [PASSED] active2
[08:41:17] [PASSED] active-inactive
[08:41:17] [PASSED] inactive-active
[08:41:17] [PASSED] inactive-active-inactive
[08:41:17] [PASSED] inactive-inactive-inactive
[08:41:17] ============== [PASSED] xe_rtp_process_tests ===============
[08:41:17] ===================== [PASSED] xe_rtp ======================
[08:41:17] ==================== xe_wa (1 subtest) =====================
[08:41:17] ======================== xe_wa_gt =========================
[08:41:17] [PASSED] TIGERLAKE B0
[08:41:17] [PASSED] DG1 A0
[08:41:17] [PASSED] DG1 B0
[08:41:17] [PASSED] ALDERLAKE_S A0
[08:41:17] [PASSED] ALDERLAKE_S B0
[08:41:17] [PASSED] ALDERLAKE_S C0
[08:41:17] [PASSED] ALDERLAKE_S D0
[08:41:17] [PASSED] ALDERLAKE_P A0
[08:41:17] [PASSED] ALDERLAKE_P B0
[08:41:17] [PASSED] ALDERLAKE_P C0
[08:41:17] [PASSED] ALDERLAKE_S RPLS D0
[08:41:17] [PASSED] ALDERLAKE_P RPLU E0
[08:41:17] [PASSED] DG2 G10 C0
[08:41:17] [PASSED] DG2 G11 B1
[08:41:17] [PASSED] DG2 G12 A1
[08:41:17] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:41:17] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:41:17] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:41:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:41:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:41:17] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:41:17] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:41:17] ==================== [PASSED] xe_wa_gt =====================
[08:41:17] ====================== [PASSED] xe_wa ======================
[08:41:17] ============================================================
[08:41:17] Testing complete. Ran 839 tests: passed: 810, skipped: 29
[08:41:17] Elapsed time: 41.609s total, 1.828s configuring, 39.015s building, 0.715s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:41:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:41:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:41:44] Starting KUnit Kernel (1/1)...
[08:41:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:41:44] ============ drm_test_pick_cmdline (2 subtests) ============
[08:41:44] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:41:44] =============== drm_test_pick_cmdline_named ===============
[08:41:44] [PASSED] NTSC
[08:41:44] [PASSED] NTSC-J
[08:41:44] [PASSED] PAL
[08:41:44] [PASSED] PAL-M
[08:41:44] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:41:44] ============== [PASSED] drm_test_pick_cmdline ==============
[08:41:44] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:41:44] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:41:44] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:41:44] =========== drm_validate_clone_mode (2 subtests) ===========
[08:41:44] ============== drm_test_check_in_clone_mode ===============
[08:41:44] [PASSED] in_clone_mode
[08:41:44] [PASSED] not_in_clone_mode
[08:41:44] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:41:44] =============== drm_test_check_valid_clones ===============
[08:41:44] [PASSED] not_in_clone_mode
[08:41:44] [PASSED] valid_clone
[08:41:44] [PASSED] invalid_clone
[08:41:44] =========== [PASSED] drm_test_check_valid_clones ===========
[08:41:44] ============= [PASSED] drm_validate_clone_mode =============
[08:41:44] ============= drm_validate_modeset (1 subtest) =============
[08:41:44] [PASSED] drm_test_check_connector_changed_modeset
[08:41:44] ============== [PASSED] drm_validate_modeset ===============
[08:41:44] ====== drm_test_bridge_get_current_state (1 subtest) =======
[08:41:44] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:41:44] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:41:44] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:41:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:41:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:41:44] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[08:41:44] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:41:44] ============== drm_bridge_alloc (2 subtests) ===============
[08:41:44] [PASSED] drm_test_drm_bridge_alloc_basic
[08:41:44] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:41:44] ================ [PASSED] drm_bridge_alloc =================
[08:41:44] ============= drm_bridge_bus_fmt (5 subtests) ==============
[08:41:44] [PASSED] drm_test_bridge_rgb_yuv_rgb
[08:41:44] [PASSED] drm_test_bridge_must_convert_to_yuv444
[08:41:44] [PASSED] drm_test_bridge_hdmi_auto_rgb
[08:41:44] [PASSED] drm_test_bridge_auto_first
[08:41:44] [PASSED] drm_test_bridge_rgb_yuv_no_path
[08:41:44] =============== [PASSED] drm_bridge_bus_fmt ================
[08:41:44] ============= drm_cmdline_parser (40 subtests) =============
[08:41:44] [PASSED] drm_test_cmdline_force_d_only
[08:41:44] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:41:44] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:41:44] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:41:44] [PASSED] drm_test_cmdline_force_e_only
[08:41:44] [PASSED] drm_test_cmdline_res
[08:41:44] [PASSED] drm_test_cmdline_res_vesa
[08:41:44] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:41:44] [PASSED] drm_test_cmdline_res_rblank
[08:41:44] [PASSED] drm_test_cmdline_res_bpp
[08:41:44] [PASSED] drm_test_cmdline_res_refresh
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:41:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:41:44] [PASSED] drm_test_cmdline_res_margins_force_on
[08:41:44] [PASSED] drm_test_cmdline_res_vesa_margins
[08:41:44] [PASSED] drm_test_cmdline_name
[08:41:44] [PASSED] drm_test_cmdline_name_bpp
[08:41:44] [PASSED] drm_test_cmdline_name_option
[08:41:44] [PASSED] drm_test_cmdline_name_bpp_option
[08:41:44] [PASSED] drm_test_cmdline_rotate_0
[08:41:44] [PASSED] drm_test_cmdline_rotate_90
[08:41:44] [PASSED] drm_test_cmdline_rotate_180
[08:41:44] [PASSED] drm_test_cmdline_rotate_270
[08:41:44] [PASSED] drm_test_cmdline_hmirror
[08:41:44] [PASSED] drm_test_cmdline_vmirror
[08:41:44] [PASSED] drm_test_cmdline_margin_options
[08:41:44] [PASSED] drm_test_cmdline_multiple_options
[08:41:44] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:41:44] [PASSED] drm_test_cmdline_extra_and_option
[08:41:44] [PASSED] drm_test_cmdline_freestanding_options
[08:41:44] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:41:44] [PASSED] drm_test_cmdline_panel_orientation
[08:41:44] ================ drm_test_cmdline_invalid =================
[08:41:44] [PASSED] margin_only
[08:41:44] [PASSED] interlace_only
[08:41:44] [PASSED] res_missing_x
[08:41:44] [PASSED] res_missing_y
[08:41:44] [PASSED] res_bad_y
[08:41:44] [PASSED] res_missing_y_bpp
[08:41:44] [PASSED] res_bad_bpp
[08:41:44] [PASSED] res_bad_refresh
[08:41:44] [PASSED] res_bpp_refresh_force_on_off
[08:41:44] [PASSED] res_invalid_mode
[08:41:44] [PASSED] res_bpp_wrong_place_mode
[08:41:44] [PASSED] name_bpp_refresh
[08:41:44] [PASSED] name_refresh
[08:41:44] [PASSED] name_refresh_wrong_mode
[08:41:44] [PASSED] name_refresh_invalid_mode
[08:41:44] [PASSED] rotate_multiple
[08:41:44] [PASSED] rotate_invalid_val
[08:41:44] [PASSED] rotate_truncated
[08:41:44] [PASSED] invalid_option
[08:41:44] [PASSED] invalid_tv_option
[08:41:44] [PASSED] truncated_tv_option
[08:41:44] ============ [PASSED] drm_test_cmdline_invalid =============
[08:41:44] =============== drm_test_cmdline_tv_options ===============
[08:41:44] [PASSED] NTSC
[08:41:44] [PASSED] NTSC_443
[08:41:44] [PASSED] NTSC_J
[08:41:44] [PASSED] PAL
[08:41:44] [PASSED] PAL_M
[08:41:44] [PASSED] PAL_N
[08:41:44] [PASSED] SECAM
[08:41:44] [PASSED] MONO_525
[08:41:44] [PASSED] MONO_625
[08:41:44] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:41:44] =============== [PASSED] drm_cmdline_parser ================
[08:41:44] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:41:44] [PASSED] drm_test_connector_hdmi_init_valid
[08:41:44] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:41:44] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:41:44] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:41:44] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:41:44] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:41:44] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:41:44] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:41:44] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:41:44] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:41:44] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:41:44] [PASSED] supported_formats=0x5 yuv420_allowed=1
[08:41:44] [PASSED] supported_formats=0x5 yuv420_allowed=0
[08:41:44] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:41:44] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:41:44] [PASSED] drm_test_connector_hdmi_init_null_product
[08:41:44] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:41:44] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:41:44] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:41:44] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:41:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:41:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:41:44] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:41:44] ========= drm_test_connector_hdmi_init_type_valid =========
[08:41:44] [PASSED] HDMI-A
[08:41:44] [PASSED] HDMI-B
[08:41:44] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:41:44] ======== drm_test_connector_hdmi_init_type_invalid ========
[08:41:44] [PASSED] Unknown
[08:41:44] [PASSED] VGA
[08:41:44] [PASSED] DVI-I
[08:41:44] [PASSED] DVI-D
[08:41:44] [PASSED] DVI-A
[08:41:44] [PASSED] Composite
[08:41:44] [PASSED] SVIDEO
[08:41:44] [PASSED] LVDS
[08:41:44] [PASSED] Component
[08:41:44] [PASSED] DIN
[08:41:44] [PASSED] DP
[08:41:44] [PASSED] TV
[08:41:44] [PASSED] eDP
[08:41:44] [PASSED] Virtual
[08:41:44] [PASSED] DSI
[08:41:44] [PASSED] DPI
[08:41:44] [PASSED] Writeback
[08:41:44] [PASSED] SPI
[08:41:44] [PASSED] USB
[08:41:44] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:41:44] ============ [PASSED] drmm_connector_hdmi_init =============
[08:41:44] ============= drmm_connector_init (3 subtests) =============
[08:41:44] [PASSED] drm_test_drmm_connector_init
[08:41:44] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:41:44] ========= drm_test_drmm_connector_init_type_valid =========
[08:41:44] [PASSED] Unknown
[08:41:44] [PASSED] VGA
[08:41:44] [PASSED] DVI-I
[08:41:44] [PASSED] DVI-D
[08:41:44] [PASSED] DVI-A
[08:41:44] [PASSED] Composite
[08:41:44] [PASSED] SVIDEO
[08:41:44] [PASSED] LVDS
[08:41:44] [PASSED] Component
[08:41:44] [PASSED] DIN
[08:41:44] [PASSED] DP
[08:41:44] [PASSED] HDMI-A
[08:41:44] [PASSED] HDMI-B
[08:41:44] [PASSED] TV
[08:41:44] [PASSED] eDP
[08:41:44] [PASSED] Virtual
[08:41:44] [PASSED] DSI
[08:41:44] [PASSED] DPI
[08:41:44] [PASSED] Writeback
[08:41:44] [PASSED] SPI
[08:41:44] [PASSED] USB
[08:41:44] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:41:44] =============== [PASSED] drmm_connector_init ===============
[08:41:44] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_init
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:41:44] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[08:41:44] [PASSED] Unknown
[08:41:44] [PASSED] VGA
[08:41:44] [PASSED] DVI-I
[08:41:44] [PASSED] DVI-D
[08:41:44] [PASSED] DVI-A
[08:41:44] [PASSED] Composite
[08:41:44] [PASSED] SVIDEO
[08:41:44] [PASSED] LVDS
[08:41:44] [PASSED] Component
[08:41:44] [PASSED] DIN
[08:41:44] [PASSED] DP
[08:41:44] [PASSED] HDMI-A
[08:41:44] [PASSED] HDMI-B
[08:41:44] [PASSED] TV
[08:41:44] [PASSED] eDP
[08:41:44] [PASSED] Virtual
[08:41:44] [PASSED] DSI
[08:41:44] [PASSED] DPI
[08:41:44] [PASSED] Writeback
[08:41:44] [PASSED] SPI
[08:41:44] [PASSED] USB
[08:41:44] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:41:44] ======== drm_test_drm_connector_dynamic_init_name =========
[08:41:44] [PASSED] Unknown
[08:41:44] [PASSED] VGA
[08:41:44] [PASSED] DVI-I
[08:41:44] [PASSED] DVI-D
[08:41:44] [PASSED] DVI-A
[08:41:44] [PASSED] Composite
[08:41:44] [PASSED] SVIDEO
[08:41:44] [PASSED] LVDS
[08:41:44] [PASSED] Component
[08:41:44] [PASSED] DIN
[08:41:44] [PASSED] DP
[08:41:44] [PASSED] HDMI-A
[08:41:44] [PASSED] HDMI-B
[08:41:44] [PASSED] TV
[08:41:44] [PASSED] eDP
[08:41:44] [PASSED] Virtual
[08:41:44] [PASSED] DSI
[08:41:44] [PASSED] DPI
[08:41:44] [PASSED] Writeback
[08:41:44] [PASSED] SPI
[08:41:44] [PASSED] USB
[08:41:44] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:41:44] =========== [PASSED] drm_connector_dynamic_init ============
[08:41:44] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:41:44] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:41:44] ======= drm_connector_dynamic_register (7 subtests) ========
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:41:44] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:41:44] ========= [PASSED] drm_connector_dynamic_register ==========
[08:41:44] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:41:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:41:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:41:44] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:41:44] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:41:44] ========== drm_test_get_tv_mode_from_name_valid ===========
[08:41:44] [PASSED] NTSC
[08:41:44] [PASSED] NTSC-443
[08:41:44] [PASSED] NTSC-J
[08:41:44] [PASSED] PAL
[08:41:44] [PASSED] PAL-M
[08:41:44] [PASSED] PAL-N
[08:41:44] [PASSED] SECAM
[08:41:44] [PASSED] Mono
[08:41:44] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:41:44] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:41:44] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:41:44] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:41:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:41:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:41:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:41:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:41:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:41:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:41:44] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[08:41:44] [PASSED] VIC 96
[08:41:44] [PASSED] VIC 97
[08:41:44] [PASSED] VIC 101
[08:41:44] [PASSED] VIC 102
[08:41:44] [PASSED] VIC 106
[08:41:44] [PASSED] VIC 107
[08:41:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:41:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:41:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:41:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:41:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:41:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:41:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:41:44] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:41:44] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[08:41:44] [PASSED] Automatic
[08:41:44] [PASSED] Full
[08:41:44] [PASSED] Limited 16:235
[08:41:44] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:41:44] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:41:44] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:41:44] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:41:44] === drm_test_drm_hdmi_connector_get_output_format_name ====
[08:41:44] [PASSED] RGB
[08:41:44] [PASSED] YUV 4:2:0
[08:41:44] [PASSED] YUV 4:2:2
[08:41:44] [PASSED] YUV 4:4:4
[08:41:44] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:41:44] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:41:44] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:41:44] ============= drm_damage_helper (21 subtests) ==============
[08:41:44] [PASSED] drm_test_damage_iter_no_damage
[08:41:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:41:44] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:41:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:41:44] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:41:44] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:41:44] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:41:44] [PASSED] drm_test_damage_iter_simple_damage
[08:41:44] [PASSED] drm_test_damage_iter_single_damage
[08:41:44] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:41:44] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:41:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:41:44] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:41:44] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:41:44] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:41:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:41:44] [PASSED] drm_test_damage_iter_damage
[08:41:44] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:41:44] [PASSED] drm_test_damage_iter_damage_one_outside
[08:41:44] [PASSED] drm_test_damage_iter_damage_src_moved
[08:41:44] [PASSED] drm_test_damage_iter_damage_not_visible
[08:41:44] ================ [PASSED] drm_damage_helper ================
[08:41:44] ============== drm_dp_mst_helper (3 subtests) ==============
[08:41:44] ============== drm_test_dp_mst_calc_pbn_mode ==============
[08:41:44] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:41:44] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:41:44] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:41:44] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:41:44] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:41:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:41:44] ============== drm_test_dp_mst_calc_pbn_div ===============
[08:41:44] [PASSED] Link rate 2000000 lane count 4
[08:41:44] [PASSED] Link rate 2000000 lane count 2
[08:41:44] [PASSED] Link rate 2000000 lane count 1
[08:41:44] [PASSED] Link rate 1350000 lane count 4
[08:41:44] [PASSED] Link rate 1350000 lane count 2
[08:41:44] [PASSED] Link rate 1350000 lane count 1
[08:41:44] [PASSED] Link rate 1000000 lane count 4
[08:41:44] [PASSED] Link rate 1000000 lane count 2
[08:41:44] [PASSED] Link rate 1000000 lane count 1
[08:41:44] [PASSED] Link rate 810000 lane count 4
[08:41:44] [PASSED] Link rate 810000 lane count 2
[08:41:44] [PASSED] Link rate 810000 lane count 1
[08:41:44] [PASSED] Link rate 540000 lane count 4
[08:41:44] [PASSED] Link rate 540000 lane count 2
[08:41:44] [PASSED] Link rate 540000 lane count 1
[08:41:44] [PASSED] Link rate 270000 lane count 4
[08:41:44] [PASSED] Link rate 270000 lane count 2
[08:41:44] [PASSED] Link rate 270000 lane count 1
[08:41:44] [PASSED] Link rate 162000 lane count 4
[08:41:44] [PASSED] Link rate 162000 lane count 2
[08:41:44] [PASSED] Link rate 162000 lane count 1
[08:41:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:41:44] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[08:41:44] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:41:44] [PASSED] DP_POWER_UP_PHY with port number
[08:41:44] [PASSED] DP_POWER_DOWN_PHY with port number
[08:41:44] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:41:44] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:41:44] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:41:44] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:41:44] [PASSED] DP_QUERY_PAYLOAD with port number
[08:41:44] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:41:44] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:41:44] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:41:44] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:41:44] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:41:44] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:41:44] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:41:44] [PASSED] DP_REMOTE_I2C_READ with port number
[08:41:44] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:41:44] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:41:44] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:41:44] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:41:44] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:41:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:41:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:41:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:41:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:41:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:41:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:41:44] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:41:44] ================ [PASSED] drm_dp_mst_helper ================
[08:41:44] ================== drm_exec (7 subtests) ===================
[08:41:44] [PASSED] sanitycheck
[08:41:44] [PASSED] test_lock
[08:41:44] [PASSED] test_lock_unlock
[08:41:44] [PASSED] test_duplicates
[08:41:44] [PASSED] test_prepare
[08:41:44] [PASSED] test_prepare_array
[08:41:44] [PASSED] test_multiple_loops
[08:41:44] ==================== [PASSED] drm_exec =====================
[08:41:44] =========== drm_format_helper_test (17 subtests) ===========
[08:41:44] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:41:44] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:41:44] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:41:44] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:41:44] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:41:44] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:41:44] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:41:44] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:41:44] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:41:44] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:41:44] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:41:44] ============== drm_test_fb_xrgb8888_to_mono ===============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:41:44] ==================== drm_test_fb_swab =====================
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ================ [PASSED] drm_test_fb_swab =================
[08:41:44] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:41:44] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[08:41:44] [PASSED] single_pixel_source_buffer
[08:41:44] [PASSED] single_pixel_clip_rectangle
[08:41:44] [PASSED] well_known_colors
[08:41:44] [PASSED] destination_pitch
[08:41:44] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:41:44] ================= drm_test_fb_clip_offset =================
[08:41:44] [PASSED] pass through
[08:41:44] [PASSED] horizontal offset
[08:41:44] [PASSED] vertical offset
[08:41:44] [PASSED] horizontal and vertical offset
[08:41:44] [PASSED] horizontal offset (custom pitch)
[08:41:44] [PASSED] vertical offset (custom pitch)
[08:41:44] [PASSED] horizontal and vertical offset (custom pitch)
[08:41:44] ============= [PASSED] drm_test_fb_clip_offset =============
[08:41:44] =================== drm_test_fb_memcpy ====================
[08:41:44] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:41:44] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:41:44] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:41:44] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:41:44] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:41:44] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:41:44] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:41:44] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:41:44] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:41:44] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:41:44] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:41:44] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:41:44] =============== [PASSED] drm_test_fb_memcpy ================
[08:41:44] ============= [PASSED] drm_format_helper_test ==============
[08:41:44] ================= drm_format (18 subtests) =================
[08:41:44] [PASSED] drm_test_format_block_width_invalid
[08:41:44] [PASSED] drm_test_format_block_width_one_plane
[08:41:44] [PASSED] drm_test_format_block_width_two_plane
[08:41:44] [PASSED] drm_test_format_block_width_three_plane
[08:41:44] [PASSED] drm_test_format_block_width_tiled
[08:41:44] [PASSED] drm_test_format_block_height_invalid
[08:41:44] [PASSED] drm_test_format_block_height_one_plane
[08:41:44] [PASSED] drm_test_format_block_height_two_plane
[08:41:44] [PASSED] drm_test_format_block_height_three_plane
[08:41:44] [PASSED] drm_test_format_block_height_tiled
[08:41:44] [PASSED] drm_test_format_min_pitch_invalid
[08:41:44] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:41:44] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:41:44] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:41:44] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:41:44] [PASSED] drm_test_format_min_pitch_two_plane
[08:41:44] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:41:44] [PASSED] drm_test_format_min_pitch_tiled
[08:41:44] =================== [PASSED] drm_format ====================
[08:41:44] ============== drm_framebuffer (10 subtests) ===============
[08:41:44] ========== drm_test_framebuffer_check_src_coords ==========
[08:41:44] [PASSED] Success: source fits into fb
[08:41:44] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:41:44] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:41:44] [PASSED] Fail: overflowing fb with source width
[08:41:44] [PASSED] Fail: overflowing fb with source height
[08:41:44] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:41:44] [PASSED] drm_test_framebuffer_cleanup
[08:41:44] =============== drm_test_framebuffer_create ===============
[08:41:44] [PASSED] ABGR8888 normal sizes
[08:41:44] [PASSED] ABGR8888 max sizes
[08:41:44] [PASSED] ABGR8888 pitch greater than min required
[08:41:44] [PASSED] ABGR8888 pitch less than min required
[08:41:44] [PASSED] ABGR8888 Invalid width
[08:41:44] [PASSED] ABGR8888 Invalid buffer handle
[08:41:44] [PASSED] No pixel format
[08:41:44] [PASSED] ABGR8888 Width 0
[08:41:44] [PASSED] ABGR8888 Height 0
[08:41:44] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:41:44] [PASSED] ABGR8888 Large buffer offset
[08:41:44] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:41:44] [PASSED] ABGR8888 Invalid flag
[08:41:44] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:41:44] [PASSED] ABGR8888 Valid buffer modifier
[08:41:44] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:41:44] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:41:44] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:41:44] [PASSED] NV12 Normal sizes
[08:41:44] [PASSED] NV12 Max sizes
[08:41:44] [PASSED] NV12 Invalid pitch
[08:41:44] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:41:44] [PASSED] NV12 different modifier per-plane
[08:41:44] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:41:44] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:41:44] [PASSED] NV12 Modifier for inexistent plane
[08:41:44] [PASSED] NV12 Handle for inexistent plane
[08:41:44] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:41:44] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:41:44] [PASSED] YVU420 Normal sizes
[08:41:44] [PASSED] YVU420 Max sizes
[08:41:44] [PASSED] YVU420 Invalid pitch
[08:41:44] [PASSED] YVU420 Different pitches
[08:41:44] [PASSED] YVU420 Different buffer offsets/pitches
[08:41:44] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:41:44] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:41:44] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:41:44] [PASSED] YVU420 Valid modifier
[08:41:44] [PASSED] YVU420 Different modifiers per plane
[08:41:44] [PASSED] YVU420 Modifier for inexistent plane
[08:41:44] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:41:44] [PASSED] X0L2 Normal sizes
[08:41:44] [PASSED] X0L2 Max sizes
[08:41:44] [PASSED] X0L2 Invalid pitch
[08:41:44] [PASSED] X0L2 Pitch greater than minimum required
[08:41:44] [PASSED] X0L2 Handle for inexistent plane
[08:41:44] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:41:44] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:41:44] [PASSED] X0L2 Valid modifier
[08:41:44] [PASSED] X0L2 Modifier for inexistent plane
[08:41:44] =========== [PASSED] drm_test_framebuffer_create ===========
[08:41:44] [PASSED] drm_test_framebuffer_free
[08:41:44] [PASSED] drm_test_framebuffer_init
[08:41:44] [PASSED] drm_test_framebuffer_init_bad_format
[08:41:44] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:41:44] [PASSED] drm_test_framebuffer_lookup
[08:41:44] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:41:44] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:41:44] ================= [PASSED] drm_framebuffer =================
[08:41:44] ================ drm_gem_shmem (8 subtests) ================
[08:41:44] [PASSED] drm_gem_shmem_test_obj_create
[08:41:44] [PASSED] drm_gem_shmem_test_obj_create_private
[08:41:44] [PASSED] drm_gem_shmem_test_pin_pages
[08:41:44] [PASSED] drm_gem_shmem_test_vmap
[08:41:44] [PASSED] drm_gem_shmem_test_get_sg_table
[08:41:44] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:41:44] [PASSED] drm_gem_shmem_test_madvise
[08:41:44] [PASSED] drm_gem_shmem_test_purge
[08:41:44] ================== [PASSED] drm_gem_shmem ==================
[08:41:44] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:41:44] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[08:41:44] [PASSED] Automatic
[08:41:44] [PASSED] Full
[08:41:44] [PASSED] Limited 16:235
[08:41:44] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:41:44] [PASSED] drm_test_check_disable_connector
[08:41:44] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:41:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:41:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:41:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:41:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:41:44] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:41:44] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:41:44] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:41:44] [PASSED] drm_test_check_output_bpc_dvi
[08:41:44] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:41:44] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:41:44] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:41:44] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:41:44] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:41:44] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:41:44] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:41:44] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:41:44] ============ drm_test_check_hdmi_color_format =============
[08:41:44] [PASSED] AUTO -> RGB
[08:41:44] [PASSED] YCBCR422 -> YUV422
[08:41:44] [PASSED] YCBCR420 -> YUV420
[08:41:44] [PASSED] YCBCR444 -> YUV444
[08:41:44] [PASSED] RGB -> RGB
[08:41:44] ======== [PASSED] drm_test_check_hdmi_color_format =========
[08:41:44] ======== drm_test_check_hdmi_color_format_420_only ========
[08:41:44] [PASSED] RGB should fail
[08:41:44] [PASSED] YUV444 should fail
[08:41:44] [PASSED] YUV422 should fail
[08:41:44] [PASSED] YUV420 should work
[08:41:44] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[08:41:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:41:44] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:41:44] [PASSED] drm_test_check_broadcast_rgb_value
[08:41:44] [PASSED] drm_test_check_bpc_8_value
[08:41:44] [PASSED] drm_test_check_bpc_10_value
[08:41:44] [PASSED] drm_test_check_bpc_12_value
[08:41:44] [PASSED] drm_test_check_format_value
[08:41:44] [PASSED] drm_test_check_tmds_char_value
[08:41:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:41:44] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[08:41:44] [PASSED] drm_test_check_mode_valid
[08:41:44] [PASSED] drm_test_check_mode_valid_reject
[08:41:44] [PASSED] drm_test_check_mode_valid_reject_rate
[08:41:44] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:41:44] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[08:41:44] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[08:41:44] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[08:41:44] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:41:44] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[08:41:44] [PASSED] drm_test_check_infoframes
[08:41:44] [PASSED] drm_test_check_reject_avi_infoframe
[08:41:44] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[08:41:44] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[08:41:44] [PASSED] drm_test_check_reject_audio_infoframe
[08:41:44] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[08:41:44] ================= drm_managed (2 subtests) =================
[08:41:44] [PASSED] drm_test_managed_release_action
[08:41:44] [PASSED] drm_test_managed_run_action
[08:41:44] =================== [PASSED] drm_managed ===================
[08:41:44] =================== drm_mm (6 subtests) ====================
[08:41:44] [PASSED] drm_test_mm_init
[08:41:44] [PASSED] drm_test_mm_debug
[08:41:44] [PASSED] drm_test_mm_align32
[08:41:44] [PASSED] drm_test_mm_align64
[08:41:44] [PASSED] drm_test_mm_lowest
[08:41:44] [PASSED] drm_test_mm_highest
[08:41:44] ===================== [PASSED] drm_mm ======================
[08:41:44] ============= drm_modes_analog_tv (5 subtests) =============
[08:41:44] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:41:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:41:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:41:44] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:41:44] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:41:44] =============== [PASSED] drm_modes_analog_tv ===============
[08:41:44] ============== drm_panic_helper (3 subtests) ===============
[08:41:44] ============= drm_test_panic_screen_user_map ==============
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[08:41:44] ========= [PASSED] drm_test_panic_screen_user_map ==========
[08:41:44] ============= drm_test_panic_screen_user_page =============
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[08:41:44] ========= [PASSED] drm_test_panic_screen_user_page =========
[08:41:44] ========== drm_test_panic_screen_user_set_pixel ===========
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[08:41:44] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[08:41:44] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[08:41:44] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[08:41:44] ================ [PASSED] drm_panic_helper =================
[08:41:44] ============== drm_plane_helper (2 subtests) ===============
[08:41:44] =============== drm_test_check_plane_state ================
[08:41:44] [PASSED] clipping_simple
[08:41:44] [PASSED] clipping_rotate_reflect
[08:41:44] [PASSED] positioning_simple
[08:41:44] [PASSED] upscaling
[08:41:44] [PASSED] downscaling
[08:41:44] [PASSED] rounding1
[08:41:44] [PASSED] rounding2
[08:41:44] [PASSED] rounding3
[08:41:44] [PASSED] rounding4
[08:41:44] =========== [PASSED] drm_test_check_plane_state ============
[08:41:44] =========== drm_test_check_invalid_plane_state ============
[08:41:44] [PASSED] positioning_invalid
[08:41:44] [PASSED] upscaling_invalid
[08:41:44] [PASSED] downscaling_invalid
[08:41:44] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:41:44] ================ [PASSED] drm_plane_helper =================
[08:41:44] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:41:44] ====== drm_test_connector_helper_tv_get_modes_check =======
[08:41:44] [PASSED] None
[08:41:44] [PASSED] PAL
[08:41:44] [PASSED] NTSC
[08:41:44] [PASSED] Both, NTSC Default
[08:41:44] [PASSED] Both, PAL Default
[08:41:44] [PASSED] Both, NTSC Default, with PAL on command-line
[08:41:44] [PASSED] Both, PAL Default, with NTSC on command-line
[08:41:44] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:41:44] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:41:44] ================== drm_rect (9 subtests) ===================
[08:41:44] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:41:44] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:41:44] [PASSED] drm_test_rect_clip_scaled_clipped
[08:41:44] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:41:44] ================= drm_test_rect_intersect =================
[08:41:44] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:41:44] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:41:44] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:41:44] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:41:44] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:41:44] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:41:44] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:41:44] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:41:44] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:41:44] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:41:44] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:41:44] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:41:44] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:41:44] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:41:44] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:41:44] ============= [PASSED] drm_test_rect_intersect =============
[08:41:44] ================ drm_test_rect_calc_hscale ================
[08:41:44] [PASSED] normal use
[08:41:44] [PASSED] out of max range
[08:41:44] [PASSED] out of min range
[08:41:44] [PASSED] zero dst
[08:41:44] [PASSED] negative src
[08:41:44] [PASSED] negative dst
[08:41:44] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:41:44] ================ drm_test_rect_calc_vscale ================
[08:41:44] [PASSED] normal use
[08:41:44] [PASSED] out of max range
[08:41:44] [PASSED] out of min range
[08:41:44] [PASSED] zero dst
[08:41:44] [PASSED] negative src
[08:41:44] [PASSED] negative dst
[08:41:44] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:41:44] ================== drm_test_rect_rotate ===================
[08:41:44] [PASSED] reflect-x
[08:41:44] [PASSED] reflect-y
[08:41:44] [PASSED] rotate-0
[08:41:44] [PASSED] rotate-90
[08:41:44] [PASSED] rotate-180
[08:41:44] [PASSED] rotate-270
[08:41:44] ============== [PASSED] drm_test_rect_rotate ===============
[08:41:44] ================ drm_test_rect_rotate_inv =================
[08:41:44] [PASSED] reflect-x
[08:41:44] [PASSED] reflect-y
[08:41:44] [PASSED] rotate-0
[08:41:44] [PASSED] rotate-90
[08:41:44] [PASSED] rotate-180
[08:41:44] [PASSED] rotate-270
[08:41:44] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:41:44] ==================== [PASSED] drm_rect =====================
[08:41:44] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:41:44] ============ drm_test_sysfb_build_fourcc_list =============
[08:41:44] [PASSED] no native formats
[08:41:44] [PASSED] XRGB8888 as native format
[08:41:44] [PASSED] remove duplicates
[08:41:44] [PASSED] convert alpha formats
[08:41:44] [PASSED] random formats
[08:41:44] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:41:44] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:41:44] ================== drm_fixp (2 subtests) ===================
[08:41:44] [PASSED] drm_test_int2fixp
[08:41:44] [PASSED] drm_test_sm2fixp
[08:41:44] ==================== [PASSED] drm_fixp =====================
[08:41:44] ============================================================
[08:41:44] Testing complete. Ran 667 tests: passed: 667
[08:41:44] Elapsed time: 27.350s total, 1.793s configuring, 25.091s building, 0.462s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:41:45] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:41:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:41:57] Starting KUnit Kernel (1/1)...
[08:41:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:41:57] ================= ttm_device (5 subtests) ==================
[08:41:57] [PASSED] ttm_device_init_basic
[08:41:57] [PASSED] ttm_device_init_multiple
[08:41:57] [PASSED] ttm_device_fini_basic
[08:41:57] [PASSED] ttm_device_init_no_vma_man
[08:41:57] ================== ttm_device_init_pools ==================
[08:41:57] [PASSED] No DMA allocations, no DMA32 required
[08:41:57] [PASSED] DMA allocations, DMA32 required
[08:41:57] [PASSED] No DMA allocations, DMA32 required
[08:41:57] [PASSED] DMA allocations, no DMA32 required
[08:41:57] ============== [PASSED] ttm_device_init_pools ==============
[08:41:57] =================== [PASSED] ttm_device ====================
[08:41:57] ================== ttm_pool (8 subtests) ===================
[08:41:57] ================== ttm_pool_alloc_basic ===================
[08:41:57] [PASSED] One page
[08:41:57] [PASSED] More than one page
[08:41:57] [PASSED] Above the allocation limit
[08:41:57] [PASSED] One page, with coherent DMA mappings enabled
[08:41:57] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:41:57] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:41:57] ============== ttm_pool_alloc_basic_dma_addr ==============
[08:41:57] [PASSED] One page
[08:41:57] [PASSED] More than one page
[08:41:57] [PASSED] Above the allocation limit
[08:41:57] [PASSED] One page, with coherent DMA mappings enabled
[08:41:57] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:41:57] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:41:57] [PASSED] ttm_pool_alloc_order_caching_match
[08:41:57] [PASSED] ttm_pool_alloc_caching_mismatch
[08:41:57] [PASSED] ttm_pool_alloc_order_mismatch
[08:41:57] [PASSED] ttm_pool_free_dma_alloc
[08:41:57] [PASSED] ttm_pool_free_no_dma_alloc
[08:41:57] [PASSED] ttm_pool_fini_basic
[08:41:57] ==================== [PASSED] ttm_pool =====================
[08:41:57] ================ ttm_resource (8 subtests) =================
[08:41:57] ================= ttm_resource_init_basic =================
[08:41:57] [PASSED] Init resource in TTM_PL_SYSTEM
[08:41:57] [PASSED] Init resource in TTM_PL_VRAM
[08:41:57] [PASSED] Init resource in a private placement
[08:41:57] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:41:57] ============= [PASSED] ttm_resource_init_basic =============
[08:41:57] [PASSED] ttm_resource_init_pinned
[08:41:57] [PASSED] ttm_resource_fini_basic
[08:41:57] [PASSED] ttm_resource_manager_init_basic
[08:41:57] [PASSED] ttm_resource_manager_usage_basic
[08:41:57] [PASSED] ttm_resource_manager_set_used_basic
[08:41:57] [PASSED] ttm_sys_man_alloc_basic
[08:41:57] [PASSED] ttm_sys_man_free_basic
[08:41:57] ================== [PASSED] ttm_resource ===================
[08:41:57] =================== ttm_tt (15 subtests) ===================
[08:41:57] ==================== ttm_tt_init_basic ====================
[08:41:57] [PASSED] Page-aligned size
[08:41:57] [PASSED] Extra pages requested
[08:41:57] ================ [PASSED] ttm_tt_init_basic ================
[08:41:57] [PASSED] ttm_tt_init_misaligned
[08:41:57] [PASSED] ttm_tt_fini_basic
[08:41:57] [PASSED] ttm_tt_fini_sg
[08:41:57] [PASSED] ttm_tt_fini_shmem
[08:41:57] [PASSED] ttm_tt_create_basic
[08:41:57] [PASSED] ttm_tt_create_invalid_bo_type
[08:41:57] [PASSED] ttm_tt_create_ttm_exists
[08:41:57] [PASSED] ttm_tt_create_failed
[08:41:57] [PASSED] ttm_tt_destroy_basic
[08:41:57] [PASSED] ttm_tt_populate_null_ttm
[08:41:57] [PASSED] ttm_tt_populate_populated_ttm
[08:41:57] [PASSED] ttm_tt_unpopulate_basic
[08:41:57] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:41:57] [PASSED] ttm_tt_swapin_basic
[08:41:57] ===================== [PASSED] ttm_tt ======================
[08:41:57] =================== ttm_bo (14 subtests) ===================
[08:41:57] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[08:41:57] [PASSED] Cannot be interrupted and sleeps
[08:41:57] [PASSED] Cannot be interrupted, locks straight away
[08:41:57] [PASSED] Can be interrupted, sleeps
[08:41:57] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:41:57] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:41:57] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:41:57] [PASSED] ttm_bo_reserve_double_resv
[08:41:57] [PASSED] ttm_bo_reserve_interrupted
[08:41:57] [PASSED] ttm_bo_reserve_deadlock
[08:41:57] [PASSED] ttm_bo_unreserve_basic
[08:41:57] [PASSED] ttm_bo_unreserve_pinned
[08:41:57] [PASSED] ttm_bo_unreserve_bulk
[08:41:57] [PASSED] ttm_bo_fini_basic
[08:41:57] [PASSED] ttm_bo_fini_shared_resv
[08:41:57] [PASSED] ttm_bo_pin_basic
[08:41:57] [PASSED] ttm_bo_pin_unpin_resource
[08:41:57] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:41:57] ===================== [PASSED] ttm_bo ======================
[08:41:57] ============== ttm_bo_validate (22 subtests) ===============
[08:41:57] ============== ttm_bo_init_reserved_sys_man ===============
[08:41:57] [PASSED] Buffer object for userspace
[08:41:57] [PASSED] Kernel buffer object
[08:41:57] [PASSED] Shared buffer object
[08:41:57] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:41:57] ============== ttm_bo_init_reserved_mock_man ==============
[08:41:57] [PASSED] Buffer object for userspace
[08:41:57] [PASSED] Kernel buffer object
[08:41:57] [PASSED] Shared buffer object
[08:41:57] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:41:57] [PASSED] ttm_bo_init_reserved_resv
[08:41:57] ================== ttm_bo_validate_basic ==================
[08:41:57] [PASSED] Buffer object for userspace
[08:41:57] [PASSED] Kernel buffer object
[08:41:57] [PASSED] Shared buffer object
[08:41:57] ============== [PASSED] ttm_bo_validate_basic ==============
[08:41:57] [PASSED] ttm_bo_validate_invalid_placement
[08:41:57] ============= ttm_bo_validate_same_placement ==============
[08:41:57] [PASSED] System manager
[08:41:57] [PASSED] VRAM manager
[08:41:57] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:41:57] [PASSED] ttm_bo_validate_failed_alloc
[08:41:57] [PASSED] ttm_bo_validate_pinned
[08:41:57] [PASSED] ttm_bo_validate_busy_placement
[08:41:57] ================ ttm_bo_validate_multihop =================
[08:41:57] [PASSED] Buffer object for userspace
[08:41:57] [PASSED] Kernel buffer object
[08:41:57] [PASSED] Shared buffer object
[08:41:57] ============ [PASSED] ttm_bo_validate_multihop =============
[08:41:57] ========== ttm_bo_validate_no_placement_signaled ==========
[08:41:57] [PASSED] Buffer object in system domain, no page vector
[08:41:57] [PASSED] Buffer object in system domain with an existing page vector
[08:41:57] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:41:57] ======== ttm_bo_validate_no_placement_not_signaled ========
[08:41:57] [PASSED] Buffer object for userspace
[08:41:57] [PASSED] Kernel buffer object
[08:41:57] [PASSED] Shared buffer object
[08:41:57] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:41:57] [PASSED] ttm_bo_validate_move_fence_signaled
[08:41:57] ========= ttm_bo_validate_move_fence_not_signaled =========
[08:41:57] [PASSED] Waits for GPU
[08:41:57] [PASSED] Tries to lock straight away
[08:41:57] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:41:57] [PASSED] ttm_bo_validate_swapout
[08:41:57] [PASSED] ttm_bo_validate_happy_evict
[08:41:57] [PASSED] ttm_bo_validate_all_pinned_evict
[08:41:57] [PASSED] ttm_bo_validate_allowed_only_evict
[08:41:57] [PASSED] ttm_bo_validate_deleted_evict
[08:41:57] [PASSED] ttm_bo_validate_busy_domain_evict
[08:41:57] [PASSED] ttm_bo_validate_evict_gutting
[08:41:57] [PASSED] ttm_bo_validate_recrusive_evict
[08:41:57] ================= [PASSED] ttm_bo_validate =================
[08:41:57] ============================================================
[08:41:57] Testing complete. Ran 102 tests: passed: 102
[08:41:57] Elapsed time: 12.270s total, 1.819s configuring, 10.185s building, 0.232s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[08:41:57] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:41:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:42:07] Starting KUnit Kernel (1/1)...
[08:42:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:42:07] =============== dma-buf-fence (12 subtests) ================
[08:42:07] [PASSED] test_sanitycheck
[08:42:07] [PASSED] test_signaling
[08:42:07] [PASSED] test_add_callback
[08:42:07] [PASSED] test_late_add_callback
[08:42:07] [PASSED] test_rm_callback
[08:42:07] [PASSED] test_late_rm_callback
[08:42:07] [PASSED] test_status
[08:42:07] [PASSED] test_error
[08:42:07] [PASSED] test_wait
[08:42:07] [PASSED] test_wait_timeout
[08:42:07] [PASSED] test_stub
[08:42:07] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[08:42:07] ================== [PASSED] dma-buf-fence ==================
[08:42:07] ============ dma-buf-fence-chain (11 subtests) =============
[08:42:07] [PASSED] test_sanitycheck
[08:42:07] [PASSED] test_find_seqno
[08:42:07] [PASSED] test_find_signaled
[08:42:07] [PASSED] test_find_out_of_order
[08:42:13] [PASSED] test_find_gap
[08:42:13] [PASSED] test_find_race
[08:42:13] [PASSED] test_signal_forward
[08:42:13] [PASSED] test_signal_backward
[08:42:13] [PASSED] test_wait_forward
[08:42:13] [PASSED] test_wait_backward
[08:42:13] [PASSED] test_wait_random
[08:42:13] =============== [PASSED] dma-buf-fence-chain ===============
[08:42:13] ============ dma-buf-fence-unwrap (11 subtests) ============
[08:42:13] [PASSED] test_sanitycheck
[08:42:13] [PASSED] test_unwrap_array
[08:42:13] [PASSED] test_unwrap_chain
[08:42:13] [PASSED] test_unwrap_chain_array
[08:42:13] [PASSED] test_unwrap_merge
[08:42:13] [PASSED] test_unwrap_merge_duplicate
[08:42:13] [PASSED] test_unwrap_merge_seqno
[08:42:13] [PASSED] test_unwrap_merge_order
[08:42:13] [PASSED] test_unwrap_merge_complex
[08:42:13] [PASSED] test_unwrap_merge_complex_seqno
[08:42:13] [PASSED] test_dedup_empty
[08:42:13] ============== [PASSED] dma-buf-fence-unwrap ===============
[08:42:13] ================ dma-buf-resv (5 subtests) =================
[08:42:13] [PASSED] test_sanitycheck
[08:42:13] ===================== test_signaling ======================
[08:42:13] [PASSED] kernel
[08:42:13] [PASSED] write
[08:42:13] [PASSED] read
[08:42:13] [PASSED] bookkeep
[08:42:13] ================= [PASSED] test_signaling ==================
[08:42:13] ====================== test_for_each ======================
[08:42:13] [PASSED] kernel
[08:42:13] [PASSED] write
[08:42:13] [PASSED] read
[08:42:13] [PASSED] bookkeep
[08:42:13] ================== [PASSED] test_for_each ==================
[08:42:13] ================= test_for_each_unlocked ==================
[08:42:13] [PASSED] kernel
[08:42:13] [PASSED] write
[08:42:13] [PASSED] read
[08:42:13] [PASSED] bookkeep
[08:42:13] ============= [PASSED] test_for_each_unlocked ==============
[08:42:13] ===================== test_get_fences =====================
[08:42:13] [PASSED] kernel
[08:42:13] [PASSED] write
[08:42:13] [PASSED] read
[08:42:13] [PASSED] bookkeep
[08:42:13] ================= [PASSED] test_get_fences =================
[08:42:13] ================== [PASSED] dma-buf-resv ===================
[08:42:13] ============================================================
[08:42:13] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[08:42:13] Elapsed time: 15.711s total, 1.770s configuring, 8.670s building, 5.262s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v7 00/10] Add CPER logging support for CRI
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (11 preceding siblings ...)
2026-10-29 8:42 ` ✓ CI.KUnit: success " Patchwork
@ 2026-10-29 9:17 ` Raag Jadav
2026-10-29 9:26 ` ✓ Xe.CI.BAT: success for Add CPER logging support for CRI (rev7) Patchwork
13 siblings, 0 replies; 17+ messages in thread
From: Raag Jadav @ 2026-10-29 9:17 UTC (permalink / raw)
To: Badal Nilawar
Cc: intel-xe, anshuman.gupta, rodrigo.vivi, daniele.ceraolospurio,
riana.tauro, mallesh.koujalagi, aravind.iddamsetty,
himal.prasad.ghimiray, arvind.yadav, syed.abdul.muqthyar.ahmed,
nitin.r.gote
On Thu, Oct 29, 2026 at 01:57:53PM +0530, Badal Nilawar wrote:
> This patch series adds CPER (Common Platform Error Record) logging support
> for RAS errors reported by Intel Xe GPUs. CPER records are emitted through
> a trace event.
>
> v2:
> - Extended CPER logging to Uncorrectable errors and xe_ras_get_counter
> request
> - Log CPER records via xe_log SIGID infra
>
> v3:
> - Added the patches in incremental order (Raag)
> - Fixed Sashiko warnings which are applicable
>
> v4:
> - Split the patches further for incremental review (Raag)
> - Refactor info queue handling (Raag)
> - Fix applicable Sashiko warnings
>
> v5:
> - Fixed v4 comments
> - Covered default paths in error handling flow
> - Moved info queue related patches at top
> - Added example logs
>
> v6:
> - Fixed v6 comments
> - Dropped the Info Queue patches; they will be submitted separately
> - Dropped "drm/xe/xe_ras: Report unknown errors using SIGID" as
> SIGID logging is not needed for it (Riana/Raag)
> v7:
> - Rebased
> - Fixed Sashiko comments
> - Added GUID of PCIID 6752
I think we missed a few comments[1][2][3] here. Please make sure to address
them.
Raag
[1] https://lore.kernel.org/intel-xe/auIoa-LxjETpt0LR@black.igk.intel.com/
[2] https://lore.kernel.org/intel-xe/auIrXSWHyxE2K_M6@black.igk.intel.com/
[3] https://lore.kernel.org/intel-xe/auIuFsYCyl5m2mrG@black.igk.intel.com/
> Badal Nilawar (10):
> drm/xe/cper: Add CPER reporting entry point for xe_log
> drm/xe/cper: Retrieve the error counter record for CPER reporting
> drm/xe/cper: Initialize Intel-specific CPER header
> drm/xe/cper: Construct CPER record for hardware errors
> drm/xe/cper: Log CPER records for aggregate counter retrieval
> drm/xe/cper: Emit cper record to trace buf
> drm/xe/xe_ras: Report device memory errors using SIGID
> drm/xe/xe_ras: Report core compute errors using SIGID
> drm/xe/xe_ras: Report soc internal errors using SIGID
> drm/xe/xe_ras: Report correctable errors using SIGID
>
> .../ABI/testing/sysfs-driver-intel-xe-cper | 18 +
> drivers/gpu/drm/xe/Makefile | 3 +
> drivers/gpu/drm/xe/xe_cper.c | 321 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_cper.h | 37 ++
> drivers/gpu/drm/xe/xe_cper_types.h | 110 ++++++
> drivers/gpu/drm/xe/xe_device_types.h | 4 +
> drivers/gpu/drm/xe/xe_log.c | 5 +-
> drivers/gpu/drm/xe/xe_ras.c | 146 ++++++--
> drivers/gpu/drm/xe/xe_ras.h | 2 +
> drivers/gpu/drm/xe/xe_trace_cper.c | 9 +
> drivers/gpu/drm/xe/xe_trace_cper.h | 65 ++++
> 11 files changed, 692 insertions(+), 28 deletions(-)
> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-cper
> create mode 100644 drivers/gpu/drm/xe/xe_cper.c
> create mode 100644 drivers/gpu/drm/xe/xe_cper.h
> create mode 100644 drivers/gpu/drm/xe/xe_cper_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.c
> create mode 100644 drivers/gpu/drm/xe/xe_trace_cper.h
>
> --
> 2.56.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread* ✓ Xe.CI.BAT: success for Add CPER logging support for CRI (rev7)
2026-10-29 8:27 [PATCH v7 00/10] Add CPER logging support for CRI Badal Nilawar
` (12 preceding siblings ...)
2026-10-29 9:17 ` [PATCH v7 00/10] Add CPER logging support for CRI Raag Jadav
@ 2026-10-29 9:26 ` Patchwork
13 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-10-29 9:26 UTC (permalink / raw)
To: Badal Nilawar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1753 bytes --]
== Series Details ==
Series: Add CPER logging support for CRI (rev7)
URL : https://patchwork.freedesktop.org/series/169692/
State : success
== Summary ==
CI Bug Log - changes from xe-6028-8f4ea34f33525cf5120a2a68ee119ef0df276795_BAT -> xe-pw-169692v7_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-169692v7_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_create@create-execqueues-noleak:
- bat-ptl-2: NOTRUN -> [ABORT][1] ([Intel XE#9362])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v7/bat-ptl-2/igt@xe_create@create-execqueues-noleak.html
#### Possible fixes ####
* igt@xe_compute_preempt@compute-threadgroup-preempt:
- bat-ptl-2: [ABORT][2] ([Intel XE#9362]) -> [PASS][3] +1 other test pass
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6028-8f4ea34f33525cf5120a2a68ee119ef0df276795/bat-ptl-2/igt@xe_compute_preempt@compute-threadgroup-preempt.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v7/bat-ptl-2/igt@xe_compute_preempt@compute-threadgroup-preempt.html
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
Build changes
-------------
* Linux: xe-6028-8f4ea34f33525cf5120a2a68ee119ef0df276795 -> xe-pw-169692v7
IGT_9170: 9170
xe-6028-8f4ea34f33525cf5120a2a68ee119ef0df276795: 8f4ea34f33525cf5120a2a68ee119ef0df276795
xe-pw-169692v7: 169692v7
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169692v7/index.html
[-- Attachment #2: Type: text/html, Size: 2415 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread