[PATCH v3 0/9] Initial Apple Silicon M5 device trees and dt-bindings

[PATCH v3 0/9] Initial Apple Silicon M5 device trees and dt-bindings

[Yureka Lilian]

Hi,

This series adds initial device trees and dt-bindings for the Apple
Silicon devices using the M5 (t8142) SoCs.

This series covers only a minimal amount of hardware, which is useful
as a basis for future developments. The hardware added here has remained
largely unchanged from the earlier Apple Silicon generations.

I applied some version of dt-check-style formatting to all new files
with the exception of the generated pmgr nodes.

Merge strategy:
Since there are no actual driver changes, we'd prefer to merge the
dt-bindings changes through the apple-soc tree once Acked by the
respective maintainers.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
Changes in v3:
- Fixed mixed-indent-chars lint by replacing 8*space by 1*tab
- Link to v2: https://patch.msgid.link/20261104-apple-m5-initial-devicetrees-v2-0-fd727a82d380@cyberchaos.dev

Changes in v2:
- Dropped the watchdog dt-bindings commit, as it's been applied to the
  watchdog tree
- Fixed ordering of pinctrl dt-bindings list
- Link to v1: https://patch.msgid.link/20261027-apple-m5-initial-devicetrees-v1-0-1356181bc50d@cyberchaos.dev

To: Sven Peter <sven@kernel.org>
To: Janne Grunau <j@jannau.net>
To: Neal Gompa <neal@gompa.dev>
To: Thomas Gleixner <tglx@kernel.org>
To: Radu Rendec <radu@rendec.net>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Hector Martin <marcan@marcan.st>
To: Uwe Kleine-König <ukleinek@kernel.org>
To: Sasha Finkelstein <k@chaosmail.tech>
To: Linus Walleij <linusw@kernel.org>
To: Mark Kettenis <kettenis@openbsd.org>
To: Andi Shyti <andi.shyti@kernel.org>
Cc: asahi@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-i2c@vger.kernel.org

---
Yureka Lilian (9):
      dt-bindings: interrupt-controller: apple,aic2: Add t8142 compatible
      dt-bindings: arm: cpus: Add Apple M5 CPU core compatibles
      dt-bindings: arm: power: apple,pmgr-pwrstate: Add t8142 compatible
      dt-bindings: arm: apple: apple,pmgr: Add t8142 compatible
      dt-bindings: pwm: apple,s5l-fpwm: Add t8142 compatible
      dt-bindings: pinctrl: apple,pinctrl: Add t8142 compatible
      dt-bindings: i2c: apple,i2c: Add t8142 compatible
      dt-bindings: arm: apple: Add M5 based devices
      arm64: dts: apple: Add minimal t8142 (M5) device trees

 Documentation/devicetree/bindings/arm/apple.yaml   |   15 +
 .../devicetree/bindings/arm/apple/apple,pmgr.yaml  |    1 +
 Documentation/devicetree/bindings/arm/cpus.yaml    |    2 +
 .../devicetree/bindings/i2c/apple,i2c.yaml         |    1 +
 .../bindings/interrupt-controller/apple,aic2.yaml  |    1 +
 .../devicetree/bindings/pinctrl/apple,pinctrl.yaml |    3 +
 .../bindings/power/apple,pmgr-pwrstate.yaml        |    1 +
 .../devicetree/bindings/pwm/apple,s5l-fpwm.yaml    |    1 +
 arch/arm64/boot/dts/apple/Makefile                 |    3 +
 arch/arm64/boot/dts/apple/t8142-j704.dts           |   36 +
 arch/arm64/boot/dts/apple/t8142-j813.dts           |   36 +
 arch/arm64/boot/dts/apple/t8142-j815.dts           |   36 +
 arch/arm64/boot/dts/apple/t8142-jxxx.dtsi          |   50 +
 arch/arm64/boot/dts/apple/t8142-pmgr.dtsi          | 1131 ++++++++++++++++++++
 arch/arm64/boot/dts/apple/t8142.dtsi               |  512 +++++++++
 15 files changed, 1829 insertions(+)
---
base-commit: b01f6764df0254308bf0c33b9f7ef01ef4975d28
change-id: 20261016-apple-m5-initial-devicetrees-4de0b9759b3b

Best regards,
--  
Yureka Lilian <yureka@cyberchaos.dev>

[PATCH v3 1/9] dt-bindings: interrupt-controller: apple,aic2: Add t8142 compatible

[Yureka Lilian]

The Apple t8142 (M5) SoC uses an AIC3 as interrupt controller, same as
the M3-M4 SoCs.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
index 3c2b24be530e..b6ad9d9192a2 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
@@ -49,6 +49,7 @@ properties:
               - apple,t6041-aic3
               - apple,t8132-aic3
               - apple,t8140-aic3
+              - apple,t8142-aic3
           - const: apple,t8122-aic3
       - const: apple,t8122-aic3
 

-- 
2.56.0

[PATCH v3 2/9] dt-bindings: arm: cpus: Add Apple M5 CPU core compatibles

[Yureka Lilian]

Add "apple,hidra-e" and "apple,hidra-p" compatibles for the M5
efficiency and performance CPU cores respectively.
The compatible strings are chosen based on SoC codename ("Hidra") plus
core type (E-Core / P-Core).

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
index b2fc99f74a15..c3cc0c48ca54 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -92,6 +92,8 @@ properties:
           - apple,donan-p
           - apple,everest
           - apple,firestorm
+          - apple,hidra-e
+          - apple,hidra-p
           - apple,hurricane-zephyr
           - apple,icestorm
           - apple,mistral

-- 
2.56.0

[PATCH v3 3/9] dt-bindings: arm: power: apple,pmgr-pwrstate: Add t8142 compatible

[Yureka Lilian]

The device power state management of the PMGR blocks on the Apple
silicon M5 SoC (t8142) is compatible with the M1-M4 SoCs.
Add "apple,t8142-pmgr-pwrstate" as M5 specific compatible.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml
index a37a837a4eac..451f2a80f844 100644
--- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml
+++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml
@@ -51,6 +51,7 @@ properties:
               - apple,t8122-pmgr-pwrstate
               - apple,t8132-pmgr-pwrstate
               - apple,t8140-pmgr-pwrstate
+              - apple,t8142-pmgr-pwrstate
           - const: apple,t8103-pmgr-pwrstate
 
   reg:

-- 
2.56.0

[PATCH v3 4/9] dt-bindings: arm: apple: apple,pmgr: Add t8142 compatible

[Yureka Lilian]

The PMGR blocks on the Apple Silicon M5 SoC (t8142) are compatible
with the M1-M4 SoCs. Add "apple,t8142-pmgr" as M5 specific
compatible.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
index 3967fcfc1663..015a5b6834d0 100644
--- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
+++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
@@ -44,6 +44,7 @@ properties:
               - apple,t8122-pmgr
               - apple,t8132-pmgr
               - apple,t8140-pmgr
+              - apple,t8142-pmgr
           - const: apple,t8103-pmgr
           - const: syscon
           - const: simple-mfd

-- 
2.56.0

[PATCH v3 5/9] dt-bindings: pwm: apple,s5l-fpwm: Add t8142 compatible

[Yureka Lilian]

The PWM controller on the Apple silicon t8142 (M5) SoC is compatible
with t8103. Add "apple,t8142-fpwm" as SoC specific compatible under
"apple,s5l-fpwm".

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml
index 48cafd391ca2..7c9e148727a7 100644
--- a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml
+++ b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml
@@ -20,6 +20,7 @@ properties:
           - apple,t8112-fpwm
           - apple,t8122-fpwm
           - apple,t8132-fpwm
+          - apple,t8142-fpwm
           - apple,t6000-fpwm
           - apple,t6020-fpwm
           - apple,t6030-fpwm

-- 
2.56.0

[PATCH v3 6/9] dt-bindings: pinctrl: apple,pinctrl: Add t8142 compatible

[Yureka Lilian]

The pin controller on the Apple Silicon T8142 (M5) SoCs is compatible
with t8140. Add "apple,t8142-pinctrl" as SoC specific compatible under
"apple,t8140-pinctrl".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
index 0984e4e58af3..13ece17eca9c 100644
--- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
@@ -27,6 +27,9 @@ properties:
               - apple,t8122-pinctrl
               - apple,t8132-pinctrl
           - const: apple,t8103-pinctrl
+      - items:
+          - const: apple,t8142-pinctrl
+          - const: apple,t8140-pinctrl
       - items:
           # Do not add additional SoC to this list.
           - enum:

-- 
2.56.0

[PATCH v3 7/9] dt-bindings: i2c: apple,i2c: Add t8142 compatible

[Yureka Lilian]

The i2c block on the Apple Silicon T8142 (M5) SoC is compatible with
t8103. Add "apple,t8142-i2c" as SoC specific compatible under
"apple,t8103-i2c".

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/i2c/apple,i2c.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml
index b817a8f0a9df..e7ed1efb7b64 100644
--- a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml
@@ -30,6 +30,7 @@ properties:
               - apple,t8122-i2c
               - apple,t8132-i2c
               - apple,t8140-i2c
+              - apple,t8142-i2c
           - const: apple,t8103-i2c
       - items:
           - enum:

-- 
2.56.0

[PATCH v3 8/9] dt-bindings: arm: apple: Add M5 based devices

[Yureka Lilian]

Only the MacBook Pro (14-inch) and MacBook Air (13/15-inch) were offered
with the M5 (t8142) SoC. Add the corresponding compatibles.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 Documentation/devicetree/bindings/arm/apple.yaml | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml
index da6f043ad07a..f78c89780355 100644
--- a/Documentation/devicetree/bindings/arm/apple.yaml
+++ b/Documentation/devicetree/bindings/arm/apple.yaml
@@ -116,6 +116,12 @@ description: |
   - MacBook Air (15-inch, M4, 2025)
   - Mac mini (M4, 2024)
 
+  Devices based on the "M5" SoC:
+
+  - MacBook Pro (14-inch, M5, 2026)
+  - MacBook Air (13-inch, M5, 2026)
+  - MacBook Air (15-inch, M5, 2026)
+
   Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:
 
   - MacBook Pro (14-inch, M1 Pro, 2021)
@@ -364,6 +370,15 @@ properties:
           - const: apple,t8132
           - const: apple,arm-platform
 
+      - description: Apple M5 SoC based platforms
+        items:
+          - enum:
+              - apple,j704  # MacBook Pro (14-inch, M5, 2025)
+              - apple,j813  # MacBook Air (13-inch, M5, 2026)
+              - apple,j815  # MacBook Air (15-inch, M5, 2026)
+          - const: apple,t8142
+          - const: apple,arm-platform
+
       - description: Apple M1 Pro SoC based platforms
         items:
           - enum:

-- 
2.56.0

[PATCH v3 9/9] arm64: dts: apple: Add minimal t8142 (M5) device trees

[Yureka Lilian]

Added device trees for the following devices:
- apple,j704 - MacBook Pro (14-inch, M5, 2026)
- apple,j813 - MacBook Air (13-inch, M5, 2026)
- apple,j815 - MacBook Air (15-inch, M5, 2026)

The device trees have a minimal set of devices limited to CPU cores,
interrupt controller, watchdog, serial, pin controllers, i2c and
framebuffer.

Boot-tested on j704 with macOS 26.6 iBoot/firmware and the latest m1n1.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 arch/arm64/boot/dts/apple/Makefile        |    3 +
 arch/arm64/boot/dts/apple/t8142-j704.dts  |   36 +
 arch/arm64/boot/dts/apple/t8142-j813.dts  |   36 +
 arch/arm64/boot/dts/apple/t8142-j815.dts  |   36 +
 arch/arm64/boot/dts/apple/t8142-jxxx.dtsi |   50 ++
 arch/arm64/boot/dts/apple/t8142-pmgr.dtsi | 1131 +++++++++++++++++++++++++++++
 arch/arm64/boot/dts/apple/t8142.dtsi      |  512 +++++++++++++
 7 files changed, 1804 insertions(+)

diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile
index 12fc777405b3..933a299a9e01 100644
--- a/arch/arm64/boot/dts/apple/Makefile
+++ b/arch/arm64/boot/dts/apple/Makefile
@@ -116,3 +116,6 @@ dtb-$(CONFIG_ARCH_APPLE) += t8132-j713.dtb
 dtb-$(CONFIG_ARCH_APPLE) += t8132-j715.dtb
 dtb-$(CONFIG_ARCH_APPLE) += t8132-j773g.dtb
 dtb-$(CONFIG_ARCH_APPLE) += t8140-j700.dtb
+dtb-$(CONFIG_ARCH_APPLE) += t8142-j704.dtb
+dtb-$(CONFIG_ARCH_APPLE) += t8142-j813.dtb
+dtb-$(CONFIG_ARCH_APPLE) += t8142-j815.dtb
diff --git a/arch/arm64/boot/dts/apple/t8142-j704.dts b/arch/arm64/boot/dts/apple/t8142-j704.dts
new file mode 100644
index 000000000000..ef8cc463f910
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8142-j704.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple MacBook Pro (14-inch, M5, 2026)
+ *
+ * target-type: J704
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8142.dtsi"
+#include "t8142-jxxx.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "Apple MacBook Pro (14-inch, M5, 2026)";
+	compatible = "apple,j704", "apple,t8142", "apple,arm-platform";
+
+	led-controller {
+		compatible = "pwm-leds";
+
+		led-0 {
+			color = <LED_COLOR_ID_WHITE>;
+			default-state = "keep";
+			function = LED_FUNCTION_KBD_BACKLIGHT;
+			label = "kbd_backlight";
+			max-brightness = <255>;
+			pwms = <&fpwm0 0 40000>;
+		};
+	};
+};
+
+&fpwm0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/apple/t8142-j813.dts b/arch/arm64/boot/dts/apple/t8142-j813.dts
new file mode 100644
index 000000000000..d956390403f9
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8142-j813.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple MacBook Air (13-inch, M5, 2026)
+ *
+ * target-type: J813
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8142.dtsi"
+#include "t8142-jxxx.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "Apple MacBook Air (13-inch, M5, 2026)";
+	compatible = "apple,j813", "apple,t8142", "apple,arm-platform";
+
+	led-controller {
+		compatible = "pwm-leds";
+
+		led-0 {
+			color = <LED_COLOR_ID_WHITE>;
+			default-state = "keep";
+			function = LED_FUNCTION_KBD_BACKLIGHT;
+			label = "kbd_backlight";
+			max-brightness = <255>;
+			pwms = <&fpwm0 0 40000>;
+		};
+	};
+};
+
+&fpwm0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/apple/t8142-j815.dts b/arch/arm64/boot/dts/apple/t8142-j815.dts
new file mode 100644
index 000000000000..cb326336c65b
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8142-j815.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple MacBook Air (15-inch, M5, 2026)
+ *
+ * target-type: J815
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8142.dtsi"
+#include "t8142-jxxx.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "Apple MacBook Air (15-inch, M5, 2026)";
+	compatible = "apple,j815", "apple,t8142", "apple,arm-platform";
+
+	led-controller {
+		compatible = "pwm-leds";
+
+		led-0 {
+			color = <LED_COLOR_ID_WHITE>;
+			default-state = "keep";
+			function = LED_FUNCTION_KBD_BACKLIGHT;
+			label = "kbd_backlight";
+			max-brightness = <255>;
+			pwms = <&fpwm0 0 40000>;
+		};
+	};
+};
+
+&fpwm0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/apple/t8142-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8142-jxxx.dtsi
new file mode 100644
index 000000000000..28983a524239
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8142-jxxx.dtsi
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple M5 MacBook Air/Pro (M5, 2026)
+ *
+ * This file contains parts common to all Apple M5 devices using the t8142.
+ *
+ * target-type: J704, J813, J815
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/ {
+	aliases {
+		serial0 = &serial0;
+	};
+
+	chosen {
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		stdout-path = "serial0";
+
+		framebuffer@0 {
+			compatible = "apple,simple-framebuffer",
+				     "simple-framebuffer";
+			reg = <0 0 0 0>; /* To be filled by loader */
+			power-domains = <&ps_disp_fe>;
+			/* Format properties will be added by loader */
+
+			status = "disabled";
+		};
+	};
+
+	memory@800000000 {
+		device_type = "memory";
+		reg = <0x8 0 0x2 0>; /* To be filled by loader */
+	};
+
+	reserved-memory {
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		/* To be filled by loader */
+	};
+};
+
+&serial0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/apple/t8142-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8142-pmgr.dtsi
new file mode 100644
index 000000000000..b89c7720cf23
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8142-pmgr.dtsi
@@ -0,0 +1,1131 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * PMGR Power domains for Apple T8142 "M5" SoC
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+&pmgr {
+	ps_msg: power-controller@110 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x110 4>;
+		label = "msg";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_aic: power-controller@118 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x118 4>;
+		label = "aic";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_gpio: power-controller@120 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x120 4>;
+		label = "gpio";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pms_awl: power-controller@138 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x138 4>;
+		label = "pms_awl";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pmc: power-controller@140 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x140 4>;
+		label = "pmc";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pms_fpwm0: power-controller@148 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x148 4>;
+		label = "pms_fpwm0";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pms_fpwm1: power-controller@150 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x150 4>;
+		label = "pms_fpwm1";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+
+		status = "disabled"; /* Locked, don't touch */
+	};
+
+	ps_pms_fpwm2: power-controller@158 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x158 4>;
+		label = "pms_fpwm2";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pms_fpwm3: power-controller@160 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x160 4>;
+		label = "pms_fpwm3";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pms_fpwm4: power-controller@168 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x168 4>;
+		label = "pms_fpwm4";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pms_c1ppt: power-controller@170 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x170 4>;
+		label = "pms_c1ppt";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_soc_rc: power-controller@178 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x178 4>;
+		label = "soc_rc";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_soc_dpe: power-controller@180 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x180 4>;
+		label = "soc_dpe";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_ispsens0: power-controller@190 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x190 4>;
+		label = "ispsens0";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_ispsens1: power-controller@198 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x198 4>;
+		label = "ispsens1";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_global_aux_ctrl0: power-controller@1a0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x1a0 4>;
+		label = "global_aux_ctrl0";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_global_aux_ctrl1: power-controller@1a8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x1a8 4>;
+		label = "global_aux_ctrl1";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_ap_tmm: power-controller@1b0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x1b0 4>;
+		label = "ap_tmm";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_disp_sys: power-controller@290 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x290 4>;
+		label = "disp_sys";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on; /* TODO: figure out if we can enable PM here */
+	};
+
+	ps_venc_sys: power-controller@298 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x298 4>;
+		label = "venc_sys";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_jpg: power-controller@2a0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2a0 4>;
+		label = "jpg";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_msr: power-controller@2a8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2a8 4>;
+		label = "msr";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_dispext1_sys: power-controller@2b8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2b8 4>;
+		label = "dispext1_sys";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_scodec: power-controller@2c0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2c0 4>;
+		label = "scodec";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc0_common: power-controller@2c8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2c8 4>;
+		label = "atc0_common";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc1_common: power-controller@2d0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2d0 4>;
+		label = "atc1_common";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc2_common: power-controller@2d8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2d8 4>;
+		label = "atc2_common";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc3_common: power-controller@2e0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2e0 4>;
+		label = "atc3_common";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_ane_sys: power-controller@2e8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2e8 4>;
+		label = "ane_sys";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_apcie_gp: power-controller@2f0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2f0 4>;
+		label = "apcie_gp";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_isp_sys: power-controller@2f8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x2f8 4>;
+		label = "isp_sys";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_ans: power-controller@300 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x300 4>;
+		label = "ans";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on; /* Device reboots after 3-5 mintues if disabled */
+	};
+
+	ps_dispext0_sys: power-controller@308 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x308 4>;
+		label = "dispext0_sys";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_avd_sys: power-controller@310 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x310 4>;
+		label = "avd_sys";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_disp_fe: power-controller@318 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x318 4>;
+		label = "disp_fe";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_disp_sys>;
+		#reset-cells = <0>;
+		apple,always-on; /* TODO: figure out if we can enable PM here */
+	};
+
+	ps_msr_ase_core: power-controller@320 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x320 4>;
+		label = "msr_ase_core";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_msr>;
+		#reset-cells = <0>;
+	};
+
+	ps_sio_cpu: power-controller@328 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x328 4>;
+		label = "sio_cpu";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_fpwm0: power-controller@330 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x330 4>;
+		label = "fpwm0";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_fpwm2: power-controller@340 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x340 4>;
+		label = "fpwm2";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c0: power-controller@348 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x348 4>;
+		label = "i2c0";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c1: power-controller@350 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x350 4>;
+		label = "i2c1";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c2: power-controller@358 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x358 4>;
+		label = "i2c2";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c3: power-controller@360 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x360 4>;
+		label = "i2c3";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c4: power-controller@368 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x368 4>;
+		label = "i2c4";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c5: power-controller@370 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x370 4>;
+		label = "i2c5";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c6: power-controller@378 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x378 4>;
+		label = "i2c6";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c7: power-controller@380 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x380 4>;
+		label = "i2c7";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_i2c8: power-controller@388 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x388 4>;
+		label = "i2c8";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_spi_p: power-controller@390 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x390 4>;
+		label = "spi_p";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart_p: power-controller@398 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x398 4>;
+		label = "uart_p";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_aes: power-controller@3a0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3a0 4>;
+		label = "aes";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_dispext1_fe: power-controller@3a8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3a8 4>;
+		label = "dispext1_fe";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_dispext1_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_dispext1_adma: power-controller@3b0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3b0 4>;
+		label = "dispext1_adma";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_dispext1_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_dispext1_cpu: power-controller@3b8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3b8 4>;
+		label = "dispext1_cpu";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_dispext1_fe>;
+		#reset-cells = <0>;
+
+		status = "disabled"; /* Locked, don't touch */
+	};
+
+	ps_scodec_streaming: power-controller@3c0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3c0 4>;
+		label = "scodec_streaming";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_scodec>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc0_pcie: power-controller@3c8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3c8 4>;
+		label = "atc0_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc0_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc0_cio: power-controller@3d0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3d0 4>;
+		label = "atc0_cio";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc0_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc1_pcie: power-controller@3d8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3d8 4>;
+		label = "atc1_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc1_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc1_cio: power-controller@3e0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3e0 4>;
+		label = "atc1_cio";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc1_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc2_pcie: power-controller@3e8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3e8 4>;
+		label = "atc2_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc2_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc2_cio: power-controller@3f0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3f0 4>;
+		label = "atc2_cio";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc2_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc3_pcie: power-controller@3f8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x3f8 4>;
+		label = "atc3_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc3_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc3_cio: power-controller@400 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x400 4>;
+		label = "atc3_cio";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc3_common>;
+		#reset-cells = <0>;
+	};
+
+	ps_apcie_sys_gp: power-controller@408 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x408 4>;
+		label = "apcie_sys_gp";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_apcie_gp>;
+		#reset-cells = <0>;
+	};
+
+	ps_apcie_st: power-controller@410 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x410 4>;
+		label = "apcie_st";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_ans>;
+		#reset-cells = <0>;
+	};
+
+	ps_dispext0_fe: power-controller@418 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x418 4>;
+		label = "dispext0_fe";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_dispext0_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_dispext0_adma: power-controller@420 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x420 4>;
+		label = "dispext0_adma";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_dispext0_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_dispext0_cpu: power-controller@428 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x428 4>;
+		label = "dispext0_cpu";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_dispext0_fe>;
+		#reset-cells = <0>;
+
+		status = "disabled"; /* Locked, don't touch */
+	};
+
+	ps_spi0: power-controller@430 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x430 4>;
+		label = "spi0";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_spi_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_spi1: power-controller@438 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x438 4>;
+		label = "spi1";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_spi_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_spi2: power-controller@440 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x440 4>;
+		label = "spi2";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_spi_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_spi3: power-controller@448 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x448 4>;
+		label = "spi3";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_spi_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_spi4: power-controller@450 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x450 4>;
+		label = "spi4";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_spi_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_spi5: power-controller@458 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x458 4>;
+		label = "spi5";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_spi_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_qspi: power-controller@460 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x460 4>;
+		label = "qspi";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_spi_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart_n: power-controller@468 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x468 4>;
+		label = "uart_n";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart0: power-controller@470 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x470 4>;
+		label = "uart0";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart1: power-controller@478 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x478 4>;
+		label = "uart1";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart2: power-controller@480 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x480 4>;
+		label = "uart2";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart3: power-controller@488 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x488 4>;
+		label = "uart3";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart4: power-controller@490 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x490 4>;
+		label = "uart4";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart5: power-controller@498 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x498 4>;
+		label = "uart5";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_uart6: power-controller@4a0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x4a0 4>;
+		label = "uart6";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_uart_p>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc0_cio_pcie: power-controller@4d8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x4d8 4>;
+		label = "atc0_cio_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc0_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc0_cio_usb: power-controller@4e0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x4e0 4>;
+		label = "atc0_cio_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc0_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc1_cio_pcie: power-controller@4e8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x4e8 4>;
+		label = "atc1_cio_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc1_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc1_cio_usb: power-controller@4f0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x4f0 4>;
+		label = "atc1_cio_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc1_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc2_cio_pcie: power-controller@4f8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x4f8 4>;
+		label = "atc2_cio_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc2_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc2_cio_usb: power-controller@500 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x500 4>;
+		label = "atc2_cio_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc2_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc3_cio_pcie: power-controller@508 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x508 4>;
+		label = "atc3_cio_pcie";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc3_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc3_cio_usb: power-controller@510 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x510 4>;
+		label = "atc3_cio_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc3_cio>;
+		#reset-cells = <0>;
+	};
+
+	ps_sys_gp_ocla: power-controller@518 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x518 4>;
+		label = "sys_gp_ocla";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_apcie_sys_gp>;
+		#reset-cells = <0>;
+	};
+
+	ps_apcie_sys_st: power-controller@520 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x520 4>;
+		label = "apcie_sys_st";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_ans>, <&ps_apcie_st>;
+		#reset-cells = <0>;
+	};
+
+	ps_apcie_phy_sw: power-controller@560 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x560 4>;
+		label = "apcie_phy_sw";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_apcie_sys_st>, <&ps_apcie_sys_gp>;
+		#reset-cells = <0>;
+	};
+
+	ps_sys_st_ocla: power-controller@568 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x568 4>;
+		label = "sys_st_ocla";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_apcie_sys_st>;
+		#reset-cells = <0>;
+	};
+
+	ps_st0_aus5_aon: power-controller@578 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x578 4>;
+		label = "st0_aus5_aon";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_apcie_phy_sw>;
+		#reset-cells = <0>;
+	};
+
+	ps_st0_aus5: power-controller@580 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x580 4>;
+		label = "st0_aus5";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_st0_aus5_aon>;
+		#reset-cells = <0>;
+	};
+
+	ps_pmp: power-controller@598 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x598 4>;
+		label = "pmp";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_pms_sram: power-controller@5a0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x5a0 4>;
+		label = "pms_sram";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_sep: power-controller@c00 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xc00 4>;
+		label = "sep";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_venc_dma: power-controller@8000 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x8000 4>;
+		label = "venc_dma";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_venc_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_venc_pipe4: power-controller@8008 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x8008 4>;
+		label = "venc_pipe4";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_venc_dma>;
+		#reset-cells = <0>;
+	};
+
+	ps_venc_pipe5: power-controller@8010 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x8010 4>;
+		label = "venc_pipe5";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_venc_dma>;
+		#reset-cells = <0>;
+	};
+
+	ps_venc_me0: power-controller@8018 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x8018 4>;
+		label = "venc_me0";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_venc_dma>;
+		#reset-cells = <0>;
+	};
+
+	ps_venc_me1: power-controller@8020 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x8020 4>;
+		label = "venc_me1";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_venc_me0>;
+		#reset-cells = <0>;
+	};
+
+	ps_ane_cpu: power-controller@c000 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xc000 4>;
+		label = "ane_cpu";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_ane_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_ane_tdbase: power-controller@c008 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xc008 4>;
+		label = "ane_tdbase";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_ane_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_ane_mpm: power-controller@c010 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xc010 4>;
+		label = "ane_mpm";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_ane_sys>;
+		#reset-cells = <0>;
+	};
+
+	ps_disp_cpu: power-controller@10000 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x10000 4>;
+		label = "disp_cpu";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_disp_fe>;
+		#reset-cells = <0>;
+
+		status = "disabled"; /* Locked, don't touch */
+	};
+
+	ps_disp_adma: power-controller@10068 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x10068 4>;
+		label = "disp_adma";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_disp_sys>;
+		#reset-cells = <0>;
+	};
+};
+
+&pmgr_mini {
+	ps_debug_gated: power-controller@58 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x58 4>;
+		label = "debug_gated";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_spmi0: power-controller@60 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x60 4>;
+		label = "nub_spmi0";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_spmi1: power-controller@68 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x68 4>;
+		label = "nub_spmi1";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_spmi_a0: power-controller@70 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x70 4>;
+		label = "nub_spmi_a0";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_spmi_a1: power-controller@78 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x78 4>;
+		label = "nub_spmi_a1";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_aon_nogate: power-controller@88 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x88 4>;
+		label = "nub_aon_nogate";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_dock_ch: power-controller@98 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x98 4>;
+		label = "nub_dock_ch";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_awl: power-controller@a0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xa0 4>;
+		label = "nub_awl";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_nub_gpio: power-controller@a8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xa8 4>;
+		label = "nub_gpio";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_atc0_usb_aon: power-controller@c8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xc8 4>;
+		label = "atc0_usb_aon";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc0_usb: power-controller@d0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xd0 4>;
+		label = "atc0_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc0_common>, <&ps_atc0_usb_aon>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc1_usb_aon: power-controller@d8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xd8 4>;
+		label = "atc1_usb_aon";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc1_usb: power-controller@e0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xe0 4>;
+		label = "atc1_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc1_common>, <&ps_atc1_usb_aon>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc2_usb_aon: power-controller@e8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xe8 4>;
+		label = "atc2_usb_aon";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc2_usb: power-controller@f0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xf0 4>;
+		label = "atc2_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc2_common>, <&ps_atc2_usb_aon>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc3_usb_aon: power-controller@f8 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0xf8 4>;
+		label = "atc3_usb_aon";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+
+	ps_atc3_usb: power-controller@100 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x100 4>;
+		label = "atc3_usb";
+		#power-domain-cells = <0>;
+		power-domains = <&ps_atc3_common>, <&ps_atc3_usb_aon>;
+		#reset-cells = <0>;
+	};
+};
+
+&pmgr_gfx {
+	ps_gpx: power-controller@0 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x0 4>;
+		label = "gpx";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+		apple,always-on;
+	};
+
+	ps_gfx: power-controller@110 {
+		compatible = "apple,t8142-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";
+		reg = <0x110 4>;
+		label = "gfx";
+		#power-domain-cells = <0>;
+		#reset-cells = <0>;
+	};
+};
diff --git a/arch/arm64/boot/dts/apple/t8142.dtsi b/arch/arm64/boot/dts/apple/t8142.dtsi
new file mode 100644
index 000000000000..3befa95fb337
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8142.dtsi
@@ -0,0 +1,512 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple T8142 "M5" SoC
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+#include <dt-bindings/interrupt-controller/apple-aic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/apple.h>
+
+/ {
+	compatible = "apple,t8142", "apple,arm-platform";
+
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	clkref: clock-ref {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "clkref";
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu_e0>;
+				};
+
+				core1 {
+					cpu = <&cpu_e1>;
+				};
+
+				core2 {
+					cpu = <&cpu_e2>;
+				};
+
+				core3 {
+					cpu = <&cpu_e3>;
+				};
+
+				core4 {
+					cpu = <&cpu_e4>;
+				};
+
+				core5 {
+					cpu = <&cpu_e5>;
+				};
+			};
+
+			cluster1 {
+				core0 {
+					cpu = <&cpu_p0>;
+				};
+
+				core1 {
+					cpu = <&cpu_p1>;
+				};
+
+				core2 {
+					cpu = <&cpu_p2>;
+				};
+
+				core3 {
+					cpu = <&cpu_p3>;
+				};
+			};
+		};
+
+		cpu_e0: cpu@0 {
+			device_type = "cpu";
+			compatible = "apple,hidra-e";
+			reg = <0x0 0x0>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
+		};
+
+		cpu_e1: cpu@1 {
+			device_type = "cpu";
+			compatible = "apple,hidra-e";
+			reg = <0x0 0x1>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
+		};
+
+		cpu_e2: cpu@2 {
+			device_type = "cpu";
+			compatible = "apple,hidra-e";
+			reg = <0x0 0x2>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
+		};
+
+		cpu_e3: cpu@3 {
+			device_type = "cpu";
+			compatible = "apple,hidra-e";
+			reg = <0x0 0x3>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
+		};
+
+		cpu_e4: cpu@4 {
+			device_type = "cpu";
+			compatible = "apple,hidra-e";
+			reg = <0x0 0x4>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
+		};
+
+		cpu_e5: cpu@5 {
+			device_type = "cpu";
+			compatible = "apple,hidra-e";
+			reg = <0x0 0x5>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
+		};
+
+		cpu_p0: cpu@10100 {
+			device_type = "cpu";
+			compatible = "apple,hidra-p";
+			reg = <0x0 0x10100>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
+		};
+
+		cpu_p1: cpu@10101 {
+			device_type = "cpu";
+			compatible = "apple,hidra-p";
+			reg = <0x0 0x10101>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
+		};
+
+		cpu_p2: cpu@10102 {
+			device_type = "cpu";
+			compatible = "apple,hidra-p";
+			reg = <0x0 0x10102>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
+		};
+
+		cpu_p3: cpu@10103 {
+			device_type = "cpu";
+			compatible = "apple,hidra-p";
+			reg = <0x0 0x10103>;
+			cpu-release-addr = <0 0>;
+			enable-method = "spin-table";
+
+			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
+		};
+
+		l2_cache_0: l2-cache-0 {
+			compatible = "cache";
+			cache-level = <2>;
+			cache-size = <0x600000>;
+			cache-unified;
+		};
+
+		l2_cache_1: l2-cache-1 {
+			compatible = "cache";
+			cache-level = <2>;
+			cache-size = <0x1000000>;
+			cache-unified;
+		};
+	};
+
+	soc: soc {
+		compatible = "simple-bus";
+		ranges;
+		#address-cells = <2>;
+		nonposted-mmio;
+		#size-cells = <2>;
+
+		pmgr: power-management@380700000 {
+			compatible = "apple,t8142-pmgr", "apple,t8103-pmgr",
+				     "syscon", "simple-mfd";
+			reg = <0x3 0x80700000 0 0x14000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			/* child nodes are added in t8142-pmgr.dtsi */
+		};
+
+		aic: interrupt-controller@381000000 {
+			compatible = "apple,t8142-aic3", "apple,t8122-aic3";
+			reg = <0x3 0x81000000 0x0 0x1cc000>,
+			      <0x3 0x81040000 0x0 0x4000>;
+			reg-names = "core", "event";
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			power-domains = <&ps_aic>;
+
+			affinities {
+				e-core-pmu-affinity {
+					cpus = <&cpu_e0 &cpu_e1 &cpu_e2
+						&cpu_e3 &cpu_e4 &cpu_e5>;
+					apple,fiq-index = <AIC_CPU_PMU_E>;
+				};
+
+				p-core-pmu-affinity {
+					cpus = <&cpu_p0 &cpu_p1
+						&cpu_p2 &cpu_p3>;
+					apple,fiq-index = <AIC_CPU_PMU_P>;
+				};
+			};
+		};
+
+		pinctrl_nub: pinctrl@3881f0000 {
+			compatible = "apple,t8142-pinctrl",
+				     "apple,t8140-pinctrl";
+			reg = <0x3 0x881f0000 0x0 0x4000>;
+
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl_nub 0 0 40>;
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 574 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 575 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 576 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 577 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 578 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 579 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 580 IRQ_TYPE_LEVEL_HIGH>;
+
+			power-domains = <&ps_nub_gpio>;
+			apple,npins = <40>;
+		};
+
+		pmgr_mini: power-management@388280000 {
+			compatible = "apple,t8142-pmgr", "apple,t8103-pmgr",
+				     "syscon", "simple-mfd";
+			reg = <0x3 0x88280000 0 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			/* child nodes are added in t8142-pmgr.dtsi */
+		};
+
+		wdt: watchdog@3882b0000 {
+			compatible = "apple,t8142-wdt", "apple,t8103-wdt";
+			reg = <0x3 0x882b0000 0x0 0x4000>;
+			clocks = <&clkref>;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 507 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		pinctrl_smc: pinctrl@38c820000 {
+			compatible = "apple,t8142-pinctrl",
+				     "apple,t8140-pinctrl";
+			reg = <0x3 0x8c820000 0x0 0x4000>;
+
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl_smc 0 0 18>;
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 624 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 625 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
+
+			apple,npins = <18>;
+		};
+
+		pinctrl_aop: pinctrl@390824000 {
+			compatible = "apple,t8142-pinctrl",
+				     "apple,t8140-pinctrl";
+			reg = <0x3 0x90824000 0x0 0x4000>;
+
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl_aop 0 0 77>;
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 480 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 481 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 482 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 483 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 484 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 485 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 486 IRQ_TYPE_LEVEL_HIGH>;
+
+			apple,npins = <77>;
+		};
+
+		pinctrl_ap: pinctrl@39a000000 {
+			compatible = "apple,t8142-pinctrl",
+				     "apple,t8140-pinctrl";
+			reg = <0x3 0x9a000000 0x0 0x100000>;
+
+			#gpio-cells = <2>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl_ap 0 0 224>;
+			gpio-reserved-ranges = <78 1>, <203 1>;
+
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 348 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 349 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 350 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 351 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 352 IRQ_TYPE_LEVEL_HIGH>,
+				     <AIC_IRQ 353 IRQ_TYPE_LEVEL_HIGH>;
+
+			power-domains = <&ps_gpio>;
+			apple,npins = <224>;
+
+			i2c0_pins: i2c0-pins {
+				pinmux = <APPLE_PINMUX(106, 1)>,
+					 <APPLE_PINMUX(105, 1)>;
+			};
+
+			i2c1_pins: i2c1-pins {
+				pinmux = <APPLE_PINMUX(108, 1)>,
+					 <APPLE_PINMUX(107, 1)>;
+			};
+
+			i2c2_pins: i2c2-pins {
+				pinmux = <APPLE_PINMUX(45, 1)>,
+					 <APPLE_PINMUX(44, 1)>;
+			};
+
+			i2c3_pins: i2c3-pins {
+				pinmux = <APPLE_PINMUX(43, 1)>,
+					 <APPLE_PINMUX(42, 1)>;
+			};
+
+			i2c4_pins: i2c4-pins {
+				pinmux = <APPLE_PINMUX(110, 1)>,
+					 <APPLE_PINMUX(109, 1)>;
+			};
+		};
+
+		i2c0: i2c@3a5010000 {
+			compatible = "apple,t8142-i2c", "apple,t8103-i2c";
+			reg = <0x3 0xa5010000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
+			clocks = <&clkref>;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 1062 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-0 = <&i2c0_pins>;
+			pinctrl-names = "default";
+			power-domains = <&ps_i2c0>;
+			#size-cells = <0x0>;
+
+			status = "disabled";
+		};
+
+		i2c1: i2c@3a5014000 {
+			compatible = "apple,t8142-i2c", "apple,t8103-i2c";
+			reg = <0x3 0xa5014000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
+			clocks = <&clkref>;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 1063 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-0 = <&i2c1_pins>;
+			pinctrl-names = "default";
+			power-domains = <&ps_i2c1>;
+			#size-cells = <0x0>;
+
+			status = "disabled";
+		};
+
+		i2c2: i2c@3a5018000 {
+			compatible = "apple,t8142-i2c", "apple,t8103-i2c";
+			reg = <0x3 0xa5018000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
+			clocks = <&clkref>;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 1064 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-0 = <&i2c2_pins>;
+			pinctrl-names = "default";
+			power-domains = <&ps_i2c2>;
+			#size-cells = <0x0>;
+
+			status = "disabled";
+		};
+
+		i2c3: i2c@3a501c000 {
+			compatible = "apple,t8142-i2c", "apple,t8103-i2c";
+			reg = <0x3 0xa501c000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
+			clocks = <&clkref>;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 1065 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-0 = <&i2c3_pins>;
+			pinctrl-names = "default";
+			power-domains = <&ps_i2c3>;
+			#size-cells = <0x0>;
+
+			status = "disabled";
+		};
+
+		i2c4: i2c@3a5020000 {
+			compatible = "apple,t8142-i2c", "apple,t8103-i2c";
+			reg = <0x3 0xa5020000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
+			clocks = <&clkref>;
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 1066 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-0 = <&i2c4_pins>;
+			pinctrl-names = "default";
+			power-domains = <&ps_i2c4>;
+			#size-cells = <0x0>;
+
+			status = "disabled";
+		};
+
+		fpwm0: pwm@3a5040000 {
+			compatible = "apple,t8142-fpwm", "apple,s5l-fpwm";
+			reg = <0x3 0xa5040000 0x0 0x4000>;
+
+			clocks = <&clkref>;
+			power-domains = <&ps_fpwm0>;
+			#pwm-cells = <2>;
+
+			status = "disabled";
+		};
+
+		serial0: serial@3a5200000 {
+			compatible = "apple,s5l-uart";
+			reg = <0x3 0xa5200000 0x0 0x1000>;
+
+			clocks = <&clkref>, <&clkref>;
+			clock-names = "uart", "clk_uart_baud0";
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 1231 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&ps_uart0>;
+			reg-io-width = <4>;
+
+			status = "disabled";
+		};
+
+		pmgr_gfx: power-management@580e80000 {
+			compatible = "apple,t8142-pmgr", "apple,t8103-pmgr",
+				     "syscon", "simple-mfd";
+			reg = <0x5 0x80e80000 0 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupt-parent = <&aic>;
+		interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
+			     <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
+			     <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
+			     <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
+	};
+};
+
+#include "t8142-pmgr.dtsi"

-- 
2.56.0

Re: [PATCH v3 7/9] dt-bindings: i2c: apple,i2c: Add t8142 compatible

[Wolfram Sang]

On Fri, Nov 06, 2026 at 10:24:56PM +0100, Yureka Lilian wrote:
> The i2c block on the Apple Silicon T8142 (M5) SoC is compatible with
> t8103. Add "apple,t8142-i2c" as SoC specific compatible under
> "apple,t8103-i2c".
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>

Same comment/question, as for T8140. Better via apple tree, or?

Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Re: [PATCH v3 5/9] dt-bindings: pwm: apple,s5l-fpwm: Add t8142 compatible

[Uwe Kleine-König]

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On Fri, Nov 06, 2026 at 10:24:54PM +0100, Yureka Lilian wrote:
> The PWM controller on the Apple silicon t8142 (M5) SoC is compatible
> with t8103. Add "apple,t8142-fpwm" as SoC specific compatible under
> "apple,s5l-fpwm".
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>

Fine for me to let this go through apple-soc.

Acked-by: Uwe Kleine-König <ukleinek@kernel.org>

(I already wrote this in reply to v2 on the same day v3 was sent. So
just forwarding the tag for v3.)

Best regards
Uwe

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Re: [PATCH v3 5/9] dt-bindings: pwm: apple,s5l-fpwm: Add t8142 compatible

[Uwe Kleine-König]

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Hello,

On Sun, Nov 08, 2026 at 09:43:37AM +0100, Uwe Kleine-König wrote:
> On Fri, Nov 06, 2026 at 10:24:54PM +0100, Yureka Lilian wrote:
> > The PWM controller on the Apple silicon t8142 (M5) SoC is compatible
> > with t8103. Add "apple,t8142-fpwm" as SoC specific compatible under
> > "apple,s5l-fpwm".
> > 
> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> > Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
> 
> Fine for me to let this go through apple-soc.
> 
> Acked-by: Uwe Kleine-König <ukleinek@kernel.org>
> 
> (I already wrote this in reply to v2 on the same day v3 was sent. So
> just forwarding the tag for v3.)

Oh, however I already acked the (implicit) v1 on Oct 27[1], please make
sure to pick up tags when sending out a new revision (or mention why you
didn't) to save maintainer time.

Thanks
Uwe

[1] https://lore.kernel.org/all/auBgZhx0qcbAgHnF@monoceros/

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