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From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Heiko Stuebner <heiko@sntech.de>
Cc: broonie@kernel.org, linux-spi@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, quentin.schulz@cherry.de,
	 Lee Jones <lee@kernel.org>,
	Heiko Stuebner <heiko.stuebner@cherry.de>
Subject: Re: [PATCH v2 6/6] spi: rockchip: Add an atomic transfer function
Date: Fri, 13 Nov 2026 20:04:27 +0100	[thread overview]
Message-ID: <avddeGqlBywKn53D@venus> (raw)
In-Reply-To: <20261113135017.1047959-7-heiko@sntech.de>

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Hi,

On Fri, Nov 13, 2026 at 02:50:17PM +0100, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@cherry.de>
> 
> Rockchip SPI controllers are often used to handle SPI connected PMICs that
> also handle system power-off events, like the RK806.
> 
> When the kernel signals the power-off, all the interrupts are already
> disabled, so regular SPI with its mutexes and DMA transfers does not
> work anymore.
> 
> Implement an atomic transfer function that does SPI transfers polling the
> controller in a loop without any DMA or IRQ.
> 
> This can successfully handle the power-off command to RK806, but also
> read back the 2 chip-id registers just fine before that, as a test.
> 
> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
> ---
> [...]
> +static int rockchip_spi_transfer_atomic(struct spi_device *spi, struct spi_message *msg)
> +{
> +	struct spi_controller *ctlr = spi->controller;
> +	struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
> +	struct spi_transfer *xfer;
> +	int ret = 0;
> +
> +	spi_set_cs(spi, true, false);

I think it's sensible to avoid SErrors in case something went wrong
with the preparation:

if (!pm_runtime_active(rs->dev)) {
    dev_err(rs->dev, "Failed to do atomic SPI transfer due to runtime suspend\n");
    ret = -EIO;
    goto out;
}

> +
> +	/* make sure all interrupts are masked and status cleared */
> +	writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
> +	writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
>
> [...]

Greetings, 

-- Sebastian

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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Heiko Stuebner <heiko@sntech.de>
Cc: broonie@kernel.org, linux-spi@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, quentin.schulz@cherry.de,
	 Lee Jones <lee@kernel.org>,
	Heiko Stuebner <heiko.stuebner@cherry.de>
Subject: Re: [PATCH v2 6/6] spi: rockchip: Add an atomic transfer function
Date: Fri, 13 Nov 2026 20:04:27 +0100	[thread overview]
Message-ID: <avddeGqlBywKn53D@venus> (raw)
In-Reply-To: <20261113135017.1047959-7-heiko@sntech.de>


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Hi,

On Fri, Nov 13, 2026 at 02:50:17PM +0100, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@cherry.de>
> 
> Rockchip SPI controllers are often used to handle SPI connected PMICs that
> also handle system power-off events, like the RK806.
> 
> When the kernel signals the power-off, all the interrupts are already
> disabled, so regular SPI with its mutexes and DMA transfers does not
> work anymore.
> 
> Implement an atomic transfer function that does SPI transfers polling the
> controller in a loop without any DMA or IRQ.
> 
> This can successfully handle the power-off command to RK806, but also
> read back the 2 chip-id registers just fine before that, as a test.
> 
> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
> ---
> [...]
> +static int rockchip_spi_transfer_atomic(struct spi_device *spi, struct spi_message *msg)
> +{
> +	struct spi_controller *ctlr = spi->controller;
> +	struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
> +	struct spi_transfer *xfer;
> +	int ret = 0;
> +
> +	spi_set_cs(spi, true, false);

I think it's sensible to avoid SErrors in case something went wrong
with the preparation:

if (!pm_runtime_active(rs->dev)) {
    dev_err(rs->dev, "Failed to do atomic SPI transfer due to runtime suspend\n");
    ret = -EIO;
    goto out;
}

> +
> +	/* make sure all interrupts are masked and status cleared */
> +	writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
> +	writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
>
> [...]

Greetings, 

-- Sebastian

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  reply	other threads:[~2026-11-13 19:04 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-13 13:50 [PATCH v2 0/6] spi: Implement a atomic transfer as a last resort Heiko Stuebner
2026-11-13 13:50 ` Heiko Stuebner
2026-11-13 13:50 ` [PATCH v2 1/6] spi: Allow spi_delay_exec() to be used from atomic contexts Heiko Stuebner
2026-11-13 13:50   ` Heiko Stuebner
2026-11-13 13:50 ` [PATCH v2 2/6] spi: Export spi_set_cs() function Heiko Stuebner
2026-11-13 13:50   ` Heiko Stuebner
2026-11-13 13:56   ` Heiko Stübner
2026-11-13 13:56     ` Heiko Stübner
2026-11-13 18:30     ` Heiko Stuebner
2026-11-13 18:30       ` Heiko Stuebner
2026-11-13 13:50 ` [PATCH v2 3/6] spi: Add infrastructure for atomic sync transfers Heiko Stuebner
2026-11-13 13:50   ` Heiko Stuebner
2026-11-13 13:50 ` [PATCH v2 4/6] spi: rockchip: Fix runtime resume error handling Heiko Stuebner
2026-11-13 13:50   ` Heiko Stuebner
2026-11-13 13:50 ` [PATCH v2 5/6] spi: rockchip: Move to pm_runtime_resume_and_get Heiko Stuebner
2026-11-13 13:50   ` Heiko Stuebner
2026-11-13 13:50 ` [PATCH v2 6/6] spi: rockchip: Add an atomic transfer function Heiko Stuebner
2026-11-13 13:50   ` Heiko Stuebner
2026-11-13 19:04   ` Sebastian Reichel [this message]
2026-11-13 19:04     ` Sebastian Reichel

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