From: guenther@tum.de (Stephan Günther)
Subject: [PATCH] nvme: prepare support for Apple NVMe controller
Date: Tue, 3 Nov 2015 21:43:34 +0100 [thread overview]
Message-ID: <b02c090484e910da98458776b63682b0@localhost> (raw)
In-Reply-To: <20151103130206.GA19495@infradead.org>
On 2015/November/03 05:02, Christoph Hellwig wrote:
> On Thu, Oct 29, 2015@09:10:56AM -0600, Jon Derrick wrote:
> > > +#define readq lo_hi_readq
> > > +#define writeq lo_hi_writeq
> > > +
> >
> > Good job figuring that one out. But this should be a quirk:
> > a) It will sacrifice some io cycles on other devices
> > b) It may get lost at some point in the name of performance
> >
> > Christoph recently added a quirks mechanism where I think it would fit
>
> We never access 64 bit registers in the fast path. I'd be fine to
> apply the patch from Stephan as-is as long as we document in detail why
> we are doing this. Stephan, can you respin the patch with a comment
> and also with the PCI ID for the Apple controller added to the ID table?
We are testing the new version of the patch and will submit it
afterwards.
prev parent reply other threads:[~2015-11-03 20:43 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-29 14:38 [PATCH] nvme: prepare support for Apple NVMe controller Stephan Günther
2015-10-29 15:10 ` Jon Derrick
2015-10-29 16:36 ` Vedant Lath
2015-10-29 17:59 ` Stephan Günther
2015-10-31 22:34 ` Vedant Lath
2015-10-29 19:46 ` Stephan Günther
2015-10-29 20:31 ` Keith Busch
2015-10-29 20:41 ` Stephan Günther
2015-11-03 13:02 ` Christoph Hellwig
2015-11-03 20:43 ` Stephan Günther [this message]
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