Re: [PATCH v2 3/8] media: platform: amd: Add helpers to configure isp4 mipi phy

["Du, Bin" <bin.du@amd.com>]

Thanks Laurent Pinchart for your review

On 8/5/2025 6:39 PM, Laurent Pinchart wrote:
> On Mon, Jul 28, 2025 at 06:33:30AM +0000, Sakari Ailus wrote:
>> On Wed, Jun 18, 2025 at 05:19:54PM +0800, Bin Du wrote:
>>> The helper functions is for configuring, starting and stop the MIPI PHY.
>>> All configurations related to MIPI PHY configuration and calibration
>>> parameters are encapsulated in two helper functions: start and stop
>>> mipi phy.
>>>
>>> Signed-off-by: Bin Du <Bin.Du@amd.com>
>>> Signed-off-by: Svetoslav Stoilov <Svetoslav.Stoilov@amd.com>
>>> ---
>>>   drivers/media/platform/amd/isp4/Makefile   |    1 +
>>>   drivers/media/platform/amd/isp4/isp4_phy.c | 1547 ++++++++++++++++++++
>>>   drivers/media/platform/amd/isp4/isp4_phy.h |   14 +
>>>   3 files changed, 1562 insertions(+)
>>>   create mode 100644 drivers/media/platform/amd/isp4/isp4_phy.c
>>>   create mode 100644 drivers/media/platform/amd/isp4/isp4_phy.h
> 
> [snip]
> 
>>> diff --git a/drivers/media/platform/amd/isp4/isp4_phy.c b/drivers/media/platform/amd/isp4/isp4_phy.c
>>> new file mode 100644
>>> index 000000000000..8d31a21074bb
>>> --- /dev/null
>>> +++ b/drivers/media/platform/amd/isp4/isp4_phy.c
>>> @@ -0,0 +1,1547 @@
> 
> [snip]
> 
>>> +union isp4phy_mipi_0 {
>>> +	struct {
>>> +		u32 shutdownz : 1;
>>> +		u32 rstz : 1;
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_1 {
>>> +	struct {
>>> +		u32 mode : 1;
>>
>> Please pad these -- I don't think the ABI otherwise requires they're in a
>> particular location of the container (u32).
> 
> Or better, ditch the structures, and use macros to define register
> fields like all other drivers do.
> 

Sure, will look into it and update in the next patch

>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_2 {
>>> +	struct {
>>> +		u32 rxdatawidthhs_0 : 2;
>>> +		u32 rxdatawidthhs_1 : 2;
>>> +		u32 rxdatawidthhs_2 : 2;
>>> +		u32 rxdatawidthhs_3 : 2;
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +struct isp4phy_mipi_3 {
>>> +	u32 reserved;
>>> +};
>>> +
>>> +union isp4phy_mipi_4 {
>>> +	struct {
>>> +		u32 enableclk : 1;
>>> +		u32 enable_0 : 1;
>>> +		u32 enable_1 : 1;
>>> +		u32 enable_2 : 1;
>>> +		u32 enable_3 : 1;
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_5 {
>>> +	struct {
>>> +		u32 forcerxmode_0 : 1;
>>> +		u32 forcerxmode_1 : 1;
>>> +		u32 forcerxmode_2 : 1;
>>> +		u32 forcerxmode_3 : 1;
>>> +		u32 forcerxmode_clk : 1;
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_6 {
>>> +	struct {
>>> +		u32 turndisable_0 : 1;
>>> +		u32 turndisable_1 : 1;
>>> +		u32 turndisable_2 : 1;
>>> +		u32 turndisable_3 : 1;
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_7 {
>>> +	struct {
>>> +		u32 ready : 1;
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_ind_idx {
>>> +	struct {
>>> +		u32 addr : 16;
>>
>> u16 would seem appropriate here.
>>
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_ind_data {
>>> +	struct {
>>> +		u32 data : 16;
>>
>> Ditto.
>>
>>> +	} bit;
>>> +	u32 value;
>>> +};
>>> +
>>> +union isp4phy_mipi_ind_wack {
>>> +	struct {
>>> +		u32 ack : 1;
>>> +		u32 pslverr : 1;
>>> +	} bit;
>>> +	u32 value;
>>> +};
> 
> [snip]
> 

Regards,
Bin