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From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@gmail.com>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	freedreno@lists.freedesktop.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	dri-devel@lists.freedesktop.org,
	iommu@lists.linux-foundation.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCHv9 2/8] iommu/arm-smmu: Add domain attribute for pagetable configuration
Date: Wed, 25 Nov 2020 12:28:18 +0530	[thread overview]
Message-ID: <b56ec844e2c059d0c6d8de3424a0cce7@codeaurora.org> (raw)
In-Reply-To: <20201124214134.GB14252@willie-the-truck>

On 2020-11-25 03:11, Will Deacon wrote:
> On Mon, Nov 23, 2020 at 10:35:55PM +0530, Sai Prakash Ranjan wrote:
>> Add iommu domain attribute for pagetable configuration which
>> initially will be used to set quirks like for system cache aka
>> last level cache to be used by client drivers like GPU to set
>> right attributes for caching the hardware pagetables into the
>> system cache and later can be extended to include other page
>> table configuration data.
>> 
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>>  drivers/iommu/arm/arm-smmu/arm-smmu.c | 20 ++++++++++++++++++++
>>  drivers/iommu/arm/arm-smmu/arm-smmu.h |  1 +
>>  include/linux/io-pgtable.h            |  4 ++++
>>  include/linux/iommu.h                 |  1 +
>>  4 files changed, 26 insertions(+)
> 
> Given that we're heading for a v10 to address my comments on patch 3,
> then I guess you may as well split this into two patches so that I can
> share just the atttibute with Rob rather than the driver parts.
> 
> Please keep it all as one series though, with the common parts at the
> beginning, and I'll figure it out.
> 

Ok I will split up and send v10.

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>
Cc: linux-kernel@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	dri-devel@lists.freedesktop.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv9 2/8] iommu/arm-smmu: Add domain attribute for pagetable configuration
Date: Wed, 25 Nov 2020 12:28:18 +0530	[thread overview]
Message-ID: <b56ec844e2c059d0c6d8de3424a0cce7@codeaurora.org> (raw)
In-Reply-To: <20201124214134.GB14252@willie-the-truck>

On 2020-11-25 03:11, Will Deacon wrote:
> On Mon, Nov 23, 2020 at 10:35:55PM +0530, Sai Prakash Ranjan wrote:
>> Add iommu domain attribute for pagetable configuration which
>> initially will be used to set quirks like for system cache aka
>> last level cache to be used by client drivers like GPU to set
>> right attributes for caching the hardware pagetables into the
>> system cache and later can be extended to include other page
>> table configuration data.
>> 
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>>  drivers/iommu/arm/arm-smmu/arm-smmu.c | 20 ++++++++++++++++++++
>>  drivers/iommu/arm/arm-smmu/arm-smmu.h |  1 +
>>  include/linux/io-pgtable.h            |  4 ++++
>>  include/linux/iommu.h                 |  1 +
>>  4 files changed, 26 insertions(+)
> 
> Given that we're heading for a v10 to address my comments on patch 3,
> then I guess you may as well split this into two patches so that I can
> share just the atttibute with Rob rather than the driver parts.
> 
> Please keep it all as one series though, with the common parts at the
> beginning, and I'll figure it out.
> 

Ok I will split up and send v10.

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>
Cc: linux-kernel@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	dri-devel@lists.freedesktop.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv9 2/8] iommu/arm-smmu: Add domain attribute for pagetable configuration
Date: Wed, 25 Nov 2020 12:28:18 +0530	[thread overview]
Message-ID: <b56ec844e2c059d0c6d8de3424a0cce7@codeaurora.org> (raw)
In-Reply-To: <20201124214134.GB14252@willie-the-truck>

On 2020-11-25 03:11, Will Deacon wrote:
> On Mon, Nov 23, 2020 at 10:35:55PM +0530, Sai Prakash Ranjan wrote:
>> Add iommu domain attribute for pagetable configuration which
>> initially will be used to set quirks like for system cache aka
>> last level cache to be used by client drivers like GPU to set
>> right attributes for caching the hardware pagetables into the
>> system cache and later can be extended to include other page
>> table configuration data.
>> 
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>>  drivers/iommu/arm/arm-smmu/arm-smmu.c | 20 ++++++++++++++++++++
>>  drivers/iommu/arm/arm-smmu/arm-smmu.h |  1 +
>>  include/linux/io-pgtable.h            |  4 ++++
>>  include/linux/iommu.h                 |  1 +
>>  4 files changed, 26 insertions(+)
> 
> Given that we're heading for a v10 to address my comments on patch 3,
> then I guess you may as well split this into two patches so that I can
> share just the atttibute with Rob rather than the driver parts.
> 
> Please keep it all as one series though, with the common parts at the
> beginning, and I'll figure it out.
> 

Ok I will split up and send v10.

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2020-11-25  6:58 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-23 17:05 [PATCHv9 0/8] System Cache support for GPU and required SMMU support Sai Prakash Ranjan
2020-11-23 17:05 ` Sai Prakash Ranjan
2020-11-23 17:05 ` Sai Prakash Ranjan
2020-11-23 17:05 ` [PATCHv9 1/8] iommu/io-pgtable-arm: Add support to use system cache Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05 ` [PATCHv9 2/8] iommu/arm-smmu: Add domain attribute for pagetable configuration Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-24 21:41   ` Will Deacon
2020-11-24 21:41     ` Will Deacon
2020-11-24 21:41     ` Will Deacon
2020-11-24 21:41     ` Will Deacon
2020-11-25  6:58     ` Sai Prakash Ranjan [this message]
2020-11-25  6:58       ` Sai Prakash Ranjan
2020-11-25  6:58       ` Sai Prakash Ranjan
2020-11-23 17:05 ` [PATCHv9 3/8] iommu/arm-smmu: Move non-strict mode to use io_pgtable_domain_attr Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-24 21:39   ` Will Deacon
2020-11-24 21:39     ` Will Deacon
2020-11-24 21:39     ` Will Deacon
2020-11-24 21:39     ` Will Deacon
2020-11-25  5:36     ` Sai Prakash Ranjan
2020-11-25  5:36       ` Sai Prakash Ranjan
2020-11-25  5:36       ` Sai Prakash Ranjan
2020-11-23 17:05 ` [PATCHv9 4/8] drm/msm: rearrange the gpu_rmw() function Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05 ` [PATCHv9 5/8] drm/msm/a6xx: Add support for using system cache(LLC) Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05 ` [PATCHv9 6/8] drm/msm/a6xx: Add support for using system cache on MMU500 based targets Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:05   ` Sai Prakash Ranjan
2020-11-23 17:06 ` [PATCHv9 7/8] iommu: arm-smmu-impl: Use table to list QCOM implementations Sai Prakash Ranjan
2020-11-23 17:06   ` Sai Prakash Ranjan
2020-11-23 17:06   ` Sai Prakash Ranjan
2020-11-23 17:06 ` [PATCHv9 8/8] iommu: arm-smmu-impl: Add a space before open parenthesis Sai Prakash Ranjan
2020-11-23 17:06   ` Sai Prakash Ranjan
2020-11-23 17:06   ` Sai Prakash Ranjan

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