From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Gupta, Anshuman" <anshuman.gupta@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [v2] drm/i915/display: Add an extra vblank wait before fbc activation
Date: Mon, 17 Aug 2020 12:48:28 +0000 [thread overview]
Message-ID: <b76e90742647452fb97da180b75cb873@intel.com> (raw)
In-Reply-To: <20200817121923.GL30770@intel.com>
> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Monday, August 17, 2020 5:49 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [v2] drm/i915/display: Add an extra vblank wait before fbc
> activation
>
> On 2020-08-17 at 16:55:29 +0530, Uma Shankar wrote:
> > Add an extra vblank before fbc is activated.
> > WA: 1409689360
> > Corruption with FBC around plane 1A enabling. In the Frame Buffer
> > Compression programming sequence "Display Plane Enabling with FBC"
> > add a wait for vblank between plane enabling step 1 and FBC enabling
> > step 2.
> >
> > v2: Add wait only for active crtc
> >
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_fbc.c | 7 +++++--
> > 1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 2ab32e6532ff..2a9d4796c4a8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1085,10 +1085,13 @@ static void __intel_fbc_post_update(struct
> intel_crtc *crtc)
> > if (!intel_fbc_can_activate(crtc))
> > return;
> >
> > - if (!fbc->busy_bits)
> > + if (!fbc->busy_bits) {
> > + if (IS_TIGERLAKE(dev_priv))
> > + intel_wait_for_vblank_if_active(dev_priv, crtc->pipe);
> IMHO with this we are also adding a VBLANK wait when fbc is getting enabled
> from frontbuffer flush flow intel_fbc_flush(), i am being afraid if there could be
> unnecessary VBLANK wait here.
This is just ensuring that we let the update happen after vblank go, so that double buffered
registers get latched to the new values of watermarks etc, later the fbc gets activated.
This is a bit delicate I agree, and we need to check for corner cases if this causes any issue.
Best solution for this will be to activate fbc very close to vblank or within the vblank if we want to be
100% sure.
Regards,
Uma Shankar
> Thanks,
> Anshuman Gupta.
> > intel_fbc_hw_activate(dev_priv);
> > - else
> > + } else {
> > intel_fbc_deactivate(dev_priv, "frontbuffer write");
> > + }
> > }
> >
> > void intel_fbc_post_update(struct intel_atomic_state *state,
> > --
> > 2.22.0
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-08-17 12:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-17 11:25 [Intel-gfx] [v2] drm/i915/display: Add an extra vblank wait before fbc activation Uma Shankar
2020-08-17 11:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add an extra vblank wait before fbc activation (rev2) Patchwork
2020-08-17 12:19 ` [Intel-gfx] [v2] drm/i915/display: Add an extra vblank wait before fbc activation Anshuman Gupta
2020-08-17 12:48 ` Shankar, Uma [this message]
2020-08-17 13:18 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Add an extra vblank wait before fbc activation (rev2) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b76e90742647452fb97da180b75cb873@intel.com \
--to=uma.shankar@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.