[PATCH v3 0/4] riscv: spacemit: Add support for K3 Pico-ITX board

[PATCH v3 0/4] riscv: spacemit: Add support for K3 Pico-ITX board

[Yixun Lan]

Add initial support for SpacemiT K3 Pico-ITX board, the config file
will enable all basic components which make it able to run into U-Boot
serial console.

The series actually depend on previous sent patches, I'm not adding
dependency to this series, but list it here for reference.

Pinctrl:
 https://patch.msgid.link/20260923-01-k3-pinctrl-support-v2-0-e76a917ee252@kernel.org

GPIO:
 https://patch.msgid.link/20260822-01-gpio-pinctrl-support-v1-1-6be2f4c71c5d@kernel.org

clock and reset:
 https://patch.msgid.link/20260923-01-k3-clock-reset-support-v2-0-6ec0abb1c7b5@kernel.org

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
Changes in v3:
- rename header and dtsi file with vendor prefix
- Link to v2: https://patch.msgid.link/20261002-00-basic-spacemit-k3-v2-0-fd6779a0317c@kernel.org

Changes in v2:
- drop board_get_usable_ram_top()
- drop empty source file
- Link to v1: https://patch.msgid.link/20260923-00-basic-spacemit-k3-v1-0-fa1015f2cd1b@kernel.org

---
Yixun Lan (4):
      board: spacemit: add SpacemiT K3 Pico-ITX
      riscv: dts: spacemit: k3: add binman node
      configs: spacemit: Add K3 default configuration
      doc: spacemit: k3: Add Pico-ITX board

 arch/riscv/Kconfig                       |   5 +
 arch/riscv/cpu/k3/Kconfig                |  18 +++
 arch/riscv/cpu/k3/Makefile               |   5 +
 arch/riscv/cpu/k3/dram.c                 |  21 ++++
 arch/riscv/dts/spacemit-k3-u-boot.dtsi   |   6 +
 board/spacemit/k3/Kconfig                |  30 +++++
 board/spacemit/k3/MAINTAINERS            |   8 ++
 configs/spacemit_k3_defconfig            |  51 ++++++++
 doc/board/spacemit/index.rst             |   1 +
 doc/board/spacemit/spacemit-pico-itx.rst | 204 +++++++++++++++++++++++++++++++
 include/configs/spacemit-k3.h            |  13 ++
 11 files changed, 362 insertions(+)
---
base-commit: cf615aafae36fc49f55e3e6a3648d29201b26d51
change-id: 20260921-00-basic-spacemit-k3-838119645d39

Best regards,
--  
Yixun Lan <dlan@kernel.org>

[PATCH v3 1/4] board: spacemit: add SpacemiT K3 Pico-ITX

[Yixun Lan]

Add initial support for K3 Pico-ITX board, in this version, the DRAM
information is parsed from DTS "/memory" node. And with UART enabled,
the U-Boot serial console works fine now.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 arch/riscv/Kconfig            |  5 +++++
 arch/riscv/cpu/k3/Kconfig     | 18 ++++++++++++++++++
 arch/riscv/cpu/k3/Makefile    |  5 +++++
 arch/riscv/cpu/k3/dram.c      | 21 +++++++++++++++++++++
 board/spacemit/k3/Kconfig     | 30 ++++++++++++++++++++++++++++++
 board/spacemit/k3/MAINTAINERS |  8 ++++++++
 include/configs/spacemit-k3.h | 13 +++++++++++++
 7 files changed, 100 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c1b2890f1f3..386241efd4a 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -53,6 +53,9 @@ config TARGET_SIPEED_MAIX
 config TARGET_SPACEMIT_K1
 	bool "Support Spacemit K1 SoC"
 
+config TARGET_SPACEMIT_K3
+	bool "Support SpacemiT K3 SoC"
+
 config TARGET_STARFIVE_VISIONFIVE2
 	bool "Support StarFive VisionFive2 Board"
 	select BOARD_LATE_INIT
@@ -124,6 +127,7 @@ source "board/sophgo/milkv_duo/Kconfig"
 source "board/sophgo/milkv_duo_256m/Kconfig"
 source "board/sophgo/licheerv_nano/Kconfig"
 source "board/spacemit/k1/Kconfig"
+source "board/spacemit/k3/Kconfig"
 source "board/starfive/visionfive2/Kconfig"
 source "board/thead/th1520_lpi4a/Kconfig"
 source "board/xilinx/mbv/Kconfig"
@@ -138,6 +142,7 @@ source "arch/riscv/cpu/mpfs/Kconfig"
 source "arch/riscv/cpu/generic/Kconfig"
 source "arch/riscv/cpu/jh7110/Kconfig"
 source "arch/riscv/cpu/k1/Kconfig"
+source "arch/riscv/cpu/k3/Kconfig"
 source "arch/riscv/cpu/k230/Kconfig"
 source "arch/riscv/cpu/th1520/Kconfig"
 
diff --git a/arch/riscv/cpu/k3/Kconfig b/arch/riscv/cpu/k3/Kconfig
new file mode 100644
index 00000000000..5474ac11243
--- /dev/null
+++ b/arch/riscv/cpu/k3/Kconfig
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
+
+if TARGET_SPACEMIT_K3
+
+config SPACEMIT_K3
+	bool
+	select BINMAN
+	select ARCH_EARLY_INIT_R
+	select SYS_CACHE_SHIFT_6
+	imply CPU
+	imply CPU_RISCV
+	imply RISCV_TIMER if RISCV_SMODE
+	imply CMD_CPU
+	imply OF_UPSTREAM
+
+endif
diff --git a/arch/riscv/cpu/k3/Makefile b/arch/riscv/cpu/k3/Makefile
new file mode 100644
index 00000000000..fba4e4b0a3f
--- /dev/null
+++ b/arch/riscv/cpu/k3/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
+
+obj-y += dram.o
diff --git a/arch/riscv/cpu/k3/dram.c b/arch/riscv/cpu/k3/dram.c
new file mode 100644
index 00000000000..e20d35dc1bf
--- /dev/null
+++ b/arch/riscv/cpu/k3/dram.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
+ */
+
+#include <fdtdec.h>
+#include <init.h>
+#include <linux/sizes.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+	return fdtdec_setup_memory_banksize();
+}
diff --git a/board/spacemit/k3/Kconfig b/board/spacemit/k3/Kconfig
new file mode 100644
index 00000000000..1a63c73b6bb
--- /dev/null
+++ b/board/spacemit/k3/Kconfig
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
+
+if TARGET_SPACEMIT_K3
+
+config SYS_BOARD
+	default "k3"
+
+config SYS_VENDOR
+	default "spacemit"
+
+config SYS_CPU
+	default "k3"
+
+config SYS_CONFIG_NAME
+	default "spacemit-k3"
+
+config TEXT_BASE
+	default 0x102000000
+
+config SPL_OPENSBI_LOAD_ADDR
+	hex
+	default 0x100000000
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select SPACEMIT_K3
+
+endif
diff --git a/board/spacemit/k3/MAINTAINERS b/board/spacemit/k3/MAINTAINERS
new file mode 100644
index 00000000000..34cf1ed4453
--- /dev/null
+++ b/board/spacemit/k3/MAINTAINERS
@@ -0,0 +1,8 @@
+SPACEMIT K3
+M:	Yixun Lan <dlan@kernel.org>
+S:	Maintained
+F:	arch/riscv/cpu/k3/
+F:	board/spacemit/k3/
+F:	configs/spacemit_k3_defconfig
+F:	include/configs/k3.h
+F:	arch/riscv/dts/k3-u-boot.dtsi
diff --git a/include/configs/spacemit-k3.h b/include/configs/spacemit-k3.h
new file mode 100644
index 00000000000..9dd545e2a3b
--- /dev/null
+++ b/include/configs/spacemit-k3.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
+ */
+
+#ifndef __SPACEMIT_K3_H
+#define __SPACEMIT_K3_H
+
+#define CFG_SYS_NS16550_IER	0x40
+
+#define RISCV_SMODE_TIMER_FREQ	24000000
+
+#endif /* __SPACEMIT_K3_H */

-- 
2.56.0

Re: [PATCH v3 1/4] board: spacemit: add SpacemiT K3 Pico-ITX

[E Shattow]

Hi Yixun,

On 10/2/26 17:34, Yixun Lan wrote:
> Add initial support for K3 Pico-ITX board, in this version, the DRAM
> information is parsed from DTS "/memory" node. And with UART enabled,
> the U-Boot serial console works fine now.
> 
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
>  arch/riscv/Kconfig            |  5 +++++
>  arch/riscv/cpu/k3/Kconfig     | 18 ++++++++++++++++++
>  arch/riscv/cpu/k3/Makefile    |  5 +++++
>  arch/riscv/cpu/k3/dram.c      | 21 +++++++++++++++++++++
>  board/spacemit/k3/Kconfig     | 30 ++++++++++++++++++++++++++++++
>  board/spacemit/k3/MAINTAINERS |  8 ++++++++
>  include/configs/spacemit-k3.h | 13 +++++++++++++
>  7 files changed, 100 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index c1b2890f1f3..386241efd4a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -53,6 +53,9 @@ config TARGET_SIPEED_MAIX
>  config TARGET_SPACEMIT_K1
>  	bool "Support Spacemit K1 SoC"
>  
> +config TARGET_SPACEMIT_K3
> +	bool "Support SpacemiT K3 SoC"
> +
>  config TARGET_STARFIVE_VISIONFIVE2
>  	bool "Support StarFive VisionFive2 Board"
>  	select BOARD_LATE_INIT
> @@ -124,6 +127,7 @@ source "board/sophgo/milkv_duo/Kconfig"
>  source "board/sophgo/milkv_duo_256m/Kconfig"
>  source "board/sophgo/licheerv_nano/Kconfig"
>  source "board/spacemit/k1/Kconfig"
> +source "board/spacemit/k3/Kconfig"
>  source "board/starfive/visionfive2/Kconfig"
>  source "board/thead/th1520_lpi4a/Kconfig"
>  source "board/xilinx/mbv/Kconfig"
> @@ -138,6 +142,7 @@ source "arch/riscv/cpu/mpfs/Kconfig"
>  source "arch/riscv/cpu/generic/Kconfig"
>  source "arch/riscv/cpu/jh7110/Kconfig"
>  source "arch/riscv/cpu/k1/Kconfig"
> +source "arch/riscv/cpu/k3/Kconfig"
>  source "arch/riscv/cpu/k230/Kconfig"
>  source "arch/riscv/cpu/th1520/Kconfig"
>  
> diff --git a/arch/riscv/cpu/k3/Kconfig b/arch/riscv/cpu/k3/Kconfig
> new file mode 100644
> index 00000000000..5474ac11243
> --- /dev/null
> +++ b/arch/riscv/cpu/k3/Kconfig
> @@ -0,0 +1,18 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +#
> +# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> +
> +if TARGET_SPACEMIT_K3
> +
> +config SPACEMIT_K3
> +	bool
> +	select BINMAN
> +	select ARCH_EARLY_INIT_R
> +	select SYS_CACHE_SHIFT_6
> +	imply CPU
> +	imply CPU_RISCV
> +	imply RISCV_TIMER if RISCV_SMODE
> +	imply CMD_CPU
> +	imply OF_UPSTREAM
> +
> +endif
> diff --git a/arch/riscv/cpu/k3/Makefile b/arch/riscv/cpu/k3/Makefile
> new file mode 100644
> index 00000000000..fba4e4b0a3f
> --- /dev/null
> +++ b/arch/riscv/cpu/k3/Makefile
> @@ -0,0 +1,5 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +#
> +# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> +
> +obj-y += dram.o
> diff --git a/arch/riscv/cpu/k3/dram.c b/arch/riscv/cpu/k3/dram.c
> new file mode 100644
> index 00000000000..e20d35dc1bf
> --- /dev/null
> +++ b/arch/riscv/cpu/k3/dram.c
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> + */
> +
> +#include <fdtdec.h>
> +#include <init.h>
> +#include <linux/sizes.h>
> +#include <asm/global_data.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int dram_init(void)
> +{
> +	return fdtdec_setup_mem_size_base();
> +}
> +
> +int dram_init_banksize(void)
> +{
> +	return fdtdec_setup_memory_banksize();
> +}
> diff --git a/board/spacemit/k3/Kconfig b/board/spacemit/k3/Kconfig
> new file mode 100644
> index 00000000000..1a63c73b6bb
> --- /dev/null
> +++ b/board/spacemit/k3/Kconfig
> @@ -0,0 +1,30 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +#
> +# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> +
> +if TARGET_SPACEMIT_K3
> +

> +config SYS_BOARD
> +	default "k3"

Let's arbitrarily change user-facing SYS_BOARD to "spacemit_k3" stem of
u-boot config filename "spacemit_k3_defconfig":

+config SYS_BOARD
-	default "k3"
+	default "spacemit_k3"

The use of SYS_BOARD is compiled-in as various runtime outputs e.g.
SMBIOS data structure. I think "spacemit_k3" is not a very interesting
or descriptive name to communicate all the boards that may be supported,
but it is better for a user to see this defconfig filename stem than
simply "k3" as the board name. I do not have any better suggestion
because it is a compile-time substitution and board selection is likely
to be at runtime.

> +
> +config SYS_VENDOR
> +	default "spacemit"
> +
> +config SYS_CPU
> +	default "k3"
> +
> +config SYS_CONFIG_NAME
> +	default "spacemit-k3"
> +

Looks good, thanks for picking up that rename.

> +config TEXT_BASE
> +	default 0x102000000
> +
> +config SPL_OPENSBI_LOAD_ADDR
> +	hex
> +	default 0x100000000
> +
> +config BOARD_SPECIFIC_OPTIONS
> +	def_bool y
> +	select SPACEMIT_K3
> +
> +endif
> diff --git a/board/spacemit/k3/MAINTAINERS b/board/spacemit/k3/MAINTAINERS
> new file mode 100644
> index 00000000000..34cf1ed4453
> --- /dev/null
> +++ b/board/spacemit/k3/MAINTAINERS
> @@ -0,0 +1,8 @@
> +SPACEMIT K3
> +M:	Yixun Lan <dlan@kernel.org>
> +S:	Maintained
> +F:	arch/riscv/cpu/k3/
> +F:	board/spacemit/k3/
> +F:	configs/spacemit_k3_defconfig
> +F:	include/configs/k3.h
> +F:	arch/riscv/dts/k3-u-boot.dtsi
> diff --git a/include/configs/spacemit-k3.h b/include/configs/spacemit-k3.h
> new file mode 100644
> index 00000000000..9dd545e2a3b
> --- /dev/null
> +++ b/include/configs/spacemit-k3.h
> @@ -0,0 +1,13 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> + */
> +
> +#ifndef __SPACEMIT_K3_H
> +#define __SPACEMIT_K3_H
> +
> +#define CFG_SYS_NS16550_IER	0x40
> +
> +#define RISCV_SMODE_TIMER_FREQ	24000000
> +
> +#endif /* __SPACEMIT_K3_H */
> 

With that, looks good to me.

Reviewed-by: E Shattow <e@freeshell.de>

Re: [PATCH v3 1/4] board: spacemit: add SpacemiT K3 Pico-ITX

[Yixun Lan]

Hi E Shattow, 

On 03:02 Sat 03 Oct     , E Shattow wrote:
> Hi Yixun,
> 
..
> > diff --git a/board/spacemit/k3/Kconfig b/board/spacemit/k3/Kconfig
> > new file mode 100644
> > index 00000000000..1a63c73b6bb
> > --- /dev/null
> > +++ b/board/spacemit/k3/Kconfig
> > @@ -0,0 +1,30 @@
> > +# SPDX-License-Identifier: GPL-2.0-or-later
> > +#
> > +# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> > +
> > +if TARGET_SPACEMIT_K3
> > +
> 
> > +config SYS_BOARD
> > +	default "k3"
> 
> Let's arbitrarily change user-facing SYS_BOARD to "spacemit_k3" stem of
> u-boot config filename "spacemit_k3_defconfig":
> 
> +config SYS_BOARD
> -	default "k3"
> +	default "spacemit_k3"
> 
> The use of SYS_BOARD is compiled-in as various runtime outputs e.g.
> SMBIOS data structure. 
Could you iterate a bit more on this? I've not seen K3 used SMBIOS or will

> I think "spacemit_k3" is not a very interesting
> or descriptive name to communicate all the boards that may be supported,
> but it is better for a user to see this defconfig filename stem than
> simply "k3" as the board name. I do not have any better suggestion
> because it is a compile-time substitution and board selection is likely
> to be at runtime.
> 
I incline to simply keep it as "k3", I've checked all places refer to SYS_BOARD
which all will be used under SYS_VENDOR realm or somehow has connection with it,
so there should be no conflicts, to me, it's kind of redudant to change to
'spacemit_k3', for reference to arch/Kconfig

config SYS_BOARD
        string
        help
          This option should contain the name of the target board.
          If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
          or board/<CONFIG_SYS_BOARD> directory is compiled depending on
          whether CONFIG_SYS_VENDOR is set or not.

          This is optional.  For those targets without the board directory,
          leave this option empty.


On the other hand, I do not see SYS_BOARD should strictly follow
the name of defconfig, various board did so

some other source code I checked

cmd/pxe.c:20:   "default-" CONFIG_SYS_ARCH "-" CONFIG_SYS_SOC "-" CONFIG_SYS_BOARD,
config.mk:29:BOARD := $(CONFIG_SYS_BOARD:"%"=%)
env/Kconfig:20:   the file board/<vendor>/<board>/<SYS_BOARD>.env exists. Otherwise the
include/env_default.h:93:#ifdef CONFIG_SYS_BOARD
tools/buildman/boards.py:194:        'board' : 'SYS_BOARD',

> > +
> > +config SYS_VENDOR
> > +	default "spacemit"
> > +

-- 
Yixun Lan (dlan)

Re: [PATCH v3 1/4] board: spacemit: add SpacemiT K3 Pico-ITX

[E Shattow]

On 10/3/26 04:08, Yixun Lan wrote:
> Hi E Shattow, 
> 
> On 03:02 Sat 03 Oct     , E Shattow wrote:
>> Hi Yixun,
>>
> ..
>>> diff --git a/board/spacemit/k3/Kconfig b/board/spacemit/k3/Kconfig
>>> new file mode 100644
>>> index 00000000000..1a63c73b6bb
>>> --- /dev/null
>>> +++ b/board/spacemit/k3/Kconfig
>>> @@ -0,0 +1,30 @@
>>> +# SPDX-License-Identifier: GPL-2.0-or-later
>>> +#
>>> +# Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
>>> +
>>> +if TARGET_SPACEMIT_K3
>>> +
>>
>>> +config SYS_BOARD
>>> +	default "k3"
>>
>> Let's arbitrarily change user-facing SYS_BOARD to "spacemit_k3" stem of
>> u-boot config filename "spacemit_k3_defconfig":
>>
>> +config SYS_BOARD
>> -	default "k3"
>> +	default "spacemit_k3"
>>
>> The use of SYS_BOARD is compiled-in as various runtime outputs e.g.
>> SMBIOS data structure. 
> Could you iterate a bit more on this? I've not seen K3 used SMBIOS or will
> 

Disregard, I got this detail wrong.


>> I think "spacemit_k3" is not a very interesting
>> or descriptive name to communicate all the boards that may be supported,
>> but it is better for a user to see this defconfig filename stem than
>> simply "k3" as the board name. I do not have any better suggestion
>> because it is a compile-time substitution and board selection is likely
>> to be at runtime.
>>
> I incline to simply keep it as "k3", I've checked all places refer to SYS_BOARD
> which all will be used under SYS_VENDOR realm or somehow has connection with it,
> so there should be no conflicts, to me, it's kind of redudant to change to
> 'spacemit_k3', for reference to arch/Kconfig
> 
> config SYS_BOARD
>         string
>         help
>           This option should contain the name of the target board.
>           If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
>           or board/<CONFIG_SYS_BOARD> directory is compiled depending on
>           whether CONFIG_SYS_VENDOR is set or not.
> 
>           This is optional.  For those targets without the board directory,
>           leave this option empty.
> 
> 
> On the other hand, I do not see SYS_BOARD should strictly follow
> the name of defconfig, various board did so
> 
> some other source code I checked
> 

Yes, keep SYS_BOARD as "k3" is fine. I forgot then that it will affect
the build in this way and that is not any benefit worth changing the
path and everything u-boot build system is looking for. I wish there is
a better name for it than the SoC on a build target that is not just any
one board name, but what we have is not any problem itself.

> cmd/pxe.c:20:   "default-" CONFIG_SYS_ARCH "-" CONFIG_SYS_SOC "-" CONFIG_SYS_BOARD,
> config.mk:29:BOARD := $(CONFIG_SYS_BOARD:"%"=%)
> env/Kconfig:20:   the file board/<vendor>/<board>/<SYS_BOARD>.env exists. Otherwise the
> include/env_default.h:93:#ifdef CONFIG_SYS_BOARD
> tools/buildman/boards.py:194:        'board' : 'SYS_BOARD',
> 
>>> +
>>> +config SYS_VENDOR
>>> +	default "spacemit"
>>> +
> 

Keep R-by tag, no changes requested to SYS_BOARD, thanks!

-E

[PATCH v3 2/4] riscv: dts: spacemit: k3: add binman node

[Yixun Lan]

SpacemiT K3 follow the standard riscv binman layout, which has opensbi
and U-Boot proper, so include the common binman dtsi file.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 arch/riscv/dts/spacemit-k3-u-boot.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/riscv/dts/spacemit-k3-u-boot.dtsi b/arch/riscv/dts/spacemit-k3-u-boot.dtsi
new file mode 100644
index 00000000000..f1c1c3ee6fd
--- /dev/null
+++ b/arch/riscv/dts/spacemit-k3-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
+ */
+
+#include "binman.dtsi"

-- 
2.56.0

Re: [PATCH v3 2/4] riscv: dts: spacemit: k3: add binman node

[E Shattow]

On 10/2/26 17:34, Yixun Lan wrote:
> SpacemiT K3 follow the standard riscv binman layout, which has opensbi
> and U-Boot proper, so include the common binman dtsi file.
> 
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
>  arch/riscv/dts/spacemit-k3-u-boot.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/riscv/dts/spacemit-k3-u-boot.dtsi b/arch/riscv/dts/spacemit-k3-u-boot.dtsi
> new file mode 100644
> index 00000000000..f1c1c3ee6fd
> --- /dev/null
> +++ b/arch/riscv/dts/spacemit-k3-u-boot.dtsi
> @@ -0,0 +1,6 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> + */
> +
> +#include "binman.dtsi"
> 

Looks good to me. I suggest to introduce spacemit-k3-binman.dtsi now or
later, may as well do it now?

See for example of how this looks in files
starfive-visionfive2-binman.dtsi and starfive-visionfive2-u-boot.dtsi,
it would be as follows:

arch/riscv/dts/spacemit-k3-binman.dtsi:
...copyright comment...
+#include "binman.dtsi"
+
+

arch/riscv/dts/spacemit-k3-u-boot.dtsi:
...copyright comment...
-#include "binman.dtsi"
+
+
+#include "spacemit-k3-binman.dtsi"

With that,

Reviewed-by: E Shattow <e@freeshell.de>

Re: [PATCH v3 2/4] riscv: dts: spacemit: k3: add binman node

[Yixun Lan]

Hi E Shattow,

Thanks for the suggestion

On 00:49 Sat 03 Oct     , E Shattow wrote:
> On 10/2/26 17:34, Yixun Lan wrote:
> > SpacemiT K3 follow the standard riscv binman layout, which has opensbi
> > and U-Boot proper, so include the common binman dtsi file.
> > 
> > Signed-off-by: Yixun Lan <dlan@kernel.org>
> > ---
> >  arch/riscv/dts/spacemit-k3-u-boot.dtsi | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/arch/riscv/dts/spacemit-k3-u-boot.dtsi b/arch/riscv/dts/spacemit-k3-u-boot.dtsi
> > new file mode 100644
> > index 00000000000..f1c1c3ee6fd
> > --- /dev/null
> > +++ b/arch/riscv/dts/spacemit-k3-u-boot.dtsi
> > @@ -0,0 +1,6 @@
> > +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> > +/*
> > + * Copyright (C) 2026 Yixun Lan <dlan@kernel.org>
> > + */
> > +
> > +#include "binman.dtsi"
> > 
> 
> Looks good to me. I suggest to introduce spacemit-k3-binman.dtsi now or
> later, may as well do it now?
> 
Yes, I thought about this as we introduced new SpacemiT image format..
I have no objection to do it now in this series

> See for example of how this looks in files
> starfive-visionfive2-binman.dtsi and starfive-visionfive2-u-boot.dtsi,
> it would be as follows:
> 
> arch/riscv/dts/spacemit-k3-binman.dtsi:
> ...copyright comment...
> +#include "binman.dtsi"
> +
> +
> 
> arch/riscv/dts/spacemit-k3-u-boot.dtsi:
> ...copyright comment...
> -#include "binman.dtsi"
> +
> +
> +#include "spacemit-k3-binman.dtsi"
> 
> With that,
> 
> Reviewed-by: E Shattow <e@freeshell.de>

-- 
Yixun Lan (dlan)

[PATCH v3 3/4] configs: spacemit: Add K3 default configuration

[Yixun Lan]

Add the default configuration for SpacemiT K3 boards, using the
Pico-ITX device tree as the default.

Configure U-Boot to run in RISC-V supervisor mode and enable the
platform clock, reset, GPIO, pinctrl, I2C, PMIC and regulator drivers.
Also configure the memory layout, debug UART and basic filesystem
commands required to boot on the platform.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 configs/spacemit_k3_defconfig | 51 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/configs/spacemit_k3_defconfig b/configs/spacemit_k3_defconfig
new file mode 100644
index 00000000000..a6d1f35a93e
--- /dev/null
+++ b/configs/spacemit_k3_defconfig
@@ -0,0 +1,51 @@
+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_LEN=0x1000000
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x102300000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="spacemit/k3-pico-itx"
+CONFIG_SYS_BOOTM_LEN=0xa000000
+CONFIG_SYS_LOAD_ADDR=0x102000000
+CONFIG_DEBUG_UART_BASE=0xd4017000
+CONFIG_DEBUG_UART_CLOCK=14700000
+CONFIG_TARGET_SPACEMIT_K3=y
+CONFIG_ARCH_RV64I=y
+CONFIG_CMODEL_MEDANY=y
+CONFIG_RISCV_SMODE=y
+CONFIG_RISCV_ISA_ZICBOM=y
+CONFIG_STACK_SIZE=0x100000
+CONFIG_FIT=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
+# CONFIG_BOARD_INIT is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DEVICE_TREE_INCLUDES="spacemit-k3-u-boot.dtsi"
+CONFIG_SYSCON=y
+CONFIG_CLK_SPACEMIT=y
+CONFIG_CLK_SPACEMIT_K3=y
+CONFIG_SPACEMIT_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_SPACEMIT_K1=y
+CONFIG_MISC=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SPACEMIT_K1=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_SPACEMIT_P1=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_SPACEMIT_P1=y
+CONFIG_DEBUG_UART_NS16550=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_TIMER_EARLY=y

-- 
2.56.0

Re: [PATCH v3 3/4] configs: spacemit: Add K3 default configuration

[E Shattow]

On 10/2/26 17:34, Yixun Lan wrote:
> Add the default configuration for SpacemiT K3 boards, using the
> Pico-ITX device tree as the default.
> 
> Configure U-Boot to run in RISC-V supervisor mode and enable the
> platform clock, reset, GPIO, pinctrl, I2C, PMIC and regulator drivers.
> Also configure the memory layout, debug UART and basic filesystem
> commands required to boot on the platform.
> 
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
>  configs/spacemit_k3_defconfig | 51 +++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/configs/spacemit_k3_defconfig b/configs/spacemit_k3_defconfig
> new file mode 100644
> index 00000000000..a6d1f35a93e
> --- /dev/null
> +++ b/configs/spacemit_k3_defconfig
> @@ -0,0 +1,51 @@
> +CONFIG_RISCV=y
> +CONFIG_SYS_MALLOC_LEN=0x1000000
> +CONFIG_SYS_MALLOC_F_LEN=0x80000
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x102300000
> +CONFIG_DM_GPIO=y
> +CONFIG_DEFAULT_DEVICE_TREE="spacemit/k3-pico-itx"
> +CONFIG_SYS_BOOTM_LEN=0xa000000
> +CONFIG_SYS_LOAD_ADDR=0x102000000
> +CONFIG_DEBUG_UART_BASE=0xd4017000
> +CONFIG_DEBUG_UART_CLOCK=14700000
> +CONFIG_TARGET_SPACEMIT_K3=y
> +CONFIG_ARCH_RV64I=y
> +CONFIG_CMODEL_MEDANY=y
> +CONFIG_RISCV_SMODE=y
> +CONFIG_RISCV_ISA_ZICBOM=y
> +CONFIG_STACK_SIZE=0x100000
> +CONFIG_FIT=y
> +CONFIG_SUPPORT_RAW_INITRD=y
> +CONFIG_SYS_CBSIZE=256
> +CONFIG_SYS_PBSIZE=276
> +# CONFIG_BOARD_INIT is not set
> +CONFIG_HUSH_PARSER=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_PMIC=y
> +CONFIG_CMD_REGULATOR=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_DEVICE_TREE_INCLUDES="spacemit-k3-u-boot.dtsi"
> +CONFIG_SYSCON=y
> +CONFIG_CLK_SPACEMIT=y
> +CONFIG_CLK_SPACEMIT_K3=y
> +CONFIG_SPACEMIT_GPIO=y
> +CONFIG_DM_I2C=y
> +CONFIG_SYS_I2C_SPACEMIT_K1=y
> +CONFIG_MISC=y
> +CONFIG_PINCTRL=y
> +CONFIG_PINCTRL_SPACEMIT_K1=y
> +CONFIG_DM_PMIC=y
> +CONFIG_PMIC_SPACEMIT_P1=y
> +CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_DM_REGULATOR_SPACEMIT_P1=y
> +CONFIG_DEBUG_UART_NS16550=y
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_DEBUG_UART_ANNOUNCE=y
> +CONFIG_SYS_NS16550=y
> +CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_TIMER_EARLY=y
> 

Looks good to me for initial support. The interaction of first 32MiB
range following 0x102000000 with vendor embedded controller firmware or
vendor opensbi or vendor u-boot SPL or possibly mainline opensbi is
something I don't understand properly, yet it does not prevent mainline
u-boot main payload hush shell operation. Attempting to have an answer
for all the moving parts of vendor firmware is too complex to expect for
the initial series, this is okay as-is.

Reviewed-by: E Shattow <e@freeshell.de>

[PATCH v3 4/4] doc: spacemit: k3: Add Pico-ITX board

[Yixun Lan]

Add documentation for how to test the mainline U-Boot on SpacemiT
K3 Pico-ITX board, currently it still rely on using vendor FSBL.bin
file to initialize DDR and boot U-Boot proper, and the opensbi
firmware is built from an on-going mainline branch.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 doc/board/spacemit/index.rst             |   1 +
 doc/board/spacemit/spacemit-pico-itx.rst | 204 +++++++++++++++++++++++++++++++
 2 files changed, 205 insertions(+)

diff --git a/doc/board/spacemit/index.rst b/doc/board/spacemit/index.rst
index 71854e5735b..51918f0acc7 100644
--- a/doc/board/spacemit/index.rst
+++ b/doc/board/spacemit/index.rst
@@ -8,4 +8,5 @@ SpacemiT
    bananapi-f3
    k1-mmc
    k1-spl
+   spacemit-pico-itx
 
diff --git a/doc/board/spacemit/spacemit-pico-itx.rst b/doc/board/spacemit/spacemit-pico-itx.rst
new file mode 100644
index 00000000000..dd29e3c31c8
--- /dev/null
+++ b/doc/board/spacemit/spacemit-pico-itx.rst
@@ -0,0 +1,204 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+SpacemiT K3 Pico-ITX
+====================
+
+Building
+~~~~~~~~
+1. Install the SpacemiT riscv cross compile toolchain_, or skip it if riscv toolchain is installed.
+
+.. _toolchain: https://archive.spacemit.com/toolchain/
+
+2. Setup cross compilation environment variable:
+
+.. code-block:: console
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix, e.g /opt/spacemit/bin/riscv64-unknown-linux-gnu->
+
+3. Before building U-Boot, OpenSBI should be built first. OpenSBI can be
+built for SpacemiT K1 SoC as below:
+
+.. code-block:: console
+
+   git clone https://github.com/spacemit-com/opensbi-upstream opensbi
+   cd opensbi
+   make PLATFORM=generic
+
+4. Then build U-Boot as following:
+
+.. code-block:: console
+
+   cd <U-Boot-dir>
+   make spacemit_k3_defconfig
+   make OPENSBI=<OpenSBI-dir>/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate u-boot.itb
+
+Testing
+~~~~~~~
+Currently, in this stage, the U-Boot SPL isn't ready, and has no ddr initialization code
+Thus please test with fasboot command via USB download.
+
+First, retrieve Bianbu Linux image from archive_ and extract the FSBL.bin firmware.
+
+Second, hold the FEL button of Pico-ITX board, then press reset button and release it .
+The board will enter into firmware download mode.
+
+.. code-block:: none
+
+   sys: 0x10001200
+   bm:2
+   usb_init : enter 3296,3072
+   usb_core_init : enter
+   DWC3_GRXTHRCFG:0x4400000
+   ROM: usb download handler
+    rst
+   done H
+   setup= 0x1000680 0x400000,
+    rst
+   done H
+   setup= 0x290500 0x0,
+   setup= 0x1000680 0x120000,
+   setup= 0x2000680 0x90000,
+   setup= 0x2000680 0x200000,
+   setup= 0x3000680 0xff0000,
+   setup= 0x3020680 0xff0409,
+   setup= 0x3010680 0xff0409,
+   setup= 0x10900 0x0,
+   usb_rx_bytes : start len[4096]
+   setup= 0x3020680 0xff0409,
+   setup= 0x3040680 0xff0409,
+
+Run following command to test:
+
+.. code-block:: console
+
+   fastboot stage FSBL.bin
+   fastboot continue
+   sleep 10
+   fastboot stage u-boot.itb
+   fastboot continue
+
+.. _archive: https://archive.spacemit.com/image/k3/version/bianbu/v4.0.7/
+.. _uboot: https://bianbu-linux.spacemit.com/en/device/boot#21-firmware-layout
+
+Booting
+~~~~~~~
+Sample boot log
+~~~~~~~~~~~~~~~
+.. code-block:: none
+
+   sys: 0x10001200
+   bm:2
+   usb_init : enter 3296,3072
+   usb_core_init : enter
+   DWC3_GRXTHRCFG:0x4400000
+   ROM: usb download handler
+    rst
+   done H
+   setup= 0x1000680 0x400000,
+    rst
+   done H
+   setup= 0x2f0500 0x0,
+   setup= 0x1000680 0x120000,
+   setup= 0x2000680 0x90000,
+   setup= 0x2000680 0x200000,
+   setup= 0x3000680 0xff0000,
+   setup= 0x3020680 0xff0409,
+   setup= 0x3010680 0xff0409,
+   setup= 0x10900 0x0,
+   usb_rx_bytes : start len[4096]
+   setup= 0x3020680 0xff0409,
+   setup= 0x3040680 0xff0409,
+   fastboot_handle_command: max-download-size
+   usb_tx_bytes : start len[14]
+   usb_rx_bytes : start len[4096]
+   fastboot_handle_command: 00072b20
+   Starting download of 469792 bytes
+   usb_tx_bytes : start len[12]
+   usb_rx_bytes : start len[469792]
+   usb_tx_bytes : start len[4]
+   usb_rx_bytes : start len[4096]
+   fastboot_handle_command: continue
+   usb_tx_bytes : start len[4]
+   j...
+
+   U-Boot SPL 2022.10 (Sep 07 2026 - 11:31:13 +0000)
+   LPDDR5 total size: 16 GB, data rate: 6400 MT/s
+   DDR training consume 5625ms
+   ..
+   OpenSBI v1.9-72-g13a401f8
+      ____                    _____ ____ _____
+     / __ \                  / ____|  _ \_   _|
+    | |  | |_ __   ___ _ __ | (___ | |_) || |
+    | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
+    | |__| | |_) |  __/ | | |____) | |_) || |_
+     \____/| .__/ \___|_| |_|_____/|____/_____|
+           | |
+           |_|
+
+   Platform Name               : SpacemiT K3 Pico-ITX
+   Platform Features           : medeleg
+   Platform HART Count         : 8
+   Platform HART Protection    : pmp
+   Platform IPI Device         : aclint-mswi
+   Platform Timer Device       : aclint-mtimer @ 24000000Hz
+   Platform Console Device     : uart8250
+   Platform HSM Device         : spacemit-k3-hsm
+   Platform PMU Device         : ---
+   Platform Reboot Device      : spacemit-p1-reset
+   Platform Shutdown Device    : spacemit-p1-reset
+   Platform Suspend Device     : ---
+   Platform CPPC Device        : ---
+   Firmware Base               : 0x100000000
+   Firmware Size               : 416 KB
+   Firmware RW Offset          : 0x40000
+   Firmware RW Size            : 160 KB
+   Firmware Heap Offset        : 0x57000
+   Firmware Heap Size          : 68 KB (total), 1 KB (reserved), 14 KB (used), 52 KB (free)
+   Firmware Scratch Size       : 4096 B (total), 1472 B (used), 2624 B (free)
+   Runtime SBI Version         : 3.0
+   Standard SBI Extensions     : time,rfnc,ipi,base,hsm,srst,pmu,dbcn,fwft,legacy,dbtr,sse
+   Experimental SBI Extensions : none
+
+   Domain0 Name                : root
+   Domain0 Init Order          : 0xffffffff
+   Domain0 Boot HART           : 0
+   Domain0 HARTs               : 0x0*,0x1*,0x2*,0x3*,0x4*,0x5*,0x6*,0x7*
+   Domain0 Region00            : 0x0000000100000000-0x000000010003ffff M: (F,R,X) S/U: ()
+   Domain0 Region01            : 0x0000000100040000-0x000000010007ffff M: (F,R,W) S/U: ()
+   Domain0 Region02            : 0x00000000d4017000-0x00000000d4017fff M: (I,R,W) S/U: (R,W)
+   Domain0 Region03            : 0x00000000e081c000-0x00000000e081ffff M: (I,R,W) S/U: ()
+   Domain0 Region04            : 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)
+   Domain0 Next Address        : 0x0000000102000000
+   Domain0 Next Arg1           : 0x0000000102091398
+   Domain0 Next Mode           : S-mode
+   Domain0 SysReset            : yes
+   Domain0 SysSuspend          : yes
+
+   Boot HART ID                : 0
+   Boot HART Domain            : root
+   Boot HART Priv Version      : v1.12
+   Boot HART Base ISA          : rv64imafdcbvhx
+   Boot HART ISA Extensions    : smaia,smstateen,sscofpmf,sstc,zicntr,zihpm,smcntrpmf,zicboz,zicbom,svpbmt,sdtrig,svade,ssstateen,v,f,d
+   Boot HART PMP Count         : 16
+   Boot HART PMP Granularity   : 12 bits
+   Boot HART PMP Address Bits  : 38
+   Boot HART MHPM Info         : 16 (0x0007fff8)
+   Boot HART Debug Triggers    : 4 triggers
+   Boot HART MIDELEG           : 0x0000000000003666
+   Boot HART MEDELEG           : 0x0000000000f0b509
+
+   <debug_uart>
+
+
+   U-Boot 2026.10-rc4-00501-g9fba7b59df42 (Sep 22 2026 - 13:08:33 +0000)
+
+   DRAM:  16 GiB
+   Core:  433 devices, 15 uclasses, devicetree: separate
+   Loading Environment from nowhere...Loading Environment from nowhere... OK
+   In:    serial@d4017000
+   Out:   serial@d4017000
+   Err:   serial@d4017000
+   Net:   No ethernet found.
+   =>

-- 
2.56.0

Re: [PATCH v3 4/4] doc: spacemit: k3: Add Pico-ITX board

[E Shattow]

Hi Yixun,

On 10/2/26 17:34, Yixun Lan wrote:
> Add documentation for how to test the mainline U-Boot on SpacemiT
> K3 Pico-ITX board, currently it still rely on using vendor FSBL.bin
> file to initialize DDR and boot U-Boot proper, and the opensbi
> firmware is built from an on-going mainline branch.
> 
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
>  doc/board/spacemit/index.rst             |   1 +
>  doc/board/spacemit/spacemit-pico-itx.rst | 204 +++++++++++++++++++++++++++++++
>  2 files changed, 205 insertions(+)
> 
> diff --git a/doc/board/spacemit/index.rst b/doc/board/spacemit/index.rst
> index 71854e5735b..51918f0acc7 100644
> --- a/doc/board/spacemit/index.rst
> +++ b/doc/board/spacemit/index.rst
> @@ -8,4 +8,5 @@ SpacemiT
>     bananapi-f3
>     k1-mmc
>     k1-spl
> +   spacemit-pico-itx
>  
> diff --git a/doc/board/spacemit/spacemit-pico-itx.rst b/doc/board/spacemit/spacemit-pico-itx.rst
> new file mode 100644
> index 00000000000..dd29e3c31c8
> --- /dev/null
> +++ b/doc/board/spacemit/spacemit-pico-itx.rst
> @@ -0,0 +1,204 @@
> +.. SPDX-License-Identifier: GPL-2.0-or-later
> +
> +SpacemiT K3 Pico-ITX
> +====================
> +
> +Building
> +~~~~~~~~
> +1. Install the SpacemiT riscv cross compile toolchain_, or skip it if riscv toolchain is installed.
> +
> +.. _toolchain: https://archive.spacemit.com/toolchain/
> +

Avoid the advertisement for any unnecessary vendor-specific information.

The packaged toolchain from any generic Linux distro is fine enough to
build with as "1. Add a RISC-V toolchain to your PATH." and no other
explanation is required.

I have tested with Debian forky/testing for example, it is fine. Code
size differences between output of GCC major versions may be detailed in
a future update if it becomes important.

> +2. Setup cross compilation environment variable:
> +
> +.. code-block:: console
> +
> +   export CROSS_COMPILE=<riscv64 toolchain prefix, e.g /opt/spacemit/bin/riscv64-unknown-linux-gnu->
> +

Likewise, it is enough to have "2. Set a cross-compilation environment
variable if needed: export CROSS_COMPILE=<riscv64 toolchain prefix>"

There is much documentation about compiling U-Boot at
doc/build/index.rst and so do not name a specific vendor toolchain path
name here.

> +3. Before building U-Boot, OpenSBI should be built first. OpenSBI can be
> +built for SpacemiT K1 SoC as below:

built for SpacemiT K3 SoC ?

However it is clearer to re-phrase that as a statement of requirements.
"3. U-Boot for SpacemiT K3 SoC requires OpenSBI in-development generic
platform object fw_dynamic.bin to be included in the Flattened Image
Tree blob. OpenSBI may be first built as below: ..."

Please if it will help you then do copy any build examples adapted from
my own writing in doc/board/starfive/jh7110_common.rst which contains a
small error in build command details corrected at
https://lore.kernel.org/u-boot/20260924063843.8934-1-e@freeshell.de/

Additional phrasing may be as "Review the OpenSBI developer mailing list
archives for patches to apply in support of SpacemiT K3 Pico-ITX". Let
this be generic enough that we are not dead-linking to something 10
years later when a user is viewing this old document from the future.

> +
> +.. code-block:: console
> +
> +   git clone https://github.com/spacemit-com/opensbi-upstream opensbi
> +   cd opensbi
> +   make PLATFORM=generic

Please refer to upstream directly. I appreciate to make it convenient
with patches curated on a fork repository but this is not durable for
documentation purpose, is this going to exist in 2 years? 10 years? 20
years?. Mailing list archives are durable and if we depend on OpenSBI
then I expect at least upstream OpenSBI git repository to be durable, too.

> +
> +4. Then build U-Boot as following:
> +
> +.. code-block:: console
> +
> +   cd <U-Boot-dir>
> +   make spacemit_k3_defconfig
> +   make OPENSBI=<OpenSBI-dir>/build/platform/generic/firmware/fw_dynamic.bin
> +
> +This will generate u-boot.itb
> +
> +Testing
> +~~~~~~~
> +Currently, in this stage, the U-Boot SPL isn't ready, and has no ddr initialization code

Instead, as "Currently there is no U-Boot SPL build target. It is
required to use 'FSBL.bin' vendor board support package SPL for DDR
initialization and testing u-boot.itb"

May SPI NOR be erased empty? what exactly must be present in SPI NOR for
successful testing?

> +Thus please test with fasboot command via USB download.

fastboot

> +
> +First, retrieve Bianbu Linux image from archive_ and extract the FSBL.bin firmware.

We should build any out-of-tree dependencies (FSBL.bin) from from source
if it is possible. This is a cheap operation to 'git remote add -f
spacemit-com https://...spacemit-com/uboot-2022.10' on an existing
u-boot git repo.

Assume SPI NOR content is erased. Is there something vendor-specific you
need that is not available by compiling spacemit-com k3-br-v1.0.y branch?

> +
> +Second, hold the FEL button of Pico-ITX board, then press reset button and release it .
> +The board will enter into firmware download mode.
> +
> +.. code-block:: none
> +
> +   sys: 0x10001200
> +   bm:2
> +   usb_init : enter 3296,3072
> +   usb_core_init : enter
> +   DWC3_GRXTHRCFG:0x4400000
> +   ROM: usb download handler
> +    rst
> +   done H
> +   setup= 0x1000680 0x400000,
> +    rst
> +   done H
> +   setup= 0x290500 0x0,
> +   setup= 0x1000680 0x120000,
> +   setup= 0x2000680 0x90000,
> +   setup= 0x2000680 0x200000,
> +   setup= 0x3000680 0xff0000,
> +   setup= 0x3020680 0xff0409,
> +   setup= 0x3010680 0xff0409,
> +   setup= 0x10900 0x0,
> +   usb_rx_bytes : start len[4096]
> +   setup= 0x3020680 0xff0409,
> +   setup= 0x3040680 0xff0409,
> +
> +Run following command to test:
> +
> +.. code-block:: console
> +
> +   fastboot stage FSBL.bin
> +   fastboot continue
> +   sleep 10
> +   fastboot stage u-boot.itb
> +   fastboot continue
> +
> +.. _archive: https://archive.spacemit.com/image/k3/version/bianbu/v4.0.7/
> +.. _uboot: https://bianbu-linux.spacemit.com/en/device/boot#21-firmware-layout
> +
> +Booting
> +~~~~~~~
> +Sample boot log
> +~~~~~~~~~~~~~~~
> +.. code-block:: none
> +
> +   sys: 0x10001200
> +   bm:2
> +   usb_init : enter 3296,3072
> +   usb_core_init : enter
> +   DWC3_GRXTHRCFG:0x4400000
> +   ROM: usb download handler
> +    rst
> +   done H
> +   setup= 0x1000680 0x400000,
> +    rst
> +   done H
> +   setup= 0x2f0500 0x0,
> +   setup= 0x1000680 0x120000,
> +   setup= 0x2000680 0x90000,
> +   setup= 0x2000680 0x200000,
> +   setup= 0x3000680 0xff0000,
> +   setup= 0x3020680 0xff0409,
> +   setup= 0x3010680 0xff0409,
> +   setup= 0x10900 0x0,
> +   usb_rx_bytes : start len[4096]
> +   setup= 0x3020680 0xff0409,
> +   setup= 0x3040680 0xff0409,
> +   fastboot_handle_command: max-download-size
> +   usb_tx_bytes : start len[14]
> +   usb_rx_bytes : start len[4096]
> +   fastboot_handle_command: 00072b20
> +   Starting download of 469792 bytes
> +   usb_tx_bytes : start len[12]
> +   usb_rx_bytes : start len[469792]
> +   usb_tx_bytes : start len[4]
> +   usb_rx_bytes : start len[4096]
> +   fastboot_handle_command: continue
> +   usb_tx_bytes : start len[4]
> +   j...
> +
> +   U-Boot SPL 2022.10 (Sep 07 2026 - 11:31:13 +0000)
> +   LPDDR5 total size: 16 GB, data rate: 6400 MT/s
> +   DDR training consume 5625ms
> +   ..
> +   OpenSBI v1.9-72-g13a401f8
> +      ____                    _____ ____ _____
> +     / __ \                  / ____|  _ \_   _|
> +    | |  | |_ __   ___ _ __ | (___ | |_) || |
> +    | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
> +    | |__| | |_) |  __/ | | |____) | |_) || |_
> +     \____/| .__/ \___|_| |_|_____/|____/_____|
> +           | |
> +           |_|
> +
> +   Platform Name               : SpacemiT K3 Pico-ITX
> +   Platform Features           : medeleg
> +   Platform HART Count         : 8
> +   Platform HART Protection    : pmp
> +   Platform IPI Device         : aclint-mswi
> +   Platform Timer Device       : aclint-mtimer @ 24000000Hz
> +   Platform Console Device     : uart8250
> +   Platform HSM Device         : spacemit-k3-hsm
> +   Platform PMU Device         : ---
> +   Platform Reboot Device      : spacemit-p1-reset
> +   Platform Shutdown Device    : spacemit-p1-reset
> +   Platform Suspend Device     : ---
> +   Platform CPPC Device        : ---
> +   Firmware Base               : 0x100000000
> +   Firmware Size               : 416 KB
> +   Firmware RW Offset          : 0x40000
> +   Firmware RW Size            : 160 KB
> +   Firmware Heap Offset        : 0x57000
> +   Firmware Heap Size          : 68 KB (total), 1 KB (reserved), 14 KB (used), 52 KB (free)
> +   Firmware Scratch Size       : 4096 B (total), 1472 B (used), 2624 B (free)
> +   Runtime SBI Version         : 3.0
> +   Standard SBI Extensions     : time,rfnc,ipi,base,hsm,srst,pmu,dbcn,fwft,legacy,dbtr,sse
> +   Experimental SBI Extensions : none
> +
> +   Domain0 Name                : root
> +   Domain0 Init Order          : 0xffffffff
> +   Domain0 Boot HART           : 0
> +   Domain0 HARTs               : 0x0*,0x1*,0x2*,0x3*,0x4*,0x5*,0x6*,0x7*
> +   Domain0 Region00            : 0x0000000100000000-0x000000010003ffff M: (F,R,X) S/U: ()
> +   Domain0 Region01            : 0x0000000100040000-0x000000010007ffff M: (F,R,W) S/U: ()
> +   Domain0 Region02            : 0x00000000d4017000-0x00000000d4017fff M: (I,R,W) S/U: (R,W)
> +   Domain0 Region03            : 0x00000000e081c000-0x00000000e081ffff M: (I,R,W) S/U: ()
> +   Domain0 Region04            : 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)
> +   Domain0 Next Address        : 0x0000000102000000
> +   Domain0 Next Arg1           : 0x0000000102091398
> +   Domain0 Next Mode           : S-mode
> +   Domain0 SysReset            : yes
> +   Domain0 SysSuspend          : yes
> +
> +   Boot HART ID                : 0
> +   Boot HART Domain            : root
> +   Boot HART Priv Version      : v1.12
> +   Boot HART Base ISA          : rv64imafdcbvhx
> +   Boot HART ISA Extensions    : smaia,smstateen,sscofpmf,sstc,zicntr,zihpm,smcntrpmf,zicboz,zicbom,svpbmt,sdtrig,svade,ssstateen,v,f,d
> +   Boot HART PMP Count         : 16
> +   Boot HART PMP Granularity   : 12 bits
> +   Boot HART PMP Address Bits  : 38
> +   Boot HART MHPM Info         : 16 (0x0007fff8)
> +   Boot HART Debug Triggers    : 4 triggers
> +   Boot HART MIDELEG           : 0x0000000000003666
> +   Boot HART MEDELEG           : 0x0000000000f0b509
> +
> +   <debug_uart>
> +
> +
> +   U-Boot 2026.10-rc4-00501-g9fba7b59df42 (Sep 22 2026 - 13:08:33 +0000)
> +
> +   DRAM:  16 GiB
> +   Core:  433 devices, 15 uclasses, devicetree: separate
> +   Loading Environment from nowhere...Loading Environment from nowhere... OK
> +   In:    serial@d4017000
> +   Out:   serial@d4017000
> +   Err:   serial@d4017000
> +   Net:   No ethernet found.
> +   =>
> 

Thanks for your work on this,

-E

Re: [PATCH v3 4/4] doc: spacemit: k3: Add Pico-ITX board

[Yixun Lan]

Hi E Shattow, 

On 05:43 Sat 03 Oct     , E Shattow wrote:
> Hi Yixun,
> 
> On 10/2/26 17:34, Yixun Lan wrote:
> > Add documentation for how to test the mainline U-Boot on SpacemiT
> > K3 Pico-ITX board, currently it still rely on using vendor FSBL.bin
> > file to initialize DDR and boot U-Boot proper, and the opensbi
> > firmware is built from an on-going mainline branch.
> > 
> > Signed-off-by: Yixun Lan <dlan@kernel.org>
> > ---
> >  doc/board/spacemit/index.rst             |   1 +
> >  doc/board/spacemit/spacemit-pico-itx.rst | 204 +++++++++++++++++++++++++++++++
> >  2 files changed, 205 insertions(+)
> > 
> > diff --git a/doc/board/spacemit/index.rst b/doc/board/spacemit/index.rst
> > index 71854e5735b..51918f0acc7 100644
> > --- a/doc/board/spacemit/index.rst
> > +++ b/doc/board/spacemit/index.rst
> > @@ -8,4 +8,5 @@ SpacemiT
> >     bananapi-f3
> >     k1-mmc
> >     k1-spl
> > +   spacemit-pico-itx
> >  
> > diff --git a/doc/board/spacemit/spacemit-pico-itx.rst b/doc/board/spacemit/spacemit-pico-itx.rst
> > new file mode 100644
> > index 00000000000..dd29e3c31c8
> > --- /dev/null
> > +++ b/doc/board/spacemit/spacemit-pico-itx.rst
> > @@ -0,0 +1,204 @@
> > +.. SPDX-License-Identifier: GPL-2.0-or-later
> > +
> > +SpacemiT K3 Pico-ITX
> > +====================
> > +
> > +Building
> > +~~~~~~~~
> > +1. Install the SpacemiT riscv cross compile toolchain_, or skip it if riscv toolchain is installed.
> > +
> > +.. _toolchain: https://archive.spacemit.com/toolchain/
> > +
> 
> Avoid the advertisement for any unnecessary vendor-specific information.
> 
Ok
> The packaged toolchain from any generic Linux distro is fine enough to
> build with as "1. Add a RISC-V toolchain to your PATH." and no other
> explanation is required.
> 
> I have tested with Debian forky/testing for example, it is fine. Code
> size differences between output of GCC major versions may be detailed in
> a future update if it becomes important.
> 
Ok, I generally agree, any riscv toolchain should works fine here,
no specific requirement, this is just a copy-and-poaste from K1 doc,
and should consider as one of many ways to setup compiling toolchain

> > +2. Setup cross compilation environment variable:
> > +
> > +.. code-block:: console
> > +
> > +   export CROSS_COMPILE=<riscv64 toolchain prefix, e.g /opt/spacemit/bin/riscv64-unknown-linux-gnu->
> > +
> 
> Likewise, it is enough to have "2. Set a cross-compilation environment
> variable if needed: export CROSS_COMPILE=<riscv64 toolchain prefix>"
> 
> There is much documentation about compiling U-Boot at
> doc/build/index.rst and so do not name a specific vendor toolchain path
> name here.
> 
Ok
> > +3. Before building U-Boot, OpenSBI should be built first. OpenSBI can be
> > +built for SpacemiT K1 SoC as below:
> 
> built for SpacemiT K3 SoC ?
> 
> However it is clearer to re-phrase that as a statement of requirements.
> "3. U-Boot for SpacemiT K3 SoC requires OpenSBI in-development generic
> platform object fw_dynamic.bin to be included in the Flattened Image
> Tree blob. OpenSBI may be first built as below: ..."
> 
> Please if it will help you then do copy any build examples adapted from
> my own writing in doc/board/starfive/jh7110_common.rst which contains a
> small error in build command details corrected at
> https://lore.kernel.org/u-boot/20260924063843.8934-1-e@freeshell.de/
> 
I will try to do some ajdustment to make it more generic..

> Additional phrasing may be as "Review the OpenSBI developer mailing list
> archives for patches to apply in support of SpacemiT K3 Pico-ITX". Let
> this be generic enough that we are not dead-linking to something 10
> years later when a user is viewing this old document from the future.
> 
But, well, either way isn't perfect, I didn't expect this is an unchanged
doc which will last 10years long, instead it should be kept improved.

> > +
> > +.. code-block:: console
> > +
> > +   git clone https://github.com/spacemit-com/opensbi-upstream opensbi
> > +   cd opensbi
> > +   make PLATFORM=generic
> 
> Please refer to upstream directly. I appreciate to make it convenient
> with patches curated on a fork repository but this is not durable for
> documentation purpose, is this going to exist in 2 years? 10 years? 20
Shouldn't be problem for 2years, while not sure for more than 10years,
but I don't think this is really a problem, see below

> years?. Mailing list archives are durable and if we depend on OpenSBI
> then I expect at least upstream OpenSBI git repository to be durable, too.
> 
I'd hope patches for opensbi will be finally accepted into mainline, then
update the doc here accordingly, providing a fork repo is just a conveniet
way for people to download, I could adjust to use mainline opensbi repo +
applying extra patches, but to be honest, I don't see that's much
different.. so, I'd rather not change it now, or let's say, do update the
doc when above fork repo is really broken/or opensbi patches accepted.

> > +
> > +4. Then build U-Boot as following:
> > +
> > +.. code-block:: console
> > +
> > +   cd <U-Boot-dir>
> > +   make spacemit_k3_defconfig
> > +   make OPENSBI=<OpenSBI-dir>/build/platform/generic/firmware/fw_dynamic.bin
> > +
> > +This will generate u-boot.itb
> > +
> > +Testing
> > +~~~~~~~
> > +Currently, in this stage, the U-Boot SPL isn't ready, and has no ddr initialization code
> 
> Instead, as "Currently there is no U-Boot SPL build target. It is
> required to use 'FSBL.bin' vendor board support package SPL for DDR
> initialization and testing u-boot.itb"
> 
Ok

> May SPI NOR be erased empty? what exactly must be present in SPI NOR for
> successful testing?
> 
Doesn't matter if there is fw present in SPI NOR, for my testing, my
board do has SPI nor firmware exist

> > +Thus please test with fasboot command via USB download.
> 
> fastboot
> 
thanks

> > +
> > +First, retrieve Bianbu Linux image from archive_ and extract the FSBL.bin firmware.
> 
> We should build any out-of-tree dependencies (FSBL.bin) from from source
> if it is possible. This is a cheap operation to 'git remote add -f
> spacemit-com https://...spacemit-com/uboot-2022.10' on an existing
> u-boot git repo.
> 
> Assume SPI NOR content is erased. Is there something vendor-specific you
> need that is not available by compiling spacemit-com k3-br-v1.0.y branch?
> 
I don't want to put too much effort to document about building vendor-specific
firmware.. currently, providing one way to test is enough, since there is a
work-on-porgress project, and we target having a mainline SPL support in
tree finally

-- 
Yixun Lan (dlan)