From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
BillXiang <xiangwencheng@lanxincomputing.com>
Cc: mst@redhat.com, pbonzini@redhat.com, peterx@redhat.com,
philmd@mailo.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Subject: Re: [PATCH v2] virtio: Add aligned ld/st accessors for vring
Date: Fri, 21 Aug 2026 10:32:42 -0700 [thread overview]
Message-ID: <bad5c8b3-668f-4893-974f-9dbca8dc6893@linaro.org> (raw)
In-Reply-To: <CAFEAcA_kLpaz0UQi3Q315kLVqvDtxKh77kU2meN9G1_evfKBeQ@mail.gmail.com>
On 8/21/26 03:25, Peter Maydell wrote:
> I'm tempted to suggest some kind of "if pointer is aligned take
> aligned path, otherwise take slow path" either here or actually
> in lduw_le_p(), but maybe that's a bad idea. Richard ?
>
> (I have a suspicion that other places than this one will assume
> that an aligned ldl_he_p() is not going to tear.)
I agree -- I expect most everything assumes ldl_he_p won't tear for aligned accesses.
This kinda begs the question of what atomicity the caller expects. It's not implausible
that an x86 path expects even unaligned accesses not crossing a cacheline to be atomic,
since that's been a thing since 1995. I expect both IBM architectures similarly expect
atomicity by alignment, since that's been a thing for s390 since yonks and Power has the
same language.
We have a bunch of code in accel/tcg/ldst_atomicity.c.inc that can handle this, we'd just
need to provide it with the correct inputs. And I assume we'd still like to inline the
single access on appropriate hosts.
r~
next prev parent reply other threads:[~2026-08-21 17:33 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-21 10:08 [PATCH v2] virtio: Add aligned ld/st accessors for vring BillXiang
2026-08-21 10:25 ` Peter Maydell
2026-08-21 17:32 ` Richard Henderson [this message]
2026-08-24 4:19 ` BillXiang
2026-08-24 15:23 ` Peter Xu
2026-09-01 2:44 ` BillXiang
2026-09-04 13:34 ` Peter Xu
2026-09-07 10:11 ` BillXiang
2026-09-07 10:29 ` Peter Maydell
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