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From: Lu Baolu <baolu.lu@linux.intel.com>
To: "Liu, Yi L" <yi.l.liu@intel.com>, Joerg Roedel <joro@8bytes.org>,
	David Woodhouse <dwmw2@infradead.org>
Cc: baolu.lu@linux.intel.com, "Raj, Ashok" <ashok.raj@intel.com>,
	"Kumar, Sanjay K" <sanjay.k.kumar@intel.com>,
	"Pan, Jacob jun" <jacob.jun.pan@intel.com>,
	"Tian, Kevin" <kevin.tian@intel.com>,
	"Sun, Yi Y" <yi.y.sun@intel.com>,
	"peterx@redhat.com" <peterx@redhat.com>,
	Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: Re: [PATCH v4 04/12] iommu/vt-d: Add 256-bit invalidation descriptor support
Date: Thu, 8 Nov 2018 14:15:26 +0800	[thread overview]
Message-ID: <bcc65c15-b76b-7af1-ca9f-e8818374a329@linux.intel.com> (raw)
In-Reply-To: <A2975661238FB949B60364EF0F2C257439D60599@SHSMSX104.ccr.corp.intel.com>



On 11/8/18 1:48 PM, Liu, Yi L wrote:
>> From: Liu, Yi L
>> Sent: Thursday, November 8, 2018 1:45 PM
>>>>>>> +			memcpy(desc, qi->desc + (wait_index << shift),
>>>>>>
>>>>>> Would "memcpy(desc, (unsigned long long) (qi->desc +  (wait_index
>>>>>> << shift)," be more safe?
>>>>>
>>>>> Can that be compiled? memcpy() requires a "const void *" for the
>>>>> second
>>> parameter.
>>>>> By the way, why it's safer with this casting?
>>>>
>>>> This is just an example. My point is the possibility that "qi->desc
>>>> + (wait_index <<
>>> shift)"
>>>> would be treated as "qi->desc plus (wait_index <<
>>>> shift)*sizeof(*qi->desc)". Is it possible for kernel build?
>>>
>>> qi->desc is of type of "void *".
>>
>> no, I don’t think so... Refer to the code below. Even it has no correctness issue her,
>> It's not due to qi->desc is "void *" type...
>>
>> struct qi_desc {
>> -	u64 low, high;
>> +	u64 qw0;
>> +	u64 qw1;
>> +	u64 qw2;
>> +	u64 qw3;
>> };
> 
> Oops, just see you modified it to be "void *" in this patch. Ok, then this is fair enough.

Yes. :-)

Best regards,
Lu Baolu

  reply	other threads:[~2018-11-08  6:15 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-05  5:31 [PATCH v4 00/12] iommu/vt-d: Add scalable mode support Lu Baolu
2018-11-05  5:31 ` Lu Baolu
2018-11-05  5:31 ` [PATCH v4 01/12] iommu/vt-d: Enumerate the scalable mode capability Lu Baolu
2018-11-05  5:31 ` [PATCH v4 02/12] iommu/vt-d: Manage scalalble mode PASID tables Lu Baolu
2018-11-05  5:31 ` [PATCH v4 03/12] iommu/vt-d: Move page table helpers into header Lu Baolu
2018-11-07  7:41   ` Liu, Yi L
2018-11-05  5:31 ` [PATCH v4 04/12] iommu/vt-d: Add 256-bit invalidation descriptor support Lu Baolu
2018-11-07  6:07   ` Liu, Yi L
     [not found]     ` <A2975661238FB949B60364EF0F2C257439D5FAA2-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-11-08  2:16       ` Lu Baolu
2018-11-08  2:16         ` Lu Baolu
     [not found]         ` <a6e43ddd-0889-4a4a-b908-993db28c6d87-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-11-08  3:49           ` Liu, Yi L
2018-11-08  3:49             ` Liu, Yi L
     [not found]             ` <A2975661238FB949B60364EF0F2C257439D604DF-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-11-08  5:24               ` Lu Baolu
2018-11-08  5:24                 ` Lu Baolu
2018-11-08  5:45                 ` Liu, Yi L
2018-11-08  6:14                   ` Lu Baolu
     [not found]                     ` <ad4f7e5b-9af1-7134-a573-6e78184de0ee-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-11-08  7:20                       ` Liu, Yi L
2018-11-08  7:20                         ` Liu, Yi L
2018-11-09  1:39                         ` Lu Baolu
2018-11-09  2:59                           ` Liu, Yi L
2018-11-08  5:48                 ` Liu, Yi L
2018-11-08  5:48                   ` Liu, Yi L
2018-11-08  6:15                   ` Lu Baolu [this message]
2018-11-05  5:31 ` [PATCH v4 05/12] iommu/vt-d: Reserve a domain id for FL and PT modes Lu Baolu
2018-11-07  6:55   ` Liu, Yi L
     [not found]     ` <A2975661238FB949B60364EF0F2C257439D5FAE7-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-11-08  2:22       ` Lu Baolu
2018-11-08  2:22         ` Lu Baolu
2018-11-05  5:31 ` [PATCH v4 06/12] iommu/vt-d: Add second level page table interface Lu Baolu
2018-11-07  7:13   ` Liu, Yi L
     [not found]     ` <A2975661238FB949B60364EF0F2C257439D5FB11-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-11-08  2:27       ` Lu Baolu
2018-11-08  2:27         ` Lu Baolu
2018-11-08  4:00         ` Liu, Yi L
2018-11-05  5:31 ` [PATCH v4 07/12] iommu/vt-d: Setup pasid entry for RID2PASID support Lu Baolu
2018-11-05  5:31 ` [PATCH v4 08/12] iommu/vt-d: Pass pasid table to context mapping Lu Baolu
2018-11-07  7:25   ` Liu, Yi L
2018-11-08  2:34     ` Lu Baolu
2018-11-05  5:31 ` [PATCH v4 09/12] iommu/vt-d: Setup context and enable RID2PASID support Lu Baolu
2018-11-05  5:31 ` [PATCH v4 10/12] iommu/vt-d: Add first level page table interface Lu Baolu
     [not found]   ` <20181105053151.7173-11-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-11-07  7:34     ` Liu, Yi L
2018-11-07  7:34       ` Liu, Yi L
2018-11-05  5:31 ` [PATCH v4 11/12] iommu/vt-d: Shared virtual address in scalable mode Lu Baolu
     [not found]   ` <20181105053151.7173-12-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-11-05  7:15     ` Christoph Hellwig
2018-11-05  7:15       ` Christoph Hellwig
2018-11-05  7:17       ` Lu Baolu
2018-11-05  5:31 ` [PATCH v4 12/12] iommu/vt-d: Remove deferred invalidation Lu Baolu

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