* [PATCH v2 2/2] phy: rockchip: inno-usb2: Add usb2 phy support for rk3562
@ 2025-04-15 5:00 ` Kever Yang
0 siblings, 0 replies; 15+ messages in thread
From: Kever Yang @ 2025-04-15 5:00 UTC (permalink / raw)
To: heiko
Cc: linux-rockchip, Frank Wang, William Wu, Kever Yang, Vinod Koul,
linux-kernel, linux-phy, Kishon Vijay Abraham I, linux-arm-kernel
From: Frank Wang <frank.wang@rock-chips.com>
RK3652 has one USB2.0 PHY with two ports, the OTG port support OTG
and BC1.2, the SoC provide USB GRF and APB to access the registers.
This adds vbus detection function control and make the below tuning
to enhance the usb2-phy SQ for RK3562 SoC.
- enable pre-emphasis during non-chirp phase
- set HS eye height to 425mv
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
Changes in v2:
- Update the commit msg and collect review tag;
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index b5e6a864deeb..ada1f02601ef 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1892,6 +1892,54 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
{ /* sentinel */ }
};
+static const struct rockchip_usb2phy_cfg rk3562_phy_cfgs[] = {
+ {
+ .reg = 0xff740000,
+ .num_ports = 2,
+ .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
+ .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
+ .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
+ .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+ .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
+ .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
+ .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
+ .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
+ .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
+ .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
+ .ls_det_en = { 0x0110, 0, 0, 0, 1 },
+ .ls_det_st = { 0x0114, 0, 0, 0, 1 },
+ .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
+ .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
+ .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
+ .utmi_ls = { 0x0120, 5, 4, 0, 1 },
+ },
+ [USB2PHY_PORT_HOST] = {
+ .phy_sus = { 0x0104, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0110, 1, 1, 0, 1 },
+ .ls_det_st = { 0x0114, 1, 1, 0, 1 },
+ .ls_det_clr = { 0x0118, 1, 1, 0, 1 },
+ .utmi_ls = { 0x0120, 17, 16, 0, 1 },
+ .utmi_hstdet = { 0x0120, 19, 19, 0, 1 }
+ }
+ },
+ .chg_det = {
+ .cp_det = { 0x0120, 24, 24, 0, 1 },
+ .dcp_det = { 0x0120, 23, 23, 0, 1 },
+ .dp_det = { 0x0120, 25, 25, 0, 1 },
+ .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
+ .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
+ .idp_src_en = { 0x0108, 9, 9, 0, 1 },
+ .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
+ .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
+ .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
+ },
+ },
+ { /* sentinel */ }
+};
+
static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
{
.reg = 0xfe8a0000,
@@ -2210,6 +2258,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+ { .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
{ .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
--
2.25.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 2/2] phy: rockchip: inno-usb2: Add usb2 phy support for rk3562
@ 2025-04-15 5:00 ` Kever Yang
0 siblings, 0 replies; 15+ messages in thread
From: Kever Yang @ 2025-04-15 5:00 UTC (permalink / raw)
To: heiko
Cc: linux-rockchip, Frank Wang, William Wu, Kever Yang, Vinod Koul,
linux-kernel, linux-phy, Kishon Vijay Abraham I, linux-arm-kernel
From: Frank Wang <frank.wang@rock-chips.com>
RK3652 has one USB2.0 PHY with two ports, the OTG port support OTG
and BC1.2, the SoC provide USB GRF and APB to access the registers.
This adds vbus detection function control and make the below tuning
to enhance the usb2-phy SQ for RK3562 SoC.
- enable pre-emphasis during non-chirp phase
- set HS eye height to 425mv
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
Changes in v2:
- Update the commit msg and collect review tag;
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index b5e6a864deeb..ada1f02601ef 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1892,6 +1892,54 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
{ /* sentinel */ }
};
+static const struct rockchip_usb2phy_cfg rk3562_phy_cfgs[] = {
+ {
+ .reg = 0xff740000,
+ .num_ports = 2,
+ .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
+ .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
+ .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
+ .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+ .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
+ .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
+ .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
+ .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
+ .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
+ .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
+ .ls_det_en = { 0x0110, 0, 0, 0, 1 },
+ .ls_det_st = { 0x0114, 0, 0, 0, 1 },
+ .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
+ .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
+ .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
+ .utmi_ls = { 0x0120, 5, 4, 0, 1 },
+ },
+ [USB2PHY_PORT_HOST] = {
+ .phy_sus = { 0x0104, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0110, 1, 1, 0, 1 },
+ .ls_det_st = { 0x0114, 1, 1, 0, 1 },
+ .ls_det_clr = { 0x0118, 1, 1, 0, 1 },
+ .utmi_ls = { 0x0120, 17, 16, 0, 1 },
+ .utmi_hstdet = { 0x0120, 19, 19, 0, 1 }
+ }
+ },
+ .chg_det = {
+ .cp_det = { 0x0120, 24, 24, 0, 1 },
+ .dcp_det = { 0x0120, 23, 23, 0, 1 },
+ .dp_det = { 0x0120, 25, 25, 0, 1 },
+ .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
+ .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
+ .idp_src_en = { 0x0108, 9, 9, 0, 1 },
+ .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
+ .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
+ .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
+ },
+ },
+ { /* sentinel */ }
+};
+
static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
{
.reg = 0xfe8a0000,
@@ -2210,6 +2258,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+ { .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
{ .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
--
2.25.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH v2 2/2] phy: rockchip: inno-usb2: Add usb2 phy support for rk3562
2025-04-15 5:00 ` Kever Yang
(?)
@ 2025-05-07 2:06 ` Kever Yang
-1 siblings, 0 replies; 15+ messages in thread
From: Kever Yang @ 2025-05-07 2:06 UTC (permalink / raw)
To: Vinod Koul
Cc: linux-rockchip, Frank Wang, William Wu, linux-kernel, linux-phy,
Kishon Vijay Abraham I, linux-arm-kernel, Heiko Stübner
Hi Vinod,
Do you have any comments for this patch set?
Please let me know if there is anything need to update.
Thanks,
- Kever
On 2025/4/15 13:00, Kever Yang wrote:
> From: Frank Wang <frank.wang@rock-chips.com>
>
> RK3652 has one USB2.0 PHY with two ports, the OTG port support OTG
> and BC1.2, the SoC provide USB GRF and APB to access the registers.
>
> This adds vbus detection function control and make the below tuning
> to enhance the usb2-phy SQ for RK3562 SoC.
> - enable pre-emphasis during non-chirp phase
> - set HS eye height to 425mv
>
> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
> Signed-off-by: William Wu <william.wu@rock-chips.com>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>
> Changes in v2:
> - Update the commit msg and collect review tag;
>
> drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index b5e6a864deeb..ada1f02601ef 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1892,6 +1892,54 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
> { /* sentinel */ }
> };
>
> +static const struct rockchip_usb2phy_cfg rk3562_phy_cfgs[] = {
> + {
> + .reg = 0xff740000,
> + .num_ports = 2,
> + .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
> + .port_cfgs = {
> + [USB2PHY_PORT_OTG] = {
> + .phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
> + .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
> + .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
> + .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
> + .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
> + .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
> + .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
> + .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
> + .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
> + .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
> + .ls_det_en = { 0x0110, 0, 0, 0, 1 },
> + .ls_det_st = { 0x0114, 0, 0, 0, 1 },
> + .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
> + .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
> + .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
> + .utmi_ls = { 0x0120, 5, 4, 0, 1 },
> + },
> + [USB2PHY_PORT_HOST] = {
> + .phy_sus = { 0x0104, 8, 0, 0x1d2, 0x1d1 },
> + .ls_det_en = { 0x0110, 1, 1, 0, 1 },
> + .ls_det_st = { 0x0114, 1, 1, 0, 1 },
> + .ls_det_clr = { 0x0118, 1, 1, 0, 1 },
> + .utmi_ls = { 0x0120, 17, 16, 0, 1 },
> + .utmi_hstdet = { 0x0120, 19, 19, 0, 1 }
> + }
> + },
> + .chg_det = {
> + .cp_det = { 0x0120, 24, 24, 0, 1 },
> + .dcp_det = { 0x0120, 23, 23, 0, 1 },
> + .dp_det = { 0x0120, 25, 25, 0, 1 },
> + .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
> + .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
> + .idp_src_en = { 0x0108, 9, 9, 0, 1 },
> + .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
> + .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
> + .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
> + },
> + },
> + { /* sentinel */ }
> +};
> +
> static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
> {
> .reg = 0xfe8a0000,
> @@ -2210,6 +2258,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
> { .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
> { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
> { .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
> + { .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
> { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
> { .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
> { .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 2/2] phy: rockchip: inno-usb2: Add usb2 phy support for rk3562
@ 2025-05-07 2:06 ` Kever Yang
0 siblings, 0 replies; 15+ messages in thread
From: Kever Yang @ 2025-05-07 2:06 UTC (permalink / raw)
To: Vinod Koul
Cc: linux-rockchip, Frank Wang, William Wu, linux-kernel, linux-phy,
Kishon Vijay Abraham I, linux-arm-kernel, Heiko Stübner
Hi Vinod,
Do you have any comments for this patch set?
Please let me know if there is anything need to update.
Thanks,
- Kever
On 2025/4/15 13:00, Kever Yang wrote:
> From: Frank Wang <frank.wang@rock-chips.com>
>
> RK3652 has one USB2.0 PHY with two ports, the OTG port support OTG
> and BC1.2, the SoC provide USB GRF and APB to access the registers.
>
> This adds vbus detection function control and make the below tuning
> to enhance the usb2-phy SQ for RK3562 SoC.
> - enable pre-emphasis during non-chirp phase
> - set HS eye height to 425mv
>
> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
> Signed-off-by: William Wu <william.wu@rock-chips.com>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>
> Changes in v2:
> - Update the commit msg and collect review tag;
>
> drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index b5e6a864deeb..ada1f02601ef 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1892,6 +1892,54 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
> { /* sentinel */ }
> };
>
> +static const struct rockchip_usb2phy_cfg rk3562_phy_cfgs[] = {
> + {
> + .reg = 0xff740000,
> + .num_ports = 2,
> + .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
> + .port_cfgs = {
> + [USB2PHY_PORT_OTG] = {
> + .phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
> + .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
> + .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
> + .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
> + .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
> + .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
> + .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
> + .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
> + .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
> + .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
> + .ls_det_en = { 0x0110, 0, 0, 0, 1 },
> + .ls_det_st = { 0x0114, 0, 0, 0, 1 },
> + .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
> + .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
> + .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
> + .utmi_ls = { 0x0120, 5, 4, 0, 1 },
> + },
> + [USB2PHY_PORT_HOST] = {
> + .phy_sus = { 0x0104, 8, 0, 0x1d2, 0x1d1 },
> + .ls_det_en = { 0x0110, 1, 1, 0, 1 },
> + .ls_det_st = { 0x0114, 1, 1, 0, 1 },
> + .ls_det_clr = { 0x0118, 1, 1, 0, 1 },
> + .utmi_ls = { 0x0120, 17, 16, 0, 1 },
> + .utmi_hstdet = { 0x0120, 19, 19, 0, 1 }
> + }
> + },
> + .chg_det = {
> + .cp_det = { 0x0120, 24, 24, 0, 1 },
> + .dcp_det = { 0x0120, 23, 23, 0, 1 },
> + .dp_det = { 0x0120, 25, 25, 0, 1 },
> + .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
> + .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
> + .idp_src_en = { 0x0108, 9, 9, 0, 1 },
> + .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
> + .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
> + .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
> + },
> + },
> + { /* sentinel */ }
> +};
> +
> static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
> {
> .reg = 0xfe8a0000,
> @@ -2210,6 +2258,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
> { .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
> { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
> { .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
> + { .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
> { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
> { .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
> { .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 2/2] phy: rockchip: inno-usb2: Add usb2 phy support for rk3562
@ 2025-05-07 2:06 ` Kever Yang
0 siblings, 0 replies; 15+ messages in thread
From: Kever Yang @ 2025-05-07 2:06 UTC (permalink / raw)
To: Vinod Koul
Cc: linux-rockchip, Frank Wang, William Wu, linux-kernel, linux-phy,
Kishon Vijay Abraham I, linux-arm-kernel, Heiko Stübner
Hi Vinod,
Do you have any comments for this patch set?
Please let me know if there is anything need to update.
Thanks,
- Kever
On 2025/4/15 13:00, Kever Yang wrote:
> From: Frank Wang <frank.wang@rock-chips.com>
>
> RK3652 has one USB2.0 PHY with two ports, the OTG port support OTG
> and BC1.2, the SoC provide USB GRF and APB to access the registers.
>
> This adds vbus detection function control and make the below tuning
> to enhance the usb2-phy SQ for RK3562 SoC.
> - enable pre-emphasis during non-chirp phase
> - set HS eye height to 425mv
>
> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
> Signed-off-by: William Wu <william.wu@rock-chips.com>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>
> Changes in v2:
> - Update the commit msg and collect review tag;
>
> drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index b5e6a864deeb..ada1f02601ef 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1892,6 +1892,54 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
> { /* sentinel */ }
> };
>
> +static const struct rockchip_usb2phy_cfg rk3562_phy_cfgs[] = {
> + {
> + .reg = 0xff740000,
> + .num_ports = 2,
> + .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
> + .port_cfgs = {
> + [USB2PHY_PORT_OTG] = {
> + .phy_sus = { 0x0100, 8, 0, 0, 0x1d1 },
> + .bvalid_det_en = { 0x0110, 2, 2, 0, 1 },
> + .bvalid_det_st = { 0x0114, 2, 2, 0, 1 },
> + .bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
> + .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
> + .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
> + .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
> + .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
> + .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
> + .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
> + .ls_det_en = { 0x0110, 0, 0, 0, 1 },
> + .ls_det_st = { 0x0114, 0, 0, 0, 1 },
> + .ls_det_clr = { 0x0118, 0, 0, 0, 1 },
> + .utmi_avalid = { 0x0120, 10, 10, 0, 1 },
> + .utmi_bvalid = { 0x0120, 9, 9, 0, 1 },
> + .utmi_ls = { 0x0120, 5, 4, 0, 1 },
> + },
> + [USB2PHY_PORT_HOST] = {
> + .phy_sus = { 0x0104, 8, 0, 0x1d2, 0x1d1 },
> + .ls_det_en = { 0x0110, 1, 1, 0, 1 },
> + .ls_det_st = { 0x0114, 1, 1, 0, 1 },
> + .ls_det_clr = { 0x0118, 1, 1, 0, 1 },
> + .utmi_ls = { 0x0120, 17, 16, 0, 1 },
> + .utmi_hstdet = { 0x0120, 19, 19, 0, 1 }
> + }
> + },
> + .chg_det = {
> + .cp_det = { 0x0120, 24, 24, 0, 1 },
> + .dcp_det = { 0x0120, 23, 23, 0, 1 },
> + .dp_det = { 0x0120, 25, 25, 0, 1 },
> + .idm_sink_en = { 0x0108, 8, 8, 0, 1 },
> + .idp_sink_en = { 0x0108, 7, 7, 0, 1 },
> + .idp_src_en = { 0x0108, 9, 9, 0, 1 },
> + .rdm_pdwn_en = { 0x0108, 10, 10, 0, 1 },
> + .vdm_src_en = { 0x0108, 12, 12, 0, 1 },
> + .vdp_src_en = { 0x0108, 11, 11, 0, 1 },
> + },
> + },
> + { /* sentinel */ }
> +};
> +
> static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
> {
> .reg = 0xfe8a0000,
> @@ -2210,6 +2258,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
> { .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
> { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
> { .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
> + { .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
> { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
> { .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
> { .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
--
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