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* [DPDK/ethdev Bug 1934] Pollara 400 AI NIC does not have code for 400G
@ 2026-04-10  2:36 bugzilla
  0 siblings, 0 replies; only message in thread
From: bugzilla @ 2026-04-10  2:36 UTC (permalink / raw)
  To: dev

http://bugs.dpdk.org/show_bug.cgi?id=1934

            Bug ID: 1934
           Summary: Pollara 400 AI NIC does not have code for 400G
           Product: DPDK
           Version: 26.03
          Hardware: All
                OS: All
            Status: UNCONFIRMED
          Severity: critical
          Priority: Normal
         Component: ethdev
          Assignee: dev@dpdk.org
          Reporter: vipin.varghese@amd.com
  Target Milestone: ---

DPDK version: 26.03
PMD: driver/net/ionic

problem: as per dpdk patch
https://patchwork.dpdk.org/project/dpdk/patch/20251120183936.8699-1-andrew.boyer@amd.com/
Pollaro 400G is supported

code base:

 - file: ionic_if.h
```
/**
 * enum ionic_xcvr_pid - Supported link modes
 */
enum ionic_xcvr_pid {
        IONIC_XCVR_PID_UNKNOWN           = 0,

        /* CU */
        IONIC_XCVR_PID_QSFP_100G_CR4     = 1,
        IONIC_XCVR_PID_QSFP_40GBASE_CR4  = 2,
        IONIC_XCVR_PID_SFP_25GBASE_CR_S  = 3,
        IONIC_XCVR_PID_SFP_25GBASE_CR_L  = 4,
        IONIC_XCVR_PID_SFP_25GBASE_CR_N  = 5,

        /* Fiber */
        IONIC_XCVR_PID_QSFP_100G_AOC    = 50,
        IONIC_XCVR_PID_QSFP_100G_ACC    = 51,
        IONIC_XCVR_PID_QSFP_100G_SR4    = 52,
        IONIC_XCVR_PID_QSFP_100G_LR4    = 53,
        IONIC_XCVR_PID_QSFP_100G_ER4    = 54,
        IONIC_XCVR_PID_QSFP_40GBASE_ER4 = 55,
        IONIC_XCVR_PID_QSFP_40GBASE_SR4 = 56,
        IONIC_XCVR_PID_QSFP_40GBASE_LR4 = 57,
        IONIC_XCVR_PID_QSFP_40GBASE_AOC = 58,
        IONIC_XCVR_PID_SFP_25GBASE_SR   = 59,
        IONIC_XCVR_PID_SFP_25GBASE_LR   = 60,
        IONIC_XCVR_PID_SFP_25GBASE_ER   = 61,
        IONIC_XCVR_PID_SFP_25GBASE_AOC  = 62,
        IONIC_XCVR_PID_SFP_10GBASE_SR   = 63,
        IONIC_XCVR_PID_SFP_10GBASE_LR   = 64,
        IONIC_XCVR_PID_SFP_10GBASE_LRM  = 65,
        IONIC_XCVR_PID_SFP_10GBASE_ER   = 66,
        IONIC_XCVR_PID_SFP_10GBASE_AOC  = 67,
        IONIC_XCVR_PID_SFP_10GBASE_CU   = 68,
        IONIC_XCVR_PID_QSFP_100G_CWDM4  = 69,
        IONIC_XCVR_PID_QSFP_100G_PSM4   = 70,
        IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
};
```

 - file: ionic_ethdev.c
```
dev_info->speed_capa =
                RTE_ETH_LINK_SPEED_10G |
                RTE_ETH_LINK_SPEED_25G |
                RTE_ETH_LINK_SPEED_40G |
                RTE_ETH_LINK_SPEED_50G |
                RTE_ETH_LINK_SPEED_100G;

        } else {
                /* Interface is up */
                link.link_status = RTE_ETH_LINK_UP;
                link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
                switch (adapter->link_speed) {
                case  1000:
                        link.link_speed = RTE_ETH_SPEED_NUM_1G;
                        break;
                case  10000:
                        link.link_speed = RTE_ETH_SPEED_NUM_10G;
                        break;
                case  25000:
                        link.link_speed = RTE_ETH_SPEED_NUM_25G;
                        break;
                case  40000:
                        link.link_speed = RTE_ETH_SPEED_NUM_40G;
                        break;
                case  50000:
                        link.link_speed = RTE_ETH_SPEED_NUM_50G;
                        break;
                case 100000:
                        link.link_speed = RTE_ETH_SPEED_NUM_100G;
                        break;
                case 200000:
                        link.link_speed = RTE_ETH_SPEED_NUM_200G;
                        break;
                default:
                        link.link_speed = RTE_ETH_SPEED_NUM_NONE;
                        break;
                }
        }

        dev_info->speed_capa =
                RTE_ETH_LINK_SPEED_10G |
                RTE_ETH_LINK_SPEED_25G |
                RTE_ETH_LINK_SPEED_40G |
                RTE_ETH_LINK_SPEED_50G |
                RTE_ETH_LINK_SPEED_100G;

static inline uint32_t
ionic_parse_link_speeds(uint16_t link_speeds)
{
        if (link_speeds & RTE_ETH_LINK_SPEED_100G)
                return 100000;
        else if (link_speeds & RTE_ETH_LINK_SPEED_50G)
                return 50000;
        else if (link_speeds & RTE_ETH_LINK_SPEED_40G)
                return 40000;
        else if (link_speeds & RTE_ETH_LINK_SPEED_25G)
                return 25000;
        else if (link_speeds & RTE_ETH_LINK_SPEED_10G)
                return 10000;
        else
                return 0;
}
```

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2026-04-10  2:36 [DPDK/ethdev Bug 1934] Pollara 400 AI NIC does not have code for 400G bugzilla

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