[PATCH v3 00/12] doc: clean up README.rockchip

[PATCH v3 00/12] doc: clean up README.rockchip

[Johan Jonker]

The removal of README.rockchip is long over due.
Prepare and expand rockchip.rst with more info.
Move the still relavant parts from README.rockchip elsewhere.

Johan Jonker (12):
  rockchip: scripts: remove rkmux.py
  rockchip: doc: change TPL phrase
  rockchip: doc: add BootROM mode text
  rockchip: doc: remove TODO
  rockchip: doc: add more building instructions
  rockchip: doc: add more eMMC program examples
  rockchip: doc: add boot medium layout text
  rockchip: tools: add comment section to rksd.c
  rockchip: tools: add comment section to rkspi.c
  rockchip: tools: add comment section to rkimage.c
  rockchip: doc: rockusb: remove refer to README.rockchip
  rockchip: doc: remove README.rockchip

 MAINTAINERS                     |   1 -
 doc/README.rockchip             | 684 --------------------------------
 doc/README.rockusb              |   1 -
 doc/board/rockchip/rockchip.rst | 132 ++++--
 scripts/pylint.base             |   1 -
 tools/rkimage.c                 |   4 +-
 tools/rkmux.py                  | 218 ----------
 tools/rksd.c                    |  21 +-
 tools/rkspi.c                   |   6 +-
 9 files changed, 133 insertions(+), 935 deletions(-)
 delete mode 100644 doc/README.rockchip
 delete mode 100755 tools/rkmux.py

--
2.39.5

[PATCH v3 01/12] rockchip: scripts: remove rkmux.py

[Johan Jonker]

It's not U-Boot's core business to host a script
to create enums from datasheets where it's unknown
that it has ever been used for any Rockchip SoCs sold
after rk3288. We don't need it to compile, so remove this
relict from the past.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 MAINTAINERS         |   1 -
 doc/README.rockchip |   7 --
 scripts/pylint.base |   1 -
 tools/rkmux.py      | 218 --------------------------------------------
 4 files changed, 227 deletions(-)
 delete mode 100755 tools/rkmux.py

diff --git a/MAINTAINERS b/MAINTAINERS
index 53034b703df8..9660706ad5e1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -547,7 +547,6 @@ F:	drivers/spi/rk_spi.[ch]
 F:	tools/rkcommon.c
 F:	tools/rkcommon.h
 F:	tools/rkimage.c
-F:	tools/rkmux.py
 F:	tools/rksd.c
 F:	tools/rkspi.c

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 96fa49d697bc..5a608ed0bce3 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -651,13 +651,6 @@ SPI flash.

 See above for instructions on how to write a SPI image.

-rkmux.py
---------
-
-You can use this script to create #defines for SoC register access. See the
-script for usage.
-
-
 Device tree and driver model
 ----------------------------

diff --git a/scripts/pylint.base b/scripts/pylint.base
index bc39e2385a31..a0a473b6d998 100644
--- a/scripts/pylint.base
+++ b/scripts/pylint.base
@@ -298,7 +298,6 @@ tools_patman_status 8.52
 tools_patman_test_checkpatch 8.51
 tools_patman_test_settings 8.78
 tools_qconfig 9.79
-tools_rkmux 7.10
 tools_rmboard 8.06
 tools_u_bootlib___init__.py 0.00
 tools_u_bootlib___main__.py 7.78
diff --git a/tools/rkmux.py b/tools/rkmux.py
deleted file mode 100755
index 1226ee201c3b..000000000000
--- a/tools/rkmux.py
+++ /dev/null
@@ -1,218 +0,0 @@
-#!/usr/bin/env python3
-
-# Script to create enums from datasheet register tables
-#
-# Usage:
-#
-# First, create a text file from the datasheet:
-#    pdftotext -layout /path/to/rockchip-3288-trm.pdf /tmp/asc
-#
-# Then use this script to output the #defines for a particular register:
-#    ./tools/rkmux.py GRF_GPIO4C_IOMUX
-#
-# It will create output suitable for putting in a header file, with SHIFT and
-# MASK values for each bitfield in the register.
-#
-# Note: this tool is not perfect and you may need to edit the resulting code.
-# But it should speed up the process.
-
-import csv
-import re
-import sys
-
-tab_to_col = 3
-
-class RegField:
-    def __init__(self, cols=None):
-        if cols:
-            self.bits, self.attr, self.reset_val, self.desc = (
-                [x.strip() for x in cols])
-            self.desc = [self.desc]
-        else:
-            self.bits = ''
-            self.attr = ''
-            self.reset_val = ''
-            self.desc = []
-
-    def Setup(self, cols):
-        self.bits, self.attr, self.reset_val = cols[0:3]
-        if len(cols) > 3:
-            self.desc.append(cols[3])
-
-    def AddDesc(self, desc):
-        self.desc.append(desc)
-
-    def Show(self):
-        print(self)
-        print()
-        self.__init__()
-
-    def __str__(self):
-        return '%s,%s,%s,%s' % (self.bits, self.attr, self.reset_val,
-                                '\n'.join(self.desc))
-
-class Printer:
-    def __init__(self, name):
-        self.first = True
-        self.name = name
-        self.re_sel = re.compile("[1-9]'b([01]+): (.*)")
-
-    def __enter__(self):
-        return self
-
-    def __exit__(self, type, value, traceback):
-        if not self.first:
-            self.output_footer()
-
-    def output_header(self):
-        print('/* %s */' % self.name)
-        print('enum {')
-
-    def output_footer(self):
-        print('};');
-
-    def output_regfield(self, regfield):
-        lines = regfield.desc
-        field = lines[0]
-        #print 'field:', field
-        if field in ['reserved', 'reserve', 'write_enable', 'write_mask']:
-            return
-        if field.endswith('_sel') or field.endswith('_con'):
-            field = field[:-4]
-        elif field.endswith(' iomux'):
-            field = field[:-6]
-        elif field.endswith('_mode') or field.endswith('_mask'):
-            field = field[:-5]
-        #else:
-            #print 'bad field %s' % field
-            #return
-        field = field.upper()
-        if ':' in regfield.bits:
-            bit_high, bit_low = [int(x) for x in regfield.bits.split(':')]
-        else:
-            bit_high = bit_low = int(regfield.bits)
-        bit_width = bit_high - bit_low + 1
-        mask = (1 << bit_width) - 1
-        if self.first:
-            self.first = False
-            self.output_header()
-        else:
-            print()
-        out_enum(field, 'shift', bit_low)
-        out_enum(field, 'mask', mask)
-        next_val = -1
-        #print 'lines: %s', lines
-        for line in lines:
-            m = self.re_sel.match(line)
-            if m:
-                val, enum = int(m.group(1), 2), m.group(2)
-                if enum not in ['reserved', 'reserve']:
-                    out_enum(field, enum, val, val == next_val)
-                    next_val = val + 1
-
-
-def process_file(name, fd):
-    field = RegField()
-    reg = ''
-
-    fields = []
-
-    def add_it(field):
-        if field.bits:
-            if reg == name:
-                fields.append(field)
-            field = RegField()
-        return field
-
-    def is_field_start(line):
-       if '=' in line or '+' in line:
-           return False
-       if (line.startswith('gpio') or line.startswith('peri_') or
-                line.endswith('_sel') or line.endswith('_con')):
-           return True
-       if not ' ' in line: # and '_' in line:
-           return True
-       return False
-
-    for line in fd:
-        line = line.rstrip()
-        if line[:4] in ['GRF_', 'PMU_', 'CRU_']:
-            field = add_it(field)
-            reg = line
-            do_this = name == reg
-        elif not line or not line.startswith(' '):
-            continue
-        line = line.replace('\xe2\x80\x99', "'")
-        leading = len(line) - len(line.lstrip())
-        line = line.lstrip()
-        cols = re.split(' *', line, 3)
-        if leading > 15 or (len(cols) > 3 and is_field_start(cols[3])):
-            if is_field_start(line):
-                field = add_it(field)
-            field.AddDesc(line)
-        else:
-            if cols[0] == 'Bit' or len(cols) < 3:
-                continue
-            #print
-            #print field
-            field = add_it(field)
-            field.Setup(cols)
-    field = add_it(field)
-
-    with Printer(name) as printer:
-        for field in fields:
-            #print field
-            printer.output_regfield(field)
-            #print
-
-def out_enum(field, suffix, value, skip_val=False):
-    str = '%s_%s' % (field.upper(), suffix.upper())
-    if not skip_val:
-        tabs = tab_to_col - len(str) / 8
-        if value > 9:
-            val_str = '%#x' % value
-        else:
-            val_str = '%d' % value
-
-        str += '%s= %s' % ('\t' * tabs, val_str)
-    print('\t%s,' % str)
-
-# Process a CSV file, e.g. from tabula
-def process_csv(name, fd):
-    reader = csv.reader(fd)
-
-    rows = []
-
-    field = RegField()
-    for row in reader:
-        #print field.desc
-        if not row[0]:
-            field.desc.append(row[3])
-            continue
-        if field.bits:
-            if field.bits != 'Bit':
-                rows.append(field)
-        #print row
-        field = RegField(row)
-
-    with Printer(name) as printer:
-        for row in rows:
-            #print field
-            printer.output_regfield(row)
-            #print
-
-fname = sys.argv[1]
-name = sys.argv[2]
-
-# Read output from pdftotext -layout
-if 1:
-    with open(fname, 'r') as fd:
-        process_file(name, fd)
-
-# Use tabula
-# It seems to be better at outputting text for an entire cell in one cell.
-# But it does not always work. E.g. GRF_GPIO7CH_IOMUX.
-# So there is no point in using it.
-if 0:
-    with open(fname, 'r') as fd:
-        process_csv(name, fd)
--
2.39.5

Re: [PATCH v3 01/12] rockchip: scripts: remove rkmux.py

[Quentin Schulz]

Hi Johan,

On 7/30/26 3:32 PM, Johan Jonker wrote:
> It's not U-Boot's core business to host a script
> to create enums from datasheets where it's unknown
> that it has ever been used for any Rockchip SoCs sold
> after rk3288. We don't need it to compile, so remove this
> relict from the past.
> 

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>

Thanks!
Quentin

[PATCH v3 02/12] rockchip: doc: change TPL phrase

[Johan Jonker]

The TPL phrase in rockchip.rst has some spelling and logical
problems. Rewrite and add missing structure by changing to a
list view to better separate the 2 choices the user has to make.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---

Changed V3:
add commas
---
 doc/board/rockchip/rockchip.rst | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 9351a5b8eae7..5144cbccef78 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -219,9 +219,11 @@ For SoCs whose TF-A code is not available as open source, use BL31 binary provid
 TPL
 ^^^

-For some SoCs U-Boot sources lack of support to inizialize DRAM.
-In these cases, to get a fully functional image following :ref:`PackageWithTPLandSPL`, use DDR binary provided by Rockchip rkbin repository as ROCKCHIP_TPL when building U-Boot.
-Otherwise, follow :ref:`PackageWithRockchipMiniloader`.
+* For SoCs with U-Boot sources to initialize DRAM, follow
+  :ref:`PackageWithTPLandSPL`.
+* For SoCs without U-Boot sources to initialize DRAM use the DDR binary provided
+  by the Rockchip rkbin repository as ROCKCHIP_TPL when building U-Boot, then follow
+  :ref:`PackageWithRockchipMiniloader`.

 U-Boot
 ^^^^^^
--
2.39.5

Re: [PATCH v3 02/12] rockchip: doc: change TPL phrase

[Quentin Schulz via U-Boot]

Hi Johan,

On 7/30/26 3:33 PM, Johan Jonker wrote:
> The TPL phrase in rockchip.rst has some spelling and logical
> problems. Rewrite and add missing structure by changing to a
> list view to better separate the 2 choices the user has to make.
> 
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> 
> Changed V3:
> add commas
> ---
>   doc/board/rockchip/rockchip.rst | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 9351a5b8eae7..5144cbccef78 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -219,9 +219,11 @@ For SoCs whose TF-A code is not available as open source, use BL31 binary provid
>   TPL
>   ^^^
> 
> -For some SoCs U-Boot sources lack of support to inizialize DRAM.
> -In these cases, to get a fully functional image following :ref:`PackageWithTPLandSPL`, use DDR binary provided by Rockchip rkbin repository as ROCKCHIP_TPL when building U-Boot.
> -Otherwise, follow :ref:`PackageWithRockchipMiniloader`.
> +* For SoCs with U-Boot sources to initialize DRAM, follow
> +  :ref:`PackageWithTPLandSPL`.

If I remember correctly, it is possible to have an open-source DRAM init 
in U-Boot and still decide to go for the blob.

I think the point here is rather, if CONFIG_ROCKCHIP_EXTERNAL_TPL is 
set, set ROCKCHIP_TPL environment variable to the appropriate *ddr*.bin 
file you can find in rkbin git repository, which will be the TPL stage.

If not, then TPL will be U-Boot.

> +* For SoCs without U-Boot sources to initialize DRAM use the DDR binary provided
> +  by the Rockchip rkbin repository as ROCKCHIP_TPL when building U-Boot, then follow
> +  :ref:`PackageWithRockchipMiniloader`.
> 

This is... completely unrelated? miniloader seems to be appended after 
the DDR bin blob (see create idbloader.img step), so it simply isn't 
that. I'm wondering if this isn't some U-Boot proper from Rockchip? I 
have never used the miniloader knowingly so I don't know what it's 
supposed to do unfortunately.

In any case, I think the appropriate replacement is simply to mention 
CONFIG_ROCKCHIP_EXTERNAL_TPL and ROCKCHIP_TPL.

Cheers,
Quentin

[PATCH v3 03/12] rockchip: doc: add BootROM mode text

[Johan Jonker]

Add text that explains how to get into BootROM mode.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---

Changed V3:
remove MaskROM
reword connect
use eMMC
wrap
---
 doc/board/rockchip/rockchip.rst | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 5144cbccef78..fab1af73b22a 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -325,6 +325,22 @@ To build rk3588 boards:
         make evb-rk3588_defconfig
         make CROSS_COMPILE=aarch64-linux-gnu-

+BootROM mode
+------------
+
+Options to get your board into BootROM mode:
+
+* Holding the recovery button when you boot the board.
+* Remove the SD card.
+* Erase the NAND, eMMC or SPI chip part where the BootROM blocks are located.
+
+Methods of last resort (USE AT YOUR OWN RISK):
+
+* NAND: connect pin 8 and 9 of the NAND flash with a needle while
+  reconnecting to the USB OTG port to a PC.
+* eMMC: connect the clock line to ground while
+  reconnecting to the USB OTG port to a PC.
+
 Flashing
 --------

--
2.39.5

Re: [PATCH v3 03/12] rockchip: doc: add BootROM mode text

[Jonas Karlman]

Hi Johan,

On 7/30/2026 3:33 PM, Johan Jonker wrote:
> Add text that explains how to get into BootROM mode.
> 
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> 
> Changed V3:
> remove MaskROM
> reword connect
> use eMMC
> wrap
> ---
>  doc/board/rockchip/rockchip.rst | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> --
> 2.39.5
> 
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 5144cbccef78..fab1af73b22a 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -325,6 +325,22 @@ To build rk3588 boards:
>          make evb-rk3588_defconfig
>          make CROSS_COMPILE=aarch64-linux-gnu-
> 
> +BootROM mode
> +------------
> +
> +Options to get your board into BootROM mode:

We typically call this mode 'maskrom mode', i.e. the mode bootrom
fallback into that listens to 0x471/0x472 usb commands.

> +
> +* Holding the recovery button when you boot the board.

Holding a recovery button does not always take you to the maskrom mode,
it typically depends on current firmware and how such recovery button is
wired.

> +* Remove the SD card.

Maybe make this more generic, today we have e.g. SD card, eMMC modules
and UFS modules that can be removed from some boards.

> +* Erase the NAND, eMMC or SPI chip part where the BootROM blocks are located.

BootROM blocks is a bad phrase to use here, the BootROM is read-only and
located inside the SoC.

The intent here is likely closer to 'erase any storage media
containing boot firmware' or similar.

> +
> +Methods of last resort (USE AT YOUR OWN RISK):
> +
> +* NAND: connect pin 8 and 9 of the NAND flash with a needle while
> +  reconnecting to the USB OTG port to a PC.
> +* eMMC: connect the clock line to ground while
> +  reconnecting to the USB OTG port to a PC.

Not all boards get power from USB OTG port, so this phrase is maybe too
narrow?

The intent is likely that the pins should be connected/sorted for a
short period when the board is connected to power, so that bootrom
cannot locate any boot firmware and falls back into maskrom mode.

Regards,
Jonas

> +
>  Flashing
>  --------
> 

[PATCH v3 04/12] rockchip: doc: remove TODO

[Johan Jonker]

Don't try to guess the future consensus. And don't add
a TODO if you don't have the intent to send an immediate
follow up. Remove the TODO in a constantly changing document.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 doc/board/rockchip/rockchip.rst | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index fab1af73b22a..04ea191c0e1c 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -554,13 +554,6 @@ config-flash.ini:
         [OUTPUT]
         PATH=RK30xxLoader_uboot.bin

-TODO
-----
-
-- Add Rockchip idbloader image building
-- Add Rockchip TPL image building
-- Document SPI flash boot
-- Add missing SoC's with it boards list

 .. Jagan Teki <jagan@amarulasolutions.com>
 .. Wednesday 28 October 2020 06:47:26 PM IST
--
2.39.5

[PATCH v3 05/12] rockchip: doc: add more building instructions

[Johan Jonker]

Add more building instructions for existing SoCs.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 doc/board/rockchip/rockchip.rst | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 04ea191c0e1c..af5c00591234 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -241,6 +241,13 @@ To build px30 boards:
         make evb-px30_defconfig
         make CROSS_COMPILE=aarch64-linux-gnu-

+To build rk3036 boards:
+
+.. code-block:: bash
+
+        make evb-rk3036_defconfig
+        make CROSS_COMPILE=arm-linux-gnueabihf-
+
 To build rk3066 boards:

 .. code-block:: bash
@@ -248,6 +255,27 @@ To build rk3066 boards:
         make mk808_defconfig
         make CROSS_COMPILE=arm-linux-gnueabihf-

+To build rk3128 boards:
+
+.. code-block:: bash
+
+        make evb-rk3128_defconfig
+        make CROSS_COMPILE=arm-linux-gnueabihf-
+
+To build rk3188 boards:
+
+.. code-block:: bash
+
+        make rock_defconfig
+        make CROSS_COMPILE=arm-linux-gnueabihf-
+
+To build rk3229 boards:
+
+.. code-block:: bash
+
+        make evb-rk3229_defconfig
+        make CROSS_COMPILE=arm-linux-gnueabihf-
+
 To build rk3288 boards:

 .. code-block:: bash
--
2.39.5

[PATCH v3 06/12] rockchip: doc: add more eMMC program examples

[Johan Jonker]

There are more tools that can program a eMMC.
Add more eMMC program examples.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---

Changed V3:
use eMMC
use list per example
mention loader matching to SoC
---
 doc/board/rockchip/rockchip.rst | 47 +++++++++++++++++++++------------
 1 file changed, 30 insertions(+), 17 deletions(-)

diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index af5c00591234..c089419b65e5 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -393,36 +393,49 @@ To write an image that boots from a SD card (assumed to be /dev/sda):
 eMMC
 """"

-eMMC flash would probe on mmc0 in most of the Rockchip platforms.
+* Program example with fastboot for rk3399 and full U-Boot:

-Create GPT partition layout as defined in $partitions:
+  eMMC flash would probe on mmc0 in most of the Rockchip platforms.

-.. code-block:: bash
+  Create GPT partition layout as defined in $partitions:

-        mmc dev 0
-        gpt write mmc 0 $partitions
+  .. code-block:: bash

-Connect the USB-OTG cable between the host and a target device.
+          mmc dev 0
+          gpt write mmc 0 $partitions

-Launch fastboot on the target with:
+  Connect the USB-OTG cable between the host and a target device.

-.. code-block:: bash
+  Launch fastboot on the target with:

-        fastboot 0
+  .. code-block:: bash

-Upon a successful gadget connection the host shows the USB device with:
+          fastboot 0

-.. code-block:: bash
+  Upon a successful gadget connection the host shows the USB device with:

-        lsusb
-        # Bus 001 Device 020: ID 2207:330c Fuzhou Rockchip Electronics Company RK3399 in Mask ROM mode
+  .. code-block:: bash

-Program the flash with:
+          lsusb
+          # Bus 001 Device 020: ID 2207:330c Fuzhou Rockchip Electronics Company RK3399 in Mask ROM mode

-.. code-block:: bash
+  Program the flash with:
+
+  .. code-block:: bash
+
+          sudo fastboot -i 0x2207 flash loader1 idbloader.img
+          sudo fastboot -i 0x2207 flash loader2 u-boot.itb
+
+* Program example with rkdeveloptool for rk3308 in BootROM mode:
+
+  Use a loader binary that matches the SoC.
+
+  .. code-block:: bash

-        sudo fastboot -i 0x2207 flash loader1 idbloader.img
-        sudo fastboot -i 0x2207 flash loader2 u-boot.itb
+          rkdeveloptool db rk3308_loader_v1.26.117.bin
+          rkdeveloptool wl 0x40 idbloader.img
+          rkdeveloptool wl 0x4000 u-boot.itb
+          rkdeveloptool rd

 Note:

--
2.39.5

Re: [PATCH v3 06/12] rockchip: doc: add more eMMC program examples

[Jonas Karlman]

Hi Johan,

On 7/30/2026 3:34 PM, Johan Jonker wrote:
> There are more tools that can program a eMMC.
> Add more eMMC program examples.
> 
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> 
> Changed V3:
> use eMMC
> use list per example
> mention loader matching to SoC
> ---
>  doc/board/rockchip/rockchip.rst | 47 +++++++++++++++++++++------------
>  1 file changed, 30 insertions(+), 17 deletions(-)
> 
> --
> 2.39.5
> 
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index af5c00591234..c089419b65e5 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -393,36 +393,49 @@ To write an image that boots from a SD card (assumed to be /dev/sda):
>  eMMC
>  """"
> 
> -eMMC flash would probe on mmc0 in most of the Rockchip platforms.
> +* Program example with fastboot for rk3399 and full U-Boot:
> 
> -Create GPT partition layout as defined in $partitions:
> +  eMMC flash would probe on mmc0 in most of the Rockchip platforms.
> 
> -.. code-block:: bash
> +  Create GPT partition layout as defined in $partitions:

We should really discourage users from using this legacy GPT partition
layout, nothing in mainline U-Boot depends on it beside the use of the
loader1 and loader2 partition names in this docs.

Vendor U-Boot SPL even look up partition names for FIT payload, but
not the legacy names we have here.

And newer RK35xx SoCs we thankfully no longer define the this legacy
layout in a partitions env var :-)

> 
> -        mmc dev 0
> -        gpt write mmc 0 $partitions
> +  .. code-block:: bash
> 
> -Connect the USB-OTG cable between the host and a target device.
> +          mmc dev 0
> +          gpt write mmc 0 $partitions
> 
> -Launch fastboot on the target with:
> +  Connect the USB-OTG cable between the host and a target device.
> 
> -.. code-block:: bash
> +  Launch fastboot on the target with:
> 
> -        fastboot 0
> +  .. code-block:: bash
> 
> -Upon a successful gadget connection the host shows the USB device with:
> +          fastboot 0
> 
> -.. code-block:: bash
> +  Upon a successful gadget connection the host shows the USB device with:
> 
> -        lsusb
> -        # Bus 001 Device 020: ID 2207:330c Fuzhou Rockchip Electronics Company RK3399 in Mask ROM mode
> +  .. code-block:: bash
> 
> -Program the flash with:
> +          lsusb
> +          # Bus 001 Device 020: ID 2207:330c Fuzhou Rockchip Electronics Company RK3399 in Mask ROM mode
> 
> -.. code-block:: bash
> +  Program the flash with:
> +
> +  .. code-block:: bash
> +
> +          sudo fastboot -i 0x2207 flash loader1 idbloader.img
> +          sudo fastboot -i 0x2207 flash loader2 u-boot.itb
> +
> +* Program example with rkdeveloptool for rk3308 in BootROM mode:
> +
> +  Use a loader binary that matches the SoC.

I do not really like that we are adding new instructions that depends
on proprietary loader blobs.

The loader blobs (for newer SoCs) is typically just vendor ddr init and
vendor U-Boot SPL blobs running rockusb protocol.

If you insist on adding this section, please add instructions on where
you can get and build a new loaders, e.g. from rkbin repo by running

  tools/boot_merger RKBOOT/RK3308MINIALL.ini

> +
> +  .. code-block:: bash
> 
> -        sudo fastboot -i 0x2207 flash loader1 idbloader.img
> -        sudo fastboot -i 0x2207 flash loader2 u-boot.itb
> +          rkdeveloptool db rk3308_loader_v1.26.117.bin
> +          rkdeveloptool wl 0x40 idbloader.img
> +          rkdeveloptool wl 0x4000 u-boot.itb

I was hoping we could remove references to idbloader.img and u-boot.itb,
not adding more.

Maybe adding instructions on how you can use U-Boot proper to run 'ums'
or 'rockusb' command to write boot firmware to eMMC could be added
instead? :-)

Or my favorite way is to just load u-boot-rockchip.bin onto a SD-card
and just use 'load mmc' and 'mmc write' commands from U-Boot proper
itself, see [1].

[1] https://github.com/Kwiboo/u-boot-build

Regards,
Jonas

> +          rkdeveloptool rd
> 
>  Note:
> 

[PATCH v3 07/12] rockchip: doc: add boot medium layout text

[Johan Jonker]

Add text that explains the boot medium layout options.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---

Changed V3:
wrap
remove 'the'
use eMMC
add unit and block size
---
 doc/board/rockchip/rockchip.rst | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index c089419b65e5..6b9007103257 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -353,6 +353,32 @@ To build rk3588 boards:
         make evb-rk3588_defconfig
         make CROSS_COMPILE=aarch64-linux-gnu-

+Boot media layout
+-----------------
+
+The boot ROM only checks a boot medium for a limited number of pages or blocks
+for data. It is not possible to place these blocks randomly.
+
+* eMMC/SD card:
+
+  Rockchip uses a unified GPT partition layout for it's open source products.
+  With this GPT partition layout U-Boot can be compatible with other components,
+  like miniloader, trusted-os, arm-trusted-firmware.
+
+  There are some documents about partitions in the link below.
+  https://web.archive.org/web/20260501050119/https://opensource.rock-chips.com/wiki_Partitions
+
+  Write u-boot-rockchip.bin to block offset 64 (block size: 512 byte).
+
+* SPI:
+
+  Write u-boot-rockchip-spi.bin to flash offset 0 (unit: bytes).
+
+* NAND:
+
+  The closed source usbplug binaries and RKMTD use the NAND erase blocks [2-6]
+  for TPL/SPL.
+
 BootROM mode
 ------------

--
2.39.5

Re: [PATCH v3 07/12] rockchip: doc: add boot medium layout text

[Jonas Karlman]

Hi Johan,

On 7/30/2026 3:34 PM, Johan Jonker wrote:
> Add text that explains the boot medium layout options.
> 
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> 
> Changed V3:
> wrap
> remove 'the'
> use eMMC
> add unit and block size
> ---
>  doc/board/rockchip/rockchip.rst | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> --
> 2.39.5
> 
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index c089419b65e5..6b9007103257 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -353,6 +353,32 @@ To build rk3588 boards:
>          make evb-rk3588_defconfig
>          make CROSS_COMPILE=aarch64-linux-gnu-
> 
> +Boot media layout
> +-----------------
> +
> +The boot ROM only checks a boot medium for a limited number of pages or blocks

I do not like that we keep using inconsistent naming for 'BootROM'.

> +for data. It is not possible to place these blocks randomly.
> +
> +* eMMC/SD card:
> +
> +  Rockchip uses a unified GPT partition layout for it's open source products.
> +  With this GPT partition layout U-Boot can be compatible with other components,
> +  like miniloader, trusted-os, arm-trusted-firmware.
> +
> +  There are some documents about partitions in the link below.
> +  https://web.archive.org/web/20260501050119/https://opensource.rock-chips.com/wiki_Partitions

Please drop this entire 'unified GPT partition layout' section, it is
not something we should encourage user to use. It is legacy and nothing
in mainline U-Boot that depends on this layout.

It has mostly been used to simplify flashing and locating vendor boot
firmware.

For mainline a more appropriate layout would be to reserve initial 0-16
MiB of boot media for partition table and firmware, and use remaining
freely.

> +
> +  Write u-boot-rockchip.bin to block offset 64 (block size: 512 byte).
> +
> +* SPI:
> +
> +  Write u-boot-rockchip-spi.bin to flash offset 0 (unit: bytes).
> +
> +* NAND:
> +
> +  The closed source usbplug binaries and RKMTD use the NAND erase blocks [2-6]
> +  for TPL/SPL.
> +

We should likely also mention UFS if we are listing all other supported
boot media.

Regards,
Jonas

>  BootROM mode
>  ------------
> 

Re: [PATCH v3 07/12] rockchip: doc: add boot medium layout text

[Stefan Monnier]

Jonas Karlman [2026-07-31 10:32:03] wrote:
> On 7/30/2026 3:34 PM, Johan Jonker wrote:
>> +for data. It is not possible to place these blocks randomly.
>> +
>> +* eMMC/SD card:
>> +
>> +  Rockchip uses a unified GPT partition layout for it's open source products.
>> +  With this GPT partition layout U-Boot can be compatible with other components,
>> +  like miniloader, trusted-os, arm-trusted-firmware.
>> +
>> +  There are some documents about partitions in the link below.
>> +  https://web.archive.org/web/20260501050119/https://opensource.rock-chips.com/wiki_Partitions
>
> Please drop this entire 'unified GPT partition layout' section, it is
> not something we should encourage user to use. It is legacy and nothing
> in mainline U-Boot that depends on this layout.

At the very least we should distinguish what is technically needed from
what is some arbitrary convention that's been cargo-culted.

> For mainline a more appropriate layout would be to reserve initial 0-16
> MiB of boot media for partition table and firmware, and use remaining
> freely.

[ FWIW, I'm a big fan of having a partition to hold U-Boot, rather than
  hiding it in the first few unattributed blocks.  ]


=== Stefan

Re: [PATCH v3 07/12] rockchip: doc: add boot medium layout text

[Jonas Karlman]

Hi Stefan,

On 7/31/2026 5:10 PM, Stefan Monnier wrote:
> Jonas Karlman [2026-07-31 10:32:03] wrote:
>> On 7/30/2026 3:34 PM, Johan Jonker wrote:
>>> +for data. It is not possible to place these blocks randomly.
>>> +
>>> +* eMMC/SD card:
>>> +
>>> +  Rockchip uses a unified GPT partition layout for it's open source products.
>>> +  With this GPT partition layout U-Boot can be compatible with other components,
>>> +  like miniloader, trusted-os, arm-trusted-firmware.
>>> +
>>> +  There are some documents about partitions in the link below.
>>> +  https://web.archive.org/web/20260501050119/https://opensource.rock-chips.com/wiki_Partitions
>>
>> Please drop this entire 'unified GPT partition layout' section, it is
>> not something we should encourage user to use. It is legacy and nothing
>> in mainline U-Boot that depends on this layout.
> 
> At the very least we should distinguish what is technically needed from
> what is some arbitrary convention that's been cargo-culted.

I agree, and for MMC devices the BootROM typically look for the IDBlock
header at sector 64, 1088, 2112, 3136 and 4160 and does not care about
partitions.

U-Boot SPL will typically look for FIT (or u-boot.img) at sector 16384
(SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000). This can be adjusted or
re-configured to instead look for a specific partition with Kconfig
options, something that the khadas-edge2-rk3588s target does.

The legacy GPT partition layout is something that was inherited from old
vendor miniloader blobs. The miniloader looked for miniloader packed
U-Boot at the 'loader2' partition offset and trust (tf-a/optee) from a
'trust' partition offset. Newer vendor U-Boot SPL typically also look
for FIT at a partition named 'uboot' and falls back to sector 16384.

So the text to write u-boot-rockchip.bin at sector 64 is the only
relevant part of information for this section of the documentation.

It may also be worth mentioning that a filesystem should not be created
at 0-16 MiB of MMC device if boot firmware is also intended to be stored
on the same device to be safe for both vendor and mainline boot firmware,
at least for rk33xx and newer SoCs.

> 
>> For mainline a more appropriate layout would be to reserve initial 0-16
>> MiB of boot media for partition table and firmware, and use remaining
>> freely.
> 
> [ FWIW, I'm a big fan of having a partition to hold U-Boot, rather than
>   hiding it in the first few unattributed blocks.  ]

I agree, it can be useful to create one of more partitions to ease with
flashing a new u-boot-rockchip.bin to a 'firmware' partition or similar.

Regards,
Jonas

> 
> === Stefan
> 

Re: [PATCH 1/9] ram: rockchip: rk3568: Simplify get_info() ops

[Stefan Monnier]

> +#define PMUGRF_BASE			0xfdc20000

Could we get some comment here (or in the file header) hinting at where
the magic number comes from?


=== Stefan

Re: [PATCH 1/9] ram: rockchip: rk3568: Simplify get_info() ops

[Jonas Karlman]

Hi Stefan,

On 8/4/2026 5:38 PM, Stefan Monnier wrote:
>> +#define PMUGRF_BASE			0xfdc20000
> 
> Could we get some comment here (or in the file header) hinting at where
> the magic number comes from?

I do not think that is necessary, we have defined base addresses all
over Rockchip platform without any such comment.

The base addresses are clearly stated in both SoC TRM and the SoC DT.

  RK3568 TRM - Table 1-1 Address Mapping
  module	start address	size
  PMU_GRF	0xFDC20000	64KB

and

  pmugrf: syscon@fdc20000 {
  	compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
	reg = <0x0 0xfdc20000 0x0 0x10000>;
  };

Regards,
Jonas

> 
> 
> === Stefan
> 

[PATCH v3 08/12] rockchip: tools: add comment section to rksd.c

[Johan Jonker]

README.rockchip must be removed.
Move the rksd comment section to rksd.c

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 tools/rksd.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/tools/rksd.c b/tools/rksd.c
index 7d46a1b07b3a..ea12b9cac12e 100644
--- a/tools/rksd.c
+++ b/tools/rksd.c
@@ -3,7 +3,26 @@
  * (C) Copyright 2015 Google,  Inc
  * Written by Simon Glass <sjg@chromium.org>
  *
- * See README.rockchip for details of the rksd format
+ * rksd.c produces an image consisting of 32KB of empty space, a header and
+ * u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
+ * most of the fields are unused by U-Boot. We just need to specify the
+ * signature, a flag and the block offset and size of the SPL image.
+ *
+ * The header occupies a single block but we pad it out to 4 blocks. The header
+ * is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
+ * image can be encoded too but we don't do that.
+ *
+ * The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
+ * or 0x40 blocks. This is a severe and annoying limitation. There may be a way
+ * around this limitation, since there is plenty of SRAM, but at present the
+ * board refuses to boot if this limit is exceeded.
+ *
+ * The image produced is padded up to a block boundary (512 bytes). It should be
+ * written to the start of an SD card using dd.
+ *
+ * Since this image is set to load U-Boot from the SD card at block offset,
+ * CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
+ * u-boot-dtb.img to the SD card at that offset.
  */

 #include "imagetool.h"
--
2.39.5

Re: [PATCH v3 08/12] rockchip: tools: add comment section to rksd.c

[Jonas Karlman]

Hi Johan,

On 7/30/2026 3:35 PM, Johan Jonker wrote:
> README.rockchip must be removed.
> Move the rksd comment section to rksd.c
> 
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
>  tools/rksd.c | 21 ++++++++++++++++++++-
>  1 file changed, 20 insertions(+), 1 deletion(-)
> 
> --
> 2.39.5
> 
> diff --git a/tools/rksd.c b/tools/rksd.c
> index 7d46a1b07b3a..ea12b9cac12e 100644
> --- a/tools/rksd.c
> +++ b/tools/rksd.c
> @@ -3,7 +3,26 @@
>   * (C) Copyright 2015 Google,  Inc
>   * Written by Simon Glass <sjg@chromium.org>
>   *
> - * See README.rockchip for details of the rksd format
> + * rksd.c produces an image consisting of 32KB of empty space, a header and
> + * u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
> + * most of the fields are unused by U-Boot. We just need to specify the
> + * signature, a flag and the block offset and size of the SPL image.
> + *
> + * The header occupies a single block but we pad it out to 4 blocks. The header
> + * is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
> + * image can be encoded too but we don't do that.
> + *
> + * The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
> + * or 0x40 blocks. This is a severe and annoying limitation. There may be a way
> + * around this limitation, since there is plenty of SRAM, but at present the
> + * board refuses to boot if this limit is exceeded.
> + *
> + * The image produced is padded up to a block boundary (512 bytes). It should be
> + * written to the start of an SD card using dd.
> + *
> + * Since this image is set to load U-Boot from the SD card at block offset,
> + * CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
> + * u-boot-dtb.img to the SD card at that offset.

Not sure where you got this text from, but it seem to be very outdated and
not fully applicable.

Some examples of incorrect information:
- 32 kb size is not fixed, it is now treated as a soc specific limit
  defined in rkcommon.c
- u-boot-spl-dtb.bin is not really used or picked anymore, the binman
  mkimage node in rockchip-u-boot.dtsi determines what payload is added
  as the secondary image.
- 'struct header0_info' is only correct for v1 format, not for v2 format.
- rc4 encoding is only applicable to v1 format
- image should not be written to start of sd card
- u-boot-dtb.img should no longer be used

Most of this information is already declared inside rkcommon.c or in
rockchip.rst, maybe we can just drop this?

Regards,
Jonas

>   */
> 
>  #include "imagetool.h"

[PATCH v3 09/12] rockchip: tools: add comment section to rkspi.c

[Johan Jonker]

README.rockchip must be removed.
Move the rkspi comment section to rkspi.c

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 tools/rkspi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/rkspi.c b/tools/rkspi.c
index f2530f7bde34..4f98a60a0692 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -3,7 +3,11 @@
  * (C) Copyright 2015 Google,  Inc
  * Written by Simon Glass <sjg@chromium.org>
  *
- * See README.rockchip for details of the rkspi format
+ * rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin.
+ * The resulting image is then spread out so that only the first 2KB of each 4KB
+ * sector is used. The header is the same as with rksd and the maximum size is
+ * also 32KB (before spreading). The image should be written to the start of
+ * SPI flash.
  */

 #include "imagetool.h"
--
2.39.5

Re: [PATCH v3 09/12] rockchip: tools: add comment section to rkspi.c

[Jonas Karlman]

Hi Johan,

On 7/30/2026 3:35 PM, Johan Jonker wrote:
> README.rockchip must be removed.
> Move the rkspi comment section to rkspi.c
> 
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
>  tools/rkspi.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> --
> 2.39.5
> 
> diff --git a/tools/rkspi.c b/tools/rkspi.c
> index f2530f7bde34..4f98a60a0692 100644
> --- a/tools/rkspi.c
> +++ b/tools/rkspi.c
> @@ -3,7 +3,11 @@
>   * (C) Copyright 2015 Google,  Inc
>   * Written by Simon Glass <sjg@chromium.org>
>   *
> - * See README.rockchip for details of the rkspi format
> + * rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin.

As for rksd, 'u-boot-spl-dtb.bin' is not really used, binman mkimage
node select what images is used. Typically TPL + SPL, or SPL + proper.

> + * The resulting image is then spread out so that only the first 2KB of each 4KB
> + * sector is used. The header is the same as with rksd and the maximum size is
> + * also 32KB (before spreading). The image should be written to the start of

The size limit is also wrong here and is SoC specific and the offset
where the resulting mkimage should be written to is also SoC specific.

The offsets is only correct for u-boot-rockchip[-spi].bin files, not
for the images that mkimage produces.

The only information possible worth mentioning here is that the first
2KB of each 4KB page is used, but this is already documented further
down in this file.

Suggest you just drop the reference to README.rockchip here.

Regards,
Jonas

> + * SPI flash.
>   */
> 
>  #include "imagetool.h"

[PATCH v3 10/12] rockchip: tools: add comment section to rkimage.c

[Johan Jonker]

README.rockchip must be removed.
Move the rkimage comment section to rkimage.c

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
 tools/rkimage.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/rkimage.c b/tools/rkimage.c
index 1c5540b1c3d1..0cabdf2f6723 100644
--- a/tools/rkimage.c
+++ b/tools/rkimage.c
@@ -3,7 +3,9 @@
  * (C) Copyright 2015 Google, Inc
  * Written by Simon Glass <sjg@chromium.org>
  *
- * See README.rockchip for details of the rkimage format
+ * rkimage.c produces a SPL image suitable for sending directly to the boot ROM
+ * over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
+ * followed by u-boot-spl-dtb.bin.
  */

 #include "imagetool.h"
--
2.39.5

[PATCH v3 11/12] rockchip: doc: rockusb: remove refer to README.rockchip

[Johan Jonker]

README.rockchip must be removed.
Remove the refer to README.rockchip in README.rockusb

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
 doc/README.rockusb | 1 -
 1 file changed, 1 deletion(-)

diff --git a/doc/README.rockusb b/doc/README.rockusb
index 66437e17e46b..5b96467689b7 100644
--- a/doc/README.rockusb
+++ b/doc/README.rockusb
@@ -38,7 +38,6 @@ you want to write.
 sudo rkdeveloptool wl  <BeginSec> <File>

 to flash U-Boot image use below command. U-Boot binary is made by mkimage.
-see doc/README.rockchip for more detail about how to get U-Boot binary.

 sudo rkdeveloptool wl  64 <U-Boot binary>

--
2.39.5

[PATCH v3 12/12] rockchip: doc: remove README.rockchip

[Johan Jonker]

Remove README.rockchip for info that's already in
rockchip.rst or no longer applicable.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
 doc/README.rockchip | 677 --------------------------------------------
 1 file changed, 677 deletions(-)
 delete mode 100644 doc/README.rockchip

diff --git a/doc/README.rockchip b/doc/README.rockchip
deleted file mode 100644
index 5a608ed0bce3..000000000000
--- a/doc/README.rockchip
+++ /dev/null
@@ -1,677 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2015 Google. Inc
-# Written by Simon Glass <sjg@chromium.org>
-
-U-Boot on Rockchip
-==================
-
-A wide range of Rockchip SoCs are supported in mainline U-Boot
-
-Warning
-=======
-This document is being moved to doc/board/rockchip, so information on it
-might be incomplete or outdated.
-
-Prerequisites
-=============
-
-You will need:
-
-   - Firefly RK3288 board or something else with a supported RockChip SoC
-   - Power connection to 5V using the supplied micro-USB power cable
-   - Separate USB serial cable attached to your computer and the Firefly
-        (connect to the micro-USB connector below the logo)
-   - rkflashtool [3]
-   - openssl (sudo apt-get install openssl)
-   - Serial UART connection [4]
-   - Suitable ARM cross compiler, e.g.:
-        sudo apt-get install gcc-4.7-arm-linux-gnueabi
-
-Building
-========
-
-1. To build RK3288 board:
-
-   CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
-
-    (or you can use another cross compiler if you prefer)
-
-2. To build RK3308 board:
-
-   See doc/board/rockchip/rockchip.rst
-
-3. To build RK3399 board:
-
-   Option 1: Package the image with Rockchip miniloader:
-
-   - Compile U-Boot
-
-     => cd /path/to/u-boot
-     => make nanopi-neo4-rk3399_defconfig
-     => make
-
-   - Get the rkbin
-
-     => git clone https://github.com/rockchip-linux/rkbin.git
-
-   - Create trust.img
-
-     => cd /path/to/rkbin
-     => ./tools/trust_merger RKTRUST/RK3399TRUST.ini
-
-   - Create uboot.img
-
-     => cd /path/to/rkbin
-     => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img
-
-     (Get trust.img and uboot.img)
-
-   Option 2: Package the image with SPL:
-
-   - Export cross compiler path for aarch64
-
-   - Compile ATF
-
-     => git clone https://github.com/TrustedFirmware-A/trusted-firmware-a.git
-     => cd trusted-firmware-a
-
-     (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-)
-     => make realclean
-     => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
-
-    (export bl31.elf)
-    => export BL31=/path/to/trusted-firmware-a/build/rk3399/release/bl31/bl31.elf
-
-   - Compile PMU M0 firmware
-
-     This is optional for most of the rk3399 boards.
-
-     => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
-     => cd rk3399-cortex-m0
-
-     (export cross compiler path for Cortex-M0 PMU)
-     => make CROSS_COMPILE=arm-cortex_m0-eabi-
-
-     (export rk3399m0.bin)
-     => export PMUM0=/path/to/rk3399-cortex-m0/rk3399m0.bin
-
-   - Compile U-Boot
-
-     => cd /path/to/u-boot
-     => make orangepi-rk3399_defconfig
-     => make
-
-     (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
-      spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL
-
-      If TPL enabled on the target, get tpl/u-boot-tpl-dtb.bin or tpl/u-boot-tpl.bin
-      if CONFIG_TPL_OF_CONTROL not enabled)
-
-Writing to the board with USB
-=============================
-
-For USB to work you must get your board into ROM boot mode, either by erasing
-your MMC or (perhaps) holding the recovery button when you boot the board.
-To erase your MMC, you can boot into Linux and type (as root)
-
-   dd if=/dev/zero of=/dev/mmcblk0 bs=1M
-
-Connect your board's OTG port to your computer.
-
-To create a suitable image and write it to the board:
-
-   ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
-	./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
-   cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
-
-If all goes well you should something like:
-
-   U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
-   Card did not respond to voltage select!
-   spl: mmc init failed with error: -17
-   ### ERROR ### Please RESET the board ###
-
-You will need to reset the board before each time you try. Yes, that's all
-it does so far. If support for the Rockchip USB protocol or DFU were added
-in SPL then we could in principle load U-Boot and boot to a prompt from USB
-as several other platforms do. However it does not seem to be possible to
-use the existing boot ROM code from SPL.
-
-
-Writing to the eMMC with USB on ROC-RK3308-CC
-=============================================
-For USB to work you must get your board into Bootrom mode,
-either by erasing the eMMC or short circuit the GND and D0
-on core board.
-
-Connect the board to your computer via tyepc.
-=> rkdeveloptool db rk3308_loader_v1.26.117.bin
-=> rkdeveloptool wl 0x40 idbloader.img
-=> rkdeveloptool wl 0x4000 u-boot.itb
-=> rkdeveloptool rd
-
-Then you will see the boot log from Debug UART at baud rate 1500000:
-DDR Version V1.26
-REGFB: 0x00000032, 0x00000032
-In
-589MHz
-DDR3
- Col=10 Bank=8 Row=14 Size=256MB
-msch:1
-Returning to boot ROM...
-
-U-Boot SPL 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:04 +0800)
-Trying to boot from MMC1
-INFO:    Preloader serial: 2
-NOTICE:  BL31: v1.3(release):30f1405
-NOTICE:  BL31: Built : 17:08:28, Sep 23 2019
-INFO:    Lastlog: last=0x100000, realtime=0x102000, size=0x2000
-INFO:    ARM GICv2 driver initialized
-INFO:    Using opteed sec cpu_context!
-INFO:    boot cpu mask: 1
-INFO:    plat_rockchip_pmu_init: pd status 0xe b
-INFO:    BL31: Initializing runtime services
-WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will rK
-ERROR:   Error initializing runtime service opteed_fast
-INFO:    BL31: Preparing for EL3 exit to normal world
-INFO:    Entry point address = 0x600000
-INFO:    SPSR = 0x3c9
-
-
-U-Boot 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:47 +0800)
-
-Model: Firefly ROC-RK3308-CC board
-DRAM:  254 MiB
-MMC:   dwmmc@ff480000: 0, dwmmc@ff490000: 1
-rockchip_dnl_key_pressed read adc key val failed
-Net:   No ethernet found.
-Hit any key to stop autoboot:  0
-Card did not respond to voltage select!
-switch to partitions #0, OK
-mmc1(part 0) is current device
-Scanning mmc 1:4...
-Found /extlinux/extlinux.conf
-Retrieving file: /extlinux/extlinux.conf
-151 bytes read in 3 ms (48.8 KiB/s)
-1:      kernel-mainline
-Retrieving file: /Image
-14737920 bytes read in 377 ms (37.3 MiB/s)
-append: earlycon=uart8250,mmio32,0xff0c0000 console=ttyS2,1500000n8
-Retrieving file: /rk3308-roc-cc.dtb
-28954 bytes read in 4 ms (6.9 MiB/s)
-Flattened Device Tree blob at 01f00000
-Booting using the fdt blob at 0x1f00000
-## Loading Device Tree to 000000000df3a000, end 000000000df44119 ... OK
-
-Starting kernel ...
-[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd042]
-[    0.000000] Linux version 5.4.0-rc1-00040-g4dc2d508fa47-dirty (andy@B150) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-209
-[    0.000000] Machine model: Firefly ROC-RK3308-CC board
-[    0.000000] earlycon: uart8250 at MMIO32 0x00000000ff0c0000 (options '')
-[    0.000000] printk: bootconsole [uart8250] enabled
-
-Booting from an SD card
-=======================
-
-To write an image that boots from an SD card (assumed to be /dev/sdc):
-
-   ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
-	firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
-   sudo dd if=out of=/dev/sdc seek=64 && \
-   sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
-
-This puts the Rockchip header and SPL image first and then places the U-Boot
-image at block 16384 (i.e. 8MB from the start of the SD card). This
-corresponds with this setting in U-Boot:
-
-   #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x4000
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
-   U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
-
-   Model: Radxa Rock 2 Square
-   DRAM:  2 GiB
-   MMC:   dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
-   *** Warning - bad CRC, using default environment
-
-   In:    serial
-   Out:   vop@ff940000.vidconsole
-   Err:   serial
-   Net:   Net Initialization Skipped
-   No ethernet found.
-   Hit any key to stop autoboot:  0
-   =>
-
-The rockchip bootrom can load and boot an initial spl, then continue to
-load a second-stage bootloader (ie. U-Boot) as soon as the control is returned
-to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence.
-The configuration option enabling this is:
-
-	CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
-
-You can create the image via the following operations:
-
-   ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
-	firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
-   cat firefly-rk3288/u-boot-dtb.bin >> out && \
-   sudo dd if=out of=/dev/sdc seek=64
-
-Or:
-   ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
-	firefly-rk3288/spl/u-boot-spl-dtb.bin:firefly-rk3288/u-boot-dtb.bin \
-	out && \
-   sudo dd if=out of=/dev/sdc seek=64
-
-If you have an HDMI cable attached you should see a video console.
-
-For evb_rk3036 board:
-	./evb-rk3036/tools/mkimage -n rk3036 -T rksd  -d evb-rk3036/spl/u-boot-spl.bin out && \
-	cat evb-rk3036/u-boot-dtb.bin >> out && \
-	sudo dd if=out of=/dev/sdc seek=64
-
-Or:
-	./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d \
-		evb-rk3036/spl/u-boot-spl.bin:evb-rk3036/u-boot-dtb.bin out && \
-	sudo dd if=out of=/dev/sdc seek=64
-
-Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
-      debug uart must be disabled
-
-
-Booting from an SD card on RK3288 with TPL
-==========================================
-
-Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
-new SPL features like Falcon mode or etc.
-
-So introduce TPL so-that adding new features to SPL is possible because now TPL should
-run minimal with code like DDR, clock etc and rest of new features in SPL.
-
-As of now TPL is added on Vyasa-RK3288 board.
-
-To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
-
-    sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 &&
-    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
-
-Booting from an SD card on RK3188
-=================================
-
-For rk3188 boards the general storage onto the card stays the same as
-described above, but the image creation needs a bit more care.
-
-The bootrom of rk3188 expects to find a small 1kb loader which returns
-control to the bootrom, after which it will load the real loader, which
-can then be up to 29kb in size and does the regular ddr init.  This is
-handled by a single image (built as the SPL stage) that tests whether
-it is handled for the first or second time via code executed from the
-boot0-hook.
-
-Additionally the rk3188 requires everything the bootrom loads to be
-rc4-encrypted. Except for the very first stage the bootrom always reads
-and decodes 2kb pages, so files should be sized accordingly.
-
-# copy tpl, pad to 1020 bytes and append spl
-tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
-
-# truncate, encode and append u-boot.bin
-truncate -s %2048 u-boot.bin
-cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out
-
-Booting from an SD card on Pine64 Rock64 (RK3328)
-=================================================
-
-For Rock64 rk3328 board the following three parts are required:
-TPL, SPL, and the u-boot image tree blob.
-
-  - Write TPL/SPL image at 64 sector
-
-    => sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64
-
-  - Write u-boot image tree blob at 16384 sector
-
-    => sudo dd if=u-boot.itb of=/dev/mmcblk0 seek=16384
-
-Booting from an SD card on RK3399
-=================================
-
-To write an image that boots from an SD card (assumed to be /dev/sdc):
-
-Option 1: Package the image with Rockchip miniloader:
-
-  - Create idbloader.img
-
-    => cd /path/to/u-boot
-    => ./tools/mkimage  -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img
-    => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img
-
-  - Write idbloader.img at 64 sector
-
-    => sudo dd if=idbloader.img of=/dev/sdc seek=64
-
-  - Write trust.img at 24576
-
-    => sudo dd if=trust.img of=/dev/sdc seek=24576
-
-  - Write uboot.img at 16384 sector
-
-    => sudo dd if=uboot.img of=/dev/sdc seek=16384
-    => sync
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
-DDR Version 1.20 20190314
-In
-Channel 0: DDR3, 933MHz
-Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
-no stride
-ch 0 ddrconfig = 0x101, ddrsize = 0x20
-pmugrf_os_reg[2] = 0x10006281, stride = 0x17
-OUT
-Boot1: 2019-03-14, version: 1.19
-CPUId = 0x0
-ChipType = 0x10, 239
-mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
-mmc: ERROR: Card did not respond to voltage select!
-emmc reinit
-mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
-mmc: ERROR: Card did not respond to voltage select!
-emmc reinit
-mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
-mmc: ERROR: Card did not respond to voltage select!
-SdmmcInit=2 1
-mmc0:cmd5,20
-SdmmcInit=0 0
-BootCapSize=0
-UserCapSize=60543MB
-FwPartOffset=2000 , 0
-StorageInit ok = 45266
-SecureMode = 0
-SecureInit read PBA: 0x4
-SecureInit read PBA: 0x404
-SecureInit read PBA: 0x804
-SecureInit read PBA: 0xc04
-SecureInit read PBA: 0x1004
-SecureInit read PBA: 0x1404
-SecureInit read PBA: 0x1804
-SecureInit read PBA: 0x1c04
-SecureInit ret = 0, SecureMode = 0
-atags_set_bootdev: ret:(0)
-GPT 0x3380ec0 signature is wrong
-recovery gpt...
-GPT 0x3380ec0 signature is wrong
-recovery gpt fail!
-LoadTrust Addr:0x4000
-No find bl30.bin
-Load uboot, ReadLba = 2000
-hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35,
-
-Load OK, addr=0x200000, size=0x9c9c0
-RunBL31 0x10000
-NOTICE:  BL31: v1.3(debug):370ab80
-NOTICE:  BL31: Built : 09:23:41, Mar  4 2019
-NOTICE:  BL31: Rockchip release version: v1.1
-INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
-INFO:    Using opteed sec cpu_context!
-INFO:    boot cpu mask: 0
-INFO:    plat_rockchip_pmu_init(1181): pd status 3e
-INFO:    BL31: Initializing runtime services
-INFO:    BL31: Initializing BL32
-INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec  7 06:11:20 UTC 2018 aarch64)
-
-INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
-
-INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
-INFO:    BL31: Preparing for EL3 exit to normal world
-INFO:    Entry point address = 0x200000
-INFO:    SPSR = 0x3c9
-
-
-U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530)
-
-Model: FriendlyARM NanoPi NEO4
-DRAM:  1022 MiB
-MMC:   dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
-Loading Environment from MMC... *** Warning - bad CRC, using default environment
-
-In:    serial@ff1a0000
-Out:   serial@ff1a0000
-Err:   serial@ff1a0000
-Model: FriendlyARM NanoPi NEO4
-Net:   eth0: ethernet@fe300000
-Hit any key to stop autoboot:  0
-=>
-
-Option 2: Package the image with SPL:
-
-  - Prefix rk3399 header to SPL image
-
-    => cd /path/to/u-boot
-    => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
-
-  - Write prefixed SPL at 64th sector
-
-    => sudo dd if=out of=/dev/sdc seek=64
-
-  - Write U-Boot proper at 16384 sector
-
-    => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
-    => sync
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
-U-Boot SPL board init
-Trying to boot from MMC1
-
-
-U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530)
-
-Model: Orange Pi RK3399 Board
-DRAM:  2 GiB
-MMC:   dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
-Loading Environment from MMC... OK
-In:    serial@ff1a0000
-Out:   serial@ff1a0000
-Err:   serial@ff1a0000
-Model: Orange Pi RK3399 Board
-Net:   eth0: ethernet@fe300000
-Hit any key to stop autoboot:  0
-=>
-
-Option 3: Package the image with TPL:
-
-  - Write tpl+spl at 64th sector
-
-    => sudo dd if=idbloader.img of=/dev/sdc seek=64
-
-  - Write U-Boot proper at 16384 sector
-
-    => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
-    => sync
-
-Put this SD (or micro-SD) card into your board and reset it. You should see
-something like:
-
-U-Boot TPL board init
-Trying to boot from BOOTROM
-Returning to boot ROM...
-
-U-Boot SPL board init
-Trying to boot from MMC1
-
-
-U-Boot 2019.07-rc1-00241-g5b3244767a (May 08 2019 - 10:51:06 +0530)
-
-Model: Orange Pi RK3399 Board
-DRAM:  2 GiB
-MMC:   dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
-Loading Environment from MMC... OK
-In:    serial@ff1a0000
-Out:   serial@ff1a0000
-Err:   serial@ff1a0000
-Model: Orange Pi RK3399 Board
-Net:   eth0: ethernet@fe300000
-Hit any key to stop autoboot:  0
-=>
-
-Using fastboot on rk3288
-========================
-- Write GPT partition layout to mmc device which fastboot want to use it to
-store the image
-
-        => gpt write mmc 1 $partitions
-
-- Invoke fastboot command to prepare
-
-        => fastboot 1
-
-- Start fastboot request on PC
-
-        fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
-
-You should see something like:
-
-        => fastboot 1
-        WARNING: unknown variable: partition-type:loader
-        Starting download of 357796 bytes
-        ..
-        downloading of 357796 bytes finished
-        Flashing Raw Image
-        ........ wrote 357888 bytes to 'loader'
-
-Booting from SPI
-================
-
-To write an image that boots from SPI flash (e.g. for the Haier Chromebook or
-Bob):
-
-   ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
-	-d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
-   dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
-   cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
-   dd if=out.bin of=out.bin.pad bs=4M conv=sync
-
-This converts the SPL image to the required SPI format by adding the Rockchip
-header and skipping every second 2KB block. Then the U-Boot image is written at
-offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
-The position of U-Boot is controlled with this setting in U-Boot:
-
-   #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
-
-If you have a Dediprog em100pro connected then you can write the image with:
-
-      sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
-
-When booting you should see something like:
-
-   U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
-
-
-   U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
-
-   Model: Google Jerry
-   DRAM:  2 GiB
-   MMC:
-   Using default environment
-
-   In:    serial@ff690000
-   Out:   serial@ff690000
-   Err:   serial@ff690000
-   =>
-
-Future work
-===========
-
-Immediate priorities are:
-
-- USB host
-- USB device
-- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
-- NAND flash
-- Boot U-Boot proper over USB OTG (at present only SPL works)
-
-
-Development Notes
-=================
-
-There are plenty of patches in the links below to help with this work.
-
-[1] https://github.com/rkchrome/uboot.git
-[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
-[3] https://github.com/linux-rockchip/rkflashtool.git
-[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
-
-rkimage
--------
-
-rkimage.c produces an SPL image suitable for sending directly to the boot ROM
-over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
-followed by u-boot-spl-dtb.bin.
-
-The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
-starts at 0xff700000 and extends to 0xff718000 where we put the stack.
-
-rksd
-----
-
-rksd.c produces an image consisting of 32KB of empty space, a header and
-u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
-most of the fields are unused by U-Boot. We just need to specify the
-signature, a flag and the block offset and size of the SPL image.
-
-The header occupies a single block but we pad it out to 4 blocks. The header
-is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
-image can be encoded too but we don't do that.
-
-The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
-or 0x40 blocks. This is a severe and annoying limitation. There may be a way
-around this limitation, since there is plenty of SRAM, but at present the
-board refuses to boot if this limit is exceeded.
-
-The image produced is padded up to a block boundary (512 bytes). It should be
-written to the start of an SD card using dd.
-
-Since this image is set to load U-Boot from the SD card at block offset,
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
-u-boot-dtb.img to the SD card at that offset. See above for instructions.
-
-rkspi
------
-
-rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
-resulting image is then spread out so that only the first 2KB of each 4KB
-sector is used. The header is the same as with rksd and the maximum size is
-also 32KB (before spreading). The image should be written to the start of
-SPI flash.
-
-See above for instructions on how to write a SPI image.
-
-Device tree and driver model
-----------------------------
-
-Where possible driver model is used to provide a structure to the
-functionality. Device tree is used for configuration. However these have an
-overhead and in SPL with a 32KB size limit some shortcuts have been taken.
-In general all Rockchip drivers should use these features, with SPL-specific
-modifications where required.
-
-GPT partition layout
-----------------------------
-
-Rockchip use a unified GPT partition layout  in open source support.
-With this GPT partition layout, uboot can be compatilbe with other components,
-like miniloader, trusted-os, arm-trust-firmware.
-
-There are some documents about partitions in the links below.
-http://rockchip.wikidot.com/partitions
-
---
-Jagan Teki <jagan@amarulasolutions.com>
-27 Mar 2019
-Simon Glass <sjg@chromium.org>
-24 June 2015
--
2.39.5

[PATCH 0/9] rockchip: Remove unneeded syscon driver for RK35xx

[Jonas Karlman]

This series takes the initial steps required to try and remove use of
syscon_get_first_range() or syscon_get_regmap_by_driver_data() to get
GRF base addresses at runtime for the Rockchip platform.

The GRF base addresses are fixed and known at compile time, yet drivers
keep trying to resolve them at runtime delaying some operations by
several ms.

In this initial part the three current uses of ROCKCHIP_SYSCON_x lookup
used on RK35xx SoCs is converted to use a constant value or using
phandle lookup, followed by removing the SoC specific syscon driver and
finally removing the RK35xx special ROCKCHIP_SYSCON_x enum values.

The changes included in this series have no intended behavior change for
the affected RK35xx SoCs.

Future series will continue to convert uses of ROCKCHIP_SYSCON_x for 
remaining older RK SoCs if this initial part is accepted.

Jonas Karlman (9):
  ram: rockchip: rk3568: Simplify get_info() ops
  ram: rockchip: rk3588: Simplify get_info() ops
  video: rockchip: dw_mipi_dsi: Get GRF base address from phandle
  rockchip: rk3568: Remove unneeded syscon driver
  rockchip: rk3588: Remove unneeded syscon driver
  rockchip: rk3576: Remove unneeded syscon driver
  rockchip: rk3528: Remove unneeded syscon driver
  rockchip: rk3506: Remove unneeded syscon driver
  rockchip: include: Remove unused ROCKCHIP_SYSCON_x enum values

 arch/arm/include/asm/arch-rockchip/clock.h    |  8 -----
 arch/arm/mach-rockchip/rk3506/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3506/syscon_rk3506.c | 19 ------------
 arch/arm/mach-rockchip/rk3528/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3528/syscon_rk3528.c | 19 ------------
 arch/arm/mach-rockchip/rk3568/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3568/syscon_rk3568.c | 23 --------------
 arch/arm/mach-rockchip/rk3576/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c | 22 -------------
 arch/arm/mach-rockchip/rk3588/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c | 31 -------------------
 drivers/ram/rockchip/sdram_rk3568.c           | 29 +++--------------
 drivers/ram/rockchip/sdram_rk3588.c           | 31 ++++---------------
 drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 16 ++++++----
 14 files changed, 21 insertions(+), 182 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk3506/syscon_rk3506.c
 delete mode 100644 arch/arm/mach-rockchip/rk3528/syscon_rk3528.c
 delete mode 100644 arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
 delete mode 100644 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c
 delete mode 100644 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c

-- 
2.54.0

[PATCH 1/9] ram: rockchip: rk3568: Simplify get_info() ops

[Jonas Karlman]

The PMUGRF base address is fixed and known at compile time. However,
the base address is read from DT at runtime in this driver, delaying
reading the two HW regs to determine RAM size by several ms.

Change to use a constant for the PMUGRF base address to speed up reading
RAM size and simplify the driver by removing use of probe and private
data. The driver list entry name is also renamed to match the
compatible, for possible use with OF_PLATDATA.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 drivers/ram/rockchip/sdram_rk3568.c | 29 +++++------------------------
 1 file changed, 5 insertions(+), 24 deletions(-)

diff --git a/drivers/ram/rockchip/sdram_rk3568.c b/drivers/ram/rockchip/sdram_rk3568.c
index a252d5c70106..d768b849a0f7 100644
--- a/drivers/ram/rockchip/sdram_rk3568.c
+++ b/drivers/ram/rockchip/sdram_rk3568.c
@@ -3,36 +3,19 @@
  * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
  */
 
-#include <config.h>
 #include <dm.h>
 #include <ram.h>
-#include <syscon.h>
-#include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/grf_rk3568.h>
 #include <asm/arch-rockchip/sdram.h>
 
-struct dram_info {
-	struct ram_info info;
-	struct rk3568_pmugrf *pmugrf;
-};
-
-static int rk3568_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	priv->info.base = CFG_SYS_SDRAM_BASE;
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->pmu_os_reg2);
-
-	return 0;
-}
+#define PMUGRF_BASE			0xfdc20000
 
 static int rk3568_dmc_get_info(struct udevice *dev, struct ram_info *info)
 {
-	struct dram_info *priv = dev_get_priv(dev);
+	static struct rk3568_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
 
-	*info = priv->info;
+	info->base = CFG_SYS_SDRAM_BASE;
+	info->size = rockchip_sdram_size((phys_addr_t)&pmugrf->pmu_os_reg2);
 
 	return 0;
 }
@@ -46,11 +29,9 @@ static const struct udevice_id rk3568_dmc_ids[] = {
 	{ }
 };
 
-U_BOOT_DRIVER(dmc_rk3568) = {
+U_BOOT_DRIVER(rockchip_rk3568_dmc) = {
 	.name = "rockchip_rk3568_dmc",
 	.id = UCLASS_RAM,
 	.of_match = rk3568_dmc_ids,
 	.ops = &rk3568_dmc_ops,
-	.probe = rk3568_dmc_probe,
-	.priv_auto = sizeof(struct dram_info),
 };
-- 
2.54.0

[PATCH 2/9] ram: rockchip: rk3588: Simplify get_info() ops

[Jonas Karlman]

The PMU1GRF base address is fixed and known at compile time. However,
the base address is read from DT at runtime in this driver, delaying
reading the four HW regs to determine RAM size by several ms.

Change to use a constant for the PMU1GRF base address to speed up
reading RAM size and simplify the driver by removing use of probe and
private data. The driver list entry name is also renamed to match the
compatible, for possible use with OF_PLATDATA.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 drivers/ram/rockchip/sdram_rk3588.c | 31 ++++++-----------------------
 1 file changed, 6 insertions(+), 25 deletions(-)

diff --git a/drivers/ram/rockchip/sdram_rk3588.c b/drivers/ram/rockchip/sdram_rk3588.c
index a144b432d76f..c572f602630a 100644
--- a/drivers/ram/rockchip/sdram_rk3588.c
+++ b/drivers/ram/rockchip/sdram_rk3588.c
@@ -3,37 +3,20 @@
  * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
  */
 
-#include <config.h>
 #include <dm.h>
 #include <ram.h>
-#include <syscon.h>
-#include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/grf_rk3588.h>
 #include <asm/arch-rockchip/sdram.h>
 
-struct dram_info {
-	struct ram_info info;
-	struct rk3588_pmu1grf *pmugrf;
-};
-
-static int rk3588_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	priv->info.base = CFG_SYS_SDRAM_BASE;
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]) +
-		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[4]);
-
-	return 0;
-}
+#define PMU1GRF_BASE			0xfd58a000
 
 static int rk3588_dmc_get_info(struct udevice *dev, struct ram_info *info)
 {
-	struct dram_info *priv = dev_get_priv(dev);
+	static struct rk3588_pmu1grf * const pmugrf = (void *)PMU1GRF_BASE;
 
-	*info = priv->info;
+	info->base = CFG_SYS_SDRAM_BASE;
+	info->size = rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]) +
+		     rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[4]);
 
 	return 0;
 }
@@ -47,11 +30,9 @@ static const struct udevice_id rk3588_dmc_ids[] = {
 	{ }
 };
 
-U_BOOT_DRIVER(dmc_rk3588) = {
+U_BOOT_DRIVER(rockchip_rk3588_dmc) = {
 	.name = "rockchip_rk3588_dmc",
 	.id = UCLASS_RAM,
 	.of_match = rk3588_dmc_ids,
 	.ops = &rk3588_dmc_ops,
-	.probe = rk3588_dmc_probe,
-	.priv_auto = sizeof(struct dram_info),
 };
-- 
2.54.0

[PATCH 3/9] video: rockchip: dw_mipi_dsi: Get GRF base address from phandle

[Jonas Karlman]

The GRF syscon is referenced using the rockchip,grf prop in SoC DTs.

Change to use syscon_regmap_lookup_by_phandle() to get a GRF regmap
instead of using the inconvenient syscon_get_first_range() method.

This has no intended behavior change, all affected SoC DTs have the
rockchip,grf reference and the values being written already contain
correct write-enable mask.

Fixes: bd6375c5511c ("video: rockchip: dw_mipi_dsi: Fix GRF access")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Please note that this has only been compile tested.

Cc: Chris Morgan <macromorgan@hotmail.com>
Cc: Ondrej Jirman <megi@xff.cz>
---
 drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
index fa512173510b..2e5bcb74589a 100644
--- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
+++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
@@ -17,6 +17,7 @@
 #include <mipi_dsi.h>
 #include <panel.h>
 #include <phy-mipi-dphy.h>
+#include <regmap.h>
 #include <reset.h>
 #include <syscon.h>
 #include <video_bridge.h>
@@ -31,7 +32,6 @@
 #include <linux/time.h>
 
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/hardware.h>
 
 /*
  * DSI wrapper registers & bit definitions
@@ -224,7 +224,7 @@ struct dw_rockchip_dsi_priv {
 	struct mipi_dsi_device device;
 	void __iomem *base;
 	struct udevice *panel;
-	void __iomem *grf;
+	struct regmap *grf;
 
 	/* Optional external dphy */
 	struct phy phy;
@@ -782,13 +782,13 @@ static int dw_mipi_dsi_rockchip_set_bl(struct udevice *dev, int percent)
 static void dw_mipi_dsi_rockchip_config(struct dw_rockchip_dsi_priv *dsi)
 {
 	if (dsi->cdata->lanecfg1_grf_reg)
-		rk_setreg(dsi->grf + dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1);
+		regmap_write(dsi->grf, dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1);
 
 	if (dsi->cdata->lanecfg2_grf_reg)
-		rk_setreg(dsi->grf + dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2);
+		regmap_write(dsi->grf, dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2);
 
 	if (dsi->cdata->enable_grf_reg)
-		rk_setreg(dsi->grf + dsi->cdata->enable_grf_reg, dsi->cdata->enable);
+		regmap_write(dsi->grf, dsi->cdata->enable_grf_reg, dsi->cdata->enable);
 }
 
 static int dw_mipi_dsi_rockchip_bind(struct udevice *dev)
@@ -821,7 +821,11 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->grf = syscon_regmap_lookup_by_phandle(dev, "rockchip,grf");
+	if (IS_ERR(priv->grf)) {
+		dev_err(dev, "unable to find rockchip,grf regmap\n");
+		return PTR_ERR(priv->grf);
+	}
 
 	i = 0;
 	while (cdata[i].reg) {
-- 
2.54.0

[PATCH 4/9] rockchip: rk3568: Remove unneeded syscon driver

[Jonas Karlman]

Modern Rockchip device drivers use syscon_regmap_lookup_by_phandle()
to get a regmap or use a constant to get the fixed base address.

Remove the unneeded RK3568 syscon driver to discourage new uses of
syscon_get_regmap_by_driver_data() or syscon_get_first_range().

The generic_syscon driver will instead be used for the compatible
previously matched by the now removed driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/mach-rockchip/rk3568/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3568/syscon_rk3568.c | 23 -------------------
 2 files changed, 24 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk3568/syscon_rk3568.c

diff --git a/arch/arm/mach-rockchip/rk3568/Makefile b/arch/arm/mach-rockchip/rk3568/Makefile
index 28c1f4ee5c9b..610d2a015587 100644
--- a/arch/arm/mach-rockchip/rk3568/Makefile
+++ b/arch/arm/mach-rockchip/rk3568/Makefile
@@ -6,4 +6,3 @@
 
 obj-y += clk_rk3568.o
 obj-y += rk3568.o
-obj-y += syscon_rk3568.o
diff --git a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
deleted file mode 100644
index 255259eabfda..000000000000
--- a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2021 Rockchip Electronics Co., Ltd
- */
-
-#include <dm.h>
-#include <syscon.h>
-#include <asm/arch-rockchip/clock.h>
-
-static const struct udevice_id rk3568_syscon_ids[] = {
-	{ .compatible = "rockchip,rk3568-grf", .data = ROCKCHIP_SYSCON_GRF },
-	{ .compatible = "rockchip,rk3568-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
-	{ }
-};
-
-U_BOOT_DRIVER(syscon_rk3568) = {
-	.name = "rk3568_syscon",
-	.id = UCLASS_SYSCON,
-	.of_match = rk3568_syscon_ids,
-#if CONFIG_IS_ENABLED(OF_REAL)
-	.bind = dm_scan_fdt_dev,
-#endif
-};
-- 
2.54.0

[PATCH 5/9] rockchip: rk3588: Remove unneeded syscon driver

[Jonas Karlman]

Modern Rockchip device drivers use syscon_regmap_lookup_by_phandle()
to get a regmap or use a constant to get the fixed base address.

Remove the unneeded RK3588 syscon driver to discourage new uses of
syscon_get_regmap_by_driver_data() or syscon_get_first_range().

The generic_syscon driver will instead be used for the compatible
previously matched by the now removed driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/mach-rockchip/rk3588/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c | 31 -------------------
 2 files changed, 32 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c

diff --git a/arch/arm/mach-rockchip/rk3588/Makefile b/arch/arm/mach-rockchip/rk3588/Makefile
index 4003eea87a11..576ed06a2eca 100644
--- a/arch/arm/mach-rockchip/rk3588/Makefile
+++ b/arch/arm/mach-rockchip/rk3588/Makefile
@@ -6,4 +6,3 @@
 
 obj-y += rk3588.o
 obj-y += clk_rk3588.o
-obj-y += syscon_rk3588.o
diff --git a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
deleted file mode 100644
index f86567fcaf4f..000000000000
--- a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2021 Rockchip Electronics Co., Ltd
- */
-
-#include <dm.h>
-#include <syscon.h>
-#include <asm/arch-rockchip/clock.h>
-
-static const struct udevice_id rk3588_syscon_ids[] = {
-	{ .compatible = "rockchip,rk3588-sys-grf", .data = ROCKCHIP_SYSCON_GRF },
-	{ .compatible = "rockchip,rk3588-pmugrf",  .data = ROCKCHIP_SYSCON_PMUGRF },
-	{ .compatible = "rockchip,rk3588-vop-grf", .data = ROCKCHIP_SYSCON_VOP_GRF },
-	{ .compatible = "rockchip,rk3588-vo-grf",  .data = ROCKCHIP_SYSCON_VO_GRF },
-	{ .compatible = "rockchip,pcie30-phy-grf", .data = ROCKCHIP_SYSCON_PCIE30_PHY_GRF },
-	{ .compatible = "rockchip,rk3588-php-grf", .data = ROCKCHIP_SYSCON_PHP_GRF },
-	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY0_GRF },
-	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY1_GRF },
-	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY2_GRF },
-	{ .compatible = "rockchip,rk3588-pmu",     .data = ROCKCHIP_SYSCON_PMU },
-	{ }
-};
-
-U_BOOT_DRIVER(syscon_rk3588) = {
-	.name = "rk3588_syscon",
-	.id = UCLASS_SYSCON,
-	.of_match = rk3588_syscon_ids,
-#if CONFIG_IS_ENABLED(OF_REAL)
-	.bind = dm_scan_fdt_dev,
-#endif
-};
-- 
2.54.0

[PATCH 6/9] rockchip: rk3576: Remove unneeded syscon driver

[Jonas Karlman]

Modern Rockchip device drivers use syscon_regmap_lookup_by_phandle()
to get a regmap or use a constant to get the fixed base address.

Remove the unneeded RK3576 syscon driver to discourage new uses of
syscon_get_regmap_by_driver_data() or syscon_get_first_range().

The generic_syscon driver will instead be used for the compatible
previously matched by the now removed driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/mach-rockchip/rk3576/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c | 22 -------------------
 2 files changed, 23 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c

diff --git a/arch/arm/mach-rockchip/rk3576/Makefile b/arch/arm/mach-rockchip/rk3576/Makefile
index cbc58257deba..bd7399cddaac 100644
--- a/arch/arm/mach-rockchip/rk3576/Makefile
+++ b/arch/arm/mach-rockchip/rk3576/Makefile
@@ -6,4 +6,3 @@
 
 obj-y += rk3576.o
 obj-y += clk_rk3576.o
-obj-y += syscon_rk3576.o
diff --git a/arch/arm/mach-rockchip/rk3576/syscon_rk3576.c b/arch/arm/mach-rockchip/rk3576/syscon_rk3576.c
deleted file mode 100644
index 0dbf8f8d9c09..000000000000
--- a/arch/arm/mach-rockchip/rk3576/syscon_rk3576.c
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * (C) Copyright 2023 Rockchip Electronics Co., Ltd
- */
-
-#include <dm.h>
-#include <asm/arch-rockchip/clock.h>
-
-static const struct udevice_id rk3576_syscon_ids[] = {
-	{ .compatible = "rockchip,rk3576-sys-grf", .data = ROCKCHIP_SYSCON_GRF },
-	{ .compatible = "rockchip,rk3576-pmu1-grf",  .data = ROCKCHIP_SYSCON_PMUGRF },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_rk3576_syscon) = {
-	.name = "rockchip_rk3576_syscon",
-	.id = UCLASS_SYSCON,
-	.of_match = rk3576_syscon_ids,
-#if CONFIG_IS_ENABLED(OF_REAL)
-	.bind = dm_scan_fdt_dev,
-#endif
-};
-- 
2.54.0

[PATCH 7/9] rockchip: rk3528: Remove unneeded syscon driver

[Jonas Karlman]

Modern Rockchip device drivers use syscon_regmap_lookup_by_phandle()
to get a regmap or use a constant to get the fixed base address.

Remove the unneeded RK3528 syscon driver to discourage new uses of
syscon_get_regmap_by_driver_data() or syscon_get_first_range().

The generic_syscon driver will instead be used for the compatible
previously matched by the now removed driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/mach-rockchip/rk3528/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3528/syscon_rk3528.c | 19 -------------------
 2 files changed, 20 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk3528/syscon_rk3528.c

diff --git a/arch/arm/mach-rockchip/rk3528/Makefile b/arch/arm/mach-rockchip/rk3528/Makefile
index f0c18cd39d29..150536f59025 100644
--- a/arch/arm/mach-rockchip/rk3528/Makefile
+++ b/arch/arm/mach-rockchip/rk3528/Makefile
@@ -2,4 +2,3 @@
 
 obj-y += rk3528.o
 obj-y += clk_rk3528.o
-obj-y += syscon_rk3528.o
diff --git a/arch/arm/mach-rockchip/rk3528/syscon_rk3528.c b/arch/arm/mach-rockchip/rk3528/syscon_rk3528.c
deleted file mode 100644
index 4a32a5f732e9..000000000000
--- a/arch/arm/mach-rockchip/rk3528/syscon_rk3528.c
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-// Copyright Contributors to the U-Boot project.
-
-#include <dm.h>
-#include <asm/arch-rockchip/clock.h>
-
-static const struct udevice_id rk3528_syscon_ids[] = {
-	{ .compatible = "rockchip,rk3528-grf", .data = ROCKCHIP_SYSCON_GRF },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_rk3528_syscon) = {
-	.name = "rockchip_rk3528_syscon",
-	.id = UCLASS_SYSCON,
-	.of_match = rk3528_syscon_ids,
-#if CONFIG_IS_ENABLED(OF_REAL)
-	.bind = dm_scan_fdt_dev,
-#endif
-};
-- 
2.54.0

[PATCH 8/9] rockchip: rk3506: Remove unneeded syscon driver

[Jonas Karlman]

Modern Rockchip device drivers use syscon_regmap_lookup_by_phandle()
to get a regmap or use a constant to get the fixed base address.

Remove the unneeded RK3506 syscon driver to discourage new uses of
syscon_get_regmap_by_driver_data() or syscon_get_first_range().

The generic_syscon driver will instead be used for the compatible
previously matched by the now removed driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/mach-rockchip/rk3506/Makefile        |  1 -
 arch/arm/mach-rockchip/rk3506/syscon_rk3506.c | 19 -------------------
 2 files changed, 20 deletions(-)
 delete mode 100644 arch/arm/mach-rockchip/rk3506/syscon_rk3506.c

diff --git a/arch/arm/mach-rockchip/rk3506/Makefile b/arch/arm/mach-rockchip/rk3506/Makefile
index a1760bd0f0a3..63a6c2c2d18d 100644
--- a/arch/arm/mach-rockchip/rk3506/Makefile
+++ b/arch/arm/mach-rockchip/rk3506/Makefile
@@ -2,4 +2,3 @@
 
 obj-y += rk3506.o
 obj-y += clk_rk3506.o
-obj-y += syscon_rk3506.o
diff --git a/arch/arm/mach-rockchip/rk3506/syscon_rk3506.c b/arch/arm/mach-rockchip/rk3506/syscon_rk3506.c
deleted file mode 100644
index 2548b0fa2d3a..000000000000
--- a/arch/arm/mach-rockchip/rk3506/syscon_rk3506.c
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-// Copyright Contributors to the U-Boot project.
-
-#include <dm.h>
-#include <asm/arch-rockchip/clock.h>
-
-static const struct udevice_id rk3506_syscon_ids[] = {
-	{ .compatible = "rockchip,rk3506-grf", .data = ROCKCHIP_SYSCON_GRF },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_rk3506_syscon) = {
-	.name = "rockchip_rk3506_syscon",
-	.id = UCLASS_SYSCON,
-	.of_match = rk3506_syscon_ids,
-#if CONFIG_IS_ENABLED(OF_REAL)
-	.bind = dm_scan_fdt_dev,
-#endif
-};
-- 
2.54.0

[PATCH 9/9] rockchip: include: Remove unused ROCKCHIP_SYSCON_x enum values

[Jonas Karlman]

Modern Rockchip device drivers use syscon_regmap_lookup_by_phandle()
to get a regmap or use a constant to get the fixed base address.

Remove the unused ROCKCHIP_SYSCON_x enum values to discourage new uses
of syscon_get_regmap_by_driver_data() or syscon_get_first_range().

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/include/asm/arch-rockchip/clock.h | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 0bc150c6f9c4..cf8bb0f04636 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -31,14 +31,6 @@ enum {
 	ROCKCHIP_SYSCON_PMUSGRF,
 	ROCKCHIP_SYSCON_CIC,
 	ROCKCHIP_SYSCON_MSCH,
-	ROCKCHIP_SYSCON_USBGRF,
-	ROCKCHIP_SYSCON_PCIE30_PHY_GRF,
-	ROCKCHIP_SYSCON_PHP_GRF,
-	ROCKCHIP_SYSCON_PIPE_PHY0_GRF,
-	ROCKCHIP_SYSCON_PIPE_PHY1_GRF,
-	ROCKCHIP_SYSCON_PIPE_PHY2_GRF,
-	ROCKCHIP_SYSCON_VOP_GRF,
-	ROCKCHIP_SYSCON_VO_GRF,
 };
 
 /* Standard Rockchip clock numbers */
-- 
2.54.0

Re: [PATCH 0/9] rockchip: Remove unneeded syscon driver for RK35xx

[Simon Glass]

Hi Jonas,

On Tue, 4 Aug 2026 at 04:57, Jonas Karlman <jonas@kwiboo.se> wrote:
>
> This series takes the initial steps required to try and remove use of
> syscon_get_first_range() or syscon_get_regmap_by_driver_data() to get
> GRF base addresses at runtime for the Rockchip platform.
>
> The GRF base addresses are fixed and known at compile time, yet drivers
> keep trying to resolve them at runtime delaying some operations by
> several ms.

I suppose all addresses are known at compile-time, if you have a
single device tree. I have always hoped that we might end up with a
generic U-Boot for rockchip.

I wonder if there is another way to do this, perhaps reading the
address once and caching it?

>
> In this initial part the three current uses of ROCKCHIP_SYSCON_x lookup
> used on RK35xx SoCs is converted to use a constant value or using
> phandle lookup, followed by removing the SoC specific syscon driver and
> finally removing the RK35xx special ROCKCHIP_SYSCON_x enum values.
>
> The changes included in this series have no intended behavior change for
> the affected RK35xx SoCs.
>
> Future series will continue to convert uses of ROCKCHIP_SYSCON_x for
> remaining older RK SoCs if this initial part is accepted.
>
> Jonas Karlman (9):
>   ram: rockchip: rk3568: Simplify get_info() ops
>   ram: rockchip: rk3588: Simplify get_info() ops
>   video: rockchip: dw_mipi_dsi: Get GRF base address from phandle
>   rockchip: rk3568: Remove unneeded syscon driver
>   rockchip: rk3588: Remove unneeded syscon driver
>   rockchip: rk3576: Remove unneeded syscon driver
>   rockchip: rk3528: Remove unneeded syscon driver
>   rockchip: rk3506: Remove unneeded syscon driver
>   rockchip: include: Remove unused ROCKCHIP_SYSCON_x enum values
>
>  arch/arm/include/asm/arch-rockchip/clock.h    |  8 -----
>  arch/arm/mach-rockchip/rk3506/Makefile        |  1 -
>  arch/arm/mach-rockchip/rk3506/syscon_rk3506.c | 19 ------------
>  arch/arm/mach-rockchip/rk3528/Makefile        |  1 -
>  arch/arm/mach-rockchip/rk3528/syscon_rk3528.c | 19 ------------
>  arch/arm/mach-rockchip/rk3568/Makefile        |  1 -
>  arch/arm/mach-rockchip/rk3568/syscon_rk3568.c | 23 --------------
>  arch/arm/mach-rockchip/rk3576/Makefile        |  1 -
>  arch/arm/mach-rockchip/rk3576/syscon_rk3576.c | 22 -------------
>  arch/arm/mach-rockchip/rk3588/Makefile        |  1 -
>  arch/arm/mach-rockchip/rk3588/syscon_rk3588.c | 31 -------------------
>  drivers/ram/rockchip/sdram_rk3568.c           | 29 +++--------------
>  drivers/ram/rockchip/sdram_rk3588.c           | 31 ++++---------------
>  drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 16 ++++++----
>  14 files changed, 21 insertions(+), 182 deletions(-)
>  delete mode 100644 arch/arm/mach-rockchip/rk3506/syscon_rk3506.c
>  delete mode 100644 arch/arm/mach-rockchip/rk3528/syscon_rk3528.c
>  delete mode 100644 arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
>  delete mode 100644 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c
>  delete mode 100644 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
>
> --
> 2.54.0
>

Regards,
Simon

Re: [PATCH 0/9] rockchip: Remove unneeded syscon driver for RK35xx

[Jonas Karlman]

Hi Simon,

On 8/4/2026 9:19 PM, Simon Glass wrote:
> Hi Jonas,
> 
> On Tue, 4 Aug 2026 at 04:57, Jonas Karlman <jonas@kwiboo.se> wrote:
>>
>> This series takes the initial steps required to try and remove use of
>> syscon_get_first_range() or syscon_get_regmap_by_driver_data() to get
>> GRF base addresses at runtime for the Rockchip platform.
>>
>> The GRF base addresses are fixed and known at compile time, yet drivers
>> keep trying to resolve them at runtime delaying some operations by
>> several ms.
> 
> I suppose all addresses are known at compile-time, if you have a
> single device tree. I have always hoped that we might end up with a
> generic U-Boot for rockchip.

I do not understand how removing these unneeded syscon drivers and
helpers would stop such goals or make that any harder. From my point of
view, they are currently making such things harder and only adds extra
code, runtime and energy waste. E.g. around 227 ms was wasted resolving
fixed known base addresses for RK3399 last time I measured it, see [1].

Most drivers or any SoC specific code is already identified using a
compatible that is SoC specific, i.e. the RAM or CLK drivers are matched
using a SoC specific compatible and seeing how all GRF variants are
unique there will always need to be SoC specific code to handle the GRFs
base address and reg offsets.

And for drivers that are more dynamic in nature the DT typically have a
phandle to the GRF syscon node anyway, so getting it from the phandle
will be a better option and closer matches how Linux handles similar
references.

The biggest current blocker for a more generic U-Boot proper on Rockchip
platform is rockchip_get_cru() and how it currently makes it impossible
to support multiple SoCs in one build due to how it is used in the
sysreset driver. Fortunately, I have a pending series that also cleans
up the unneeded rockchip_get_cru/clk() related helpers.

> 
> I wonder if there is another way to do this, perhaps reading the
> address once and caching it?

I really do not see the need for that; it would only make things more
complex than it really needs to be. We should use constants where
appropriate, e.g. soc specific drivers/code and use generic phandle
lookups elsewhere.

At least that is my end goal with this and pending follow-up series.

[1] https://git.u-boot-project.org/u-boot/contributors/kwiboo/u-boot/-/commit/cfb736dea37f834e849e54d39fb086c91697fc24

Regards,
Jonas

> 
>>
>> In this initial part the three current uses of ROCKCHIP_SYSCON_x lookup
>> used on RK35xx SoCs is converted to use a constant value or using
>> phandle lookup, followed by removing the SoC specific syscon driver and
>> finally removing the RK35xx special ROCKCHIP_SYSCON_x enum values.
>>
>> The changes included in this series have no intended behavior change for
>> the affected RK35xx SoCs.
>>
>> Future series will continue to convert uses of ROCKCHIP_SYSCON_x for
>> remaining older RK SoCs if this initial part is accepted.
>>
>> Jonas Karlman (9):
>>   ram: rockchip: rk3568: Simplify get_info() ops
>>   ram: rockchip: rk3588: Simplify get_info() ops
>>   video: rockchip: dw_mipi_dsi: Get GRF base address from phandle
>>   rockchip: rk3568: Remove unneeded syscon driver
>>   rockchip: rk3588: Remove unneeded syscon driver
>>   rockchip: rk3576: Remove unneeded syscon driver
>>   rockchip: rk3528: Remove unneeded syscon driver
>>   rockchip: rk3506: Remove unneeded syscon driver
>>   rockchip: include: Remove unused ROCKCHIP_SYSCON_x enum values
>>
>>  arch/arm/include/asm/arch-rockchip/clock.h    |  8 -----
>>  arch/arm/mach-rockchip/rk3506/Makefile        |  1 -
>>  arch/arm/mach-rockchip/rk3506/syscon_rk3506.c | 19 ------------
>>  arch/arm/mach-rockchip/rk3528/Makefile        |  1 -
>>  arch/arm/mach-rockchip/rk3528/syscon_rk3528.c | 19 ------------
>>  arch/arm/mach-rockchip/rk3568/Makefile        |  1 -
>>  arch/arm/mach-rockchip/rk3568/syscon_rk3568.c | 23 --------------
>>  arch/arm/mach-rockchip/rk3576/Makefile        |  1 -
>>  arch/arm/mach-rockchip/rk3576/syscon_rk3576.c | 22 -------------
>>  arch/arm/mach-rockchip/rk3588/Makefile        |  1 -
>>  arch/arm/mach-rockchip/rk3588/syscon_rk3588.c | 31 -------------------
>>  drivers/ram/rockchip/sdram_rk3568.c           | 29 +++--------------
>>  drivers/ram/rockchip/sdram_rk3588.c           | 31 ++++---------------
>>  drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 16 ++++++----
>>  14 files changed, 21 insertions(+), 182 deletions(-)
>>  delete mode 100644 arch/arm/mach-rockchip/rk3506/syscon_rk3506.c
>>  delete mode 100644 arch/arm/mach-rockchip/rk3528/syscon_rk3528.c
>>  delete mode 100644 arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
>>  delete mode 100644 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c
>>  delete mode 100644 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
>>
>> --
>> 2.54.0
>>
> 
> Regards,
> Simon