From: Stephen Boyd <sboyd@kernel.org>
To: Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor+dt@kernel.org>,
Conor Dooley <conor@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh@kernel.org>,
Xukai Wang <kingxukai@zohomail.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Samuel Holland <samuel.holland@sifive.com>,
Troy Mitchell <TroyMitchell988@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: Re: [PATCH v4 1/3] dt-bindings: clock: Add bindings for Canaan K230 clock controller
Date: Tue, 18 Feb 2025 13:51:03 -0800 [thread overview]
Message-ID: <c68c14422c7d27278f6fc75f285db7c7.sboyd@kernel.org> (raw)
In-Reply-To: <20250217-b4-k230-clk-v4-1-5a95a3458691@zohomail.com>
Quoting Xukai Wang (2025-02-17 06:45:16)
> diff --git a/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml b/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..d7220fa30e4699a68fa5279c04abc63c1905fa4a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/canaan,k230-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Canaan Kendryte K230 Clock
> +
> +maintainers:
> + - Xukai Wang <kingxukai@zohomail.com>
Is this missing a description of the device?
> +
> +properties:
> + compatible:
> + const: canaan,k230-clk
> +
> + reg:
> + items:
> + - description: PLL control registers.
> + - description: Sysclk control registers.
> +
> + clocks:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + clock-controller@91102000 {
> + compatible = "canaan,k230-clk";
> + reg = <0x91102000 0x1000>,
Is there a reason why the PLL range comes first? What's at 0x91101000?
More clk hardware?
> + <0x91100000 0x1000>;
> + clocks = <&osc24m>;
> + #clock-cells = <1>;
> + };
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor+dt@kernel.org>,
Conor Dooley <conor@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh@kernel.org>,
Xukai Wang <kingxukai@zohomail.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Samuel Holland <samuel.holland@sifive.com>,
Troy Mitchell <TroyMitchell988@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: Re: [PATCH v4 1/3] dt-bindings: clock: Add bindings for Canaan K230 clock controller
Date: Tue, 18 Feb 2025 13:51:03 -0800 [thread overview]
Message-ID: <c68c14422c7d27278f6fc75f285db7c7.sboyd@kernel.org> (raw)
In-Reply-To: <20250217-b4-k230-clk-v4-1-5a95a3458691@zohomail.com>
Quoting Xukai Wang (2025-02-17 06:45:16)
> diff --git a/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml b/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..d7220fa30e4699a68fa5279c04abc63c1905fa4a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/canaan,k230-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Canaan Kendryte K230 Clock
> +
> +maintainers:
> + - Xukai Wang <kingxukai@zohomail.com>
Is this missing a description of the device?
> +
> +properties:
> + compatible:
> + const: canaan,k230-clk
> +
> + reg:
> + items:
> + - description: PLL control registers.
> + - description: Sysclk control registers.
> +
> + clocks:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + clock-controller@91102000 {
> + compatible = "canaan,k230-clk";
> + reg = <0x91102000 0x1000>,
Is there a reason why the PLL range comes first? What's at 0x91101000?
More clk hardware?
> + <0x91100000 0x1000>;
> + clocks = <&osc24m>;
> + #clock-cells = <1>;
> + };
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next prev parent reply other threads:[~2025-02-18 21:51 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-17 14:45 [PATCH v4 0/3] riscv: canaan: Add support for K230-Canmv clock Xukai Wang
2025-02-17 14:45 ` Xukai Wang
2025-02-17 14:45 ` [PATCH v4 1/3] dt-bindings: clock: Add bindings for Canaan K230 clock controller Xukai Wang
2025-02-17 14:45 ` Xukai Wang
2025-02-18 21:51 ` Stephen Boyd [this message]
2025-02-18 21:51 ` Stephen Boyd
2025-02-19 12:28 ` Xukai Wang
2025-02-19 12:28 ` Xukai Wang
2025-02-17 14:45 ` [PATCH v4 2/3] clk: canaan: Add clock driver for Canaan K230 Xukai Wang
2025-02-17 14:45 ` Xukai Wang
2025-02-18 21:48 ` Stephen Boyd
2025-02-18 21:48 ` Stephen Boyd
2025-02-20 15:07 ` Xukai Wang
2025-02-20 15:07 ` Xukai Wang
2025-02-20 15:18 ` Xukai Wang
2025-02-20 15:18 ` Xukai Wang
2025-02-17 14:45 ` [PATCH v4 3/3] riscv: dts: canaan: Add clock initial support for K230 Xukai Wang
2025-02-17 14:45 ` Xukai Wang
2025-02-18 17:00 ` Conor Dooley
2025-02-18 17:00 ` Conor Dooley
2025-02-18 17:36 ` Xukai Wang
2025-02-18 17:36 ` Xukai Wang
2025-02-18 17:02 ` [PATCH v4 0/3] riscv: canaan: Add support for K230-Canmv clock Conor Dooley
2025-02-18 17:02 ` Conor Dooley
2025-02-18 21:51 ` Stephen Boyd
2025-02-18 21:51 ` Stephen Boyd
2025-02-19 17:07 ` Conor Dooley
2025-02-19 17:07 ` Conor Dooley
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