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From: Jan Beulich <jbeulich@suse.com>
To: "Roger Pau Monné" <roger.pau@citrix.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
	Paul Durrant <paul@xen.org>
Subject: Re: [PATCH] x86/HVM: don't mark evtchn upcall vector as pending when vLAPIC is disabled
Date: Mon, 21 Nov 2022 12:14:50 +0100	[thread overview]
Message-ID: <c8327e9e-b954-dcfb-3c58-6e3a4eab377a@suse.com> (raw)
In-Reply-To: <Y3tYxMSGLDtBLHVc@Air-de-Roger>

On 21.11.2022 11:53, Roger Pau Monné wrote:
> On Mon, Nov 21, 2022 at 09:33:53AM +0100, Jan Beulich wrote:
>> On 18.11.2022 15:26, Roger Pau Monné wrote:
>>> Maybe best to add an ASSERT in vlapic_set_irq() to be sure the lapic is
>>> enabled, as other callers already check this before trying to inject?
>>
>> Perhaps, yes (once we've fixed paths where the check is presently
>> missing).
> 
> Another option would be to unconditionally return 0 for IRR and ISR
> reads when the LAPIC is disabled, that would avoid having to force the
> event channel injection when the LAPIC is enabled, but there could be
> more than just the event channel vector queued in that way which would
> be against the spec.

Pre-existing set IRR bits remain set when moving into disabled mode. If
we faked zeros for reads, we'd violate the spec and undermine Linux'es
checking of the bits.

Jan


  reply	other threads:[~2022-11-21 11:15 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-18 10:31 [PATCH] x86/HVM: don't mark evtchn upcall vector as pending when vLAPIC is disabled Jan Beulich
2022-11-18 12:31 ` Juergen Gross
2022-11-18 12:33 ` Andrew Cooper
2022-11-18 12:51   ` Roger Pau Monné
2022-11-18 12:54   ` Jan Beulich
2022-11-18 13:55     ` Roger Pau Monné
2022-11-18 13:58       ` Jan Beulich
2022-11-18 14:09         ` Roger Pau Monné
2022-11-18 14:27     ` Andrew Cooper
2022-11-21  8:56       ` Jan Beulich
2022-11-21 12:23         ` Andrew Cooper
2022-11-21 12:34           ` Jan Beulich
2022-11-23 12:03             ` Roger Pau Monné
2022-11-24  7:59               ` Jan Beulich
2022-11-24  8:42                 ` Roger Pau Monné
2022-11-24  9:06                   ` Roger Pau Monné
2022-11-24  9:11                     ` Jan Beulich
2022-11-24  9:33                       ` Roger Pau Monné
2022-11-24 11:16                         ` Jan Beulich
2022-11-24 15:12                           ` Roger Pau Monné
2022-11-25  8:43                             ` Jan Beulich
2022-11-25  9:00                               ` Roger Pau Monné
2022-11-25  9:09                                 ` Jan Beulich
2022-11-24  9:06                   ` Jan Beulich
2022-12-05 13:44           ` Jan Beulich
2022-11-18 14:26 ` Roger Pau Monné
2022-11-21  8:33   ` Jan Beulich
2022-11-21 10:53     ` Roger Pau Monné
2022-11-21 11:14       ` Jan Beulich [this message]
2022-11-21 12:06     ` Jan Beulich

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