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From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
To: Herve Codina <herve.codina@bootlin.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	Eric Dumazet <edumazet@google.com>,
	Mark Brown <broonie@kernel.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	linuxppc-dev@lists.ozlabs.org,
	"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH 3/4] net: wan: fsl_qmc_hdlc: Add runtime timeslots changes support
Date: Wed, 24 Jan 2024 16:19:03 +0000	[thread overview]
Message-ID: <c8b3c672-864b-497a-9348-383412632a3d@linux.dev> (raw)
In-Reply-To: <20240124162646.24bf9235@bootlin.com>

On 24/01/2024 15:26, Herve Codina wrote:
> Hi Vadim,
> 
> On Wed, 24 Jan 2024 10:10:46 +0000
> Vadim Fedorenko <vadim.fedorenko@linux.dev> wrote:
> 
> [...]
>>> +static int qmc_hdlc_xlate_slot_map(struct qmc_hdlc *qmc_hdlc,
>>> +				   u32 slot_map, struct qmc_chan_ts_info *ts_info)
>>> +{
>>> +	u64 ts_mask_avail;
>>> +	unsigned int bit;
>>> +	unsigned int i;
>>> +	u64 ts_mask;
>>> +	u64 map;
>>> +
>>> +	/* Tx and Rx masks must be identical */
>>> +	if (ts_info->rx_ts_mask_avail != ts_info->tx_ts_mask_avail) {
>>> +		dev_err(qmc_hdlc->dev, "tx and rx available timeslots mismatch (0x%llx, 0x%llx)\n",
>>> +			ts_info->rx_ts_mask_avail, ts_info->tx_ts_mask_avail);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	ts_mask_avail = ts_info->rx_ts_mask_avail;
>>> +	ts_mask = 0;
>>> +	map = slot_map;
>>> +	bit = 0;
>>> +	for (i = 0; i < 64; i++) {
>>> +		if (ts_mask_avail & BIT_ULL(i)) {
>>> +			if (map & BIT_ULL(bit))
>>> +				ts_mask |= BIT_ULL(i);
>>> +			bit++;
>>> +		}
>>> +	}
>>> +
>>> +	if (hweight64(ts_mask) != hweight64(map)) {
>>> +		dev_err(qmc_hdlc->dev, "Cannot translate timeslots 0x%llx -> (0x%llx,0x%llx)\n",
>>> +			map, ts_mask_avail, ts_mask);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	ts_info->tx_ts_mask = ts_mask;
>>> +	ts_info->rx_ts_mask = ts_mask;
>>> +	return 0;
>>> +}
>>> +
>>> +static int qmc_hdlc_xlate_ts_info(struct qmc_hdlc *qmc_hdlc,
>>> +				  const struct qmc_chan_ts_info *ts_info, u32 *slot_map)
>>> +{
>>> +	u64 ts_mask_avail;
>>> +	unsigned int bit;
>>> +	unsigned int i;
>>> +	u64 ts_mask;
>>> +	u64 map;
>>> +
>>
>> Starting from here ...
>>
>>> +	/* Tx and Rx masks must be identical */
>>> +	if (ts_info->rx_ts_mask_avail != ts_info->tx_ts_mask_avail) {
>>> +		dev_err(qmc_hdlc->dev, "tx and rx available timeslots mismatch (0x%llx, 0x%llx)\n",
>>> +			ts_info->rx_ts_mask_avail, ts_info->tx_ts_mask_avail);
>>> +		return -EINVAL;
>>> +	}
>>> +	if (ts_info->rx_ts_mask != ts_info->tx_ts_mask) {
>>> +		dev_err(qmc_hdlc->dev, "tx and rx timeslots mismatch (0x%llx, 0x%llx)\n",
>>> +			ts_info->rx_ts_mask, ts_info->tx_ts_mask);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	ts_mask_avail = ts_info->rx_ts_mask_avail;
>>> +	ts_mask = ts_info->rx_ts_mask;
>>> +	map = 0;
>>> +	bit = 0;
>>> +	for (i = 0; i < 64; i++) {
>>> +		if (ts_mask_avail & BIT_ULL(i)) {
>>> +			if (ts_mask & BIT_ULL(i))
>>> +				map |= BIT_ULL(bit);
>>> +			bit++;
>>> +		}
>>> +	}
>>> +
>>> +	if (hweight64(ts_mask) != hweight64(map)) {
>>> +		dev_err(qmc_hdlc->dev, "Cannot translate timeslots (0x%llx,0x%llx) -> 0x%llx\n",
>>> +			ts_mask_avail, ts_mask, map);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>
>> till here the block looks like copy of the block from previous function.
>> It worth to make a separate function for it, I think.
>>
>>> +	if (map >= BIT_ULL(32)) {
>>> +		dev_err(qmc_hdlc->dev, "Slot map out of 32bit (0x%llx,0x%llx) -> 0x%llx\n",
>>> +			ts_mask_avail, ts_mask, map);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	*slot_map = map;
>>> +	return 0;
>>> +}
>>> +
> [...]
> 
> I am not so sure. There are slighty differences between the two functions.
> The error messages and, in particular, the loop in qmc_hdlc_xlate_slot_map() is:
> 	--- 8< ---
> 	ts_mask_avail = ts_info->rx_ts_mask_avail;
> 	ts_mask = 0;
> 	map = slot_map;
> 	bit = 0;
> 	for (i = 0; i < 64; i++) {
> 		if (ts_mask_avail & BIT_ULL(i)) {
> 			if (map & BIT_ULL(bit))
> 				ts_mask |= BIT_ULL(i);
> 			bit++;
> 		}
> 	}
> 	--- 8< ---
> 
> whereas it is the following in qmc_hdlc_xlate_ts_info():
> 	--- 8< ---
> 	ts_mask_avail = ts_info->rx_ts_mask_avail;
> 	ts_mask = ts_info->rx_ts_mask;
> 	map = 0;
> 	bit = 0;
> 	for (i = 0; i < 64; i++) {
> 		if (ts_mask_avail & BIT_ULL(i)) {
> 			if (ts_mask & BIT_ULL(i))
> 				map |= BIT_ULL(bit);
> 			bit++;
> 		}
> 	}
> 	--- 8< ---
> 
> ts_map and map initializations are not the same, i and bit are not used for
> the same purpose and the computed value is not computed based on the same
> information.
> 
> With that pointed, I am not sure that having some common code for both
> function will be relevant. Your opinion ?

I see. I'm just thinking if it's possible to use helpers from bitops.h
and bitmap.h here to avoid open-coding common parts of the code.

> Best regards,
> Hervé


WARNING: multiple messages have this Message-ID (diff)
From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
To: Herve Codina <herve.codina@bootlin.com>
Cc: "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, Andrew Lunn <andrew@lunn.ch>,
	Mark Brown <broonie@kernel.org>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH 3/4] net: wan: fsl_qmc_hdlc: Add runtime timeslots changes support
Date: Wed, 24 Jan 2024 16:19:03 +0000	[thread overview]
Message-ID: <c8b3c672-864b-497a-9348-383412632a3d@linux.dev> (raw)
In-Reply-To: <20240124162646.24bf9235@bootlin.com>

On 24/01/2024 15:26, Herve Codina wrote:
> Hi Vadim,
> 
> On Wed, 24 Jan 2024 10:10:46 +0000
> Vadim Fedorenko <vadim.fedorenko@linux.dev> wrote:
> 
> [...]
>>> +static int qmc_hdlc_xlate_slot_map(struct qmc_hdlc *qmc_hdlc,
>>> +				   u32 slot_map, struct qmc_chan_ts_info *ts_info)
>>> +{
>>> +	u64 ts_mask_avail;
>>> +	unsigned int bit;
>>> +	unsigned int i;
>>> +	u64 ts_mask;
>>> +	u64 map;
>>> +
>>> +	/* Tx and Rx masks must be identical */
>>> +	if (ts_info->rx_ts_mask_avail != ts_info->tx_ts_mask_avail) {
>>> +		dev_err(qmc_hdlc->dev, "tx and rx available timeslots mismatch (0x%llx, 0x%llx)\n",
>>> +			ts_info->rx_ts_mask_avail, ts_info->tx_ts_mask_avail);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	ts_mask_avail = ts_info->rx_ts_mask_avail;
>>> +	ts_mask = 0;
>>> +	map = slot_map;
>>> +	bit = 0;
>>> +	for (i = 0; i < 64; i++) {
>>> +		if (ts_mask_avail & BIT_ULL(i)) {
>>> +			if (map & BIT_ULL(bit))
>>> +				ts_mask |= BIT_ULL(i);
>>> +			bit++;
>>> +		}
>>> +	}
>>> +
>>> +	if (hweight64(ts_mask) != hweight64(map)) {
>>> +		dev_err(qmc_hdlc->dev, "Cannot translate timeslots 0x%llx -> (0x%llx,0x%llx)\n",
>>> +			map, ts_mask_avail, ts_mask);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	ts_info->tx_ts_mask = ts_mask;
>>> +	ts_info->rx_ts_mask = ts_mask;
>>> +	return 0;
>>> +}
>>> +
>>> +static int qmc_hdlc_xlate_ts_info(struct qmc_hdlc *qmc_hdlc,
>>> +				  const struct qmc_chan_ts_info *ts_info, u32 *slot_map)
>>> +{
>>> +	u64 ts_mask_avail;
>>> +	unsigned int bit;
>>> +	unsigned int i;
>>> +	u64 ts_mask;
>>> +	u64 map;
>>> +
>>
>> Starting from here ...
>>
>>> +	/* Tx and Rx masks must be identical */
>>> +	if (ts_info->rx_ts_mask_avail != ts_info->tx_ts_mask_avail) {
>>> +		dev_err(qmc_hdlc->dev, "tx and rx available timeslots mismatch (0x%llx, 0x%llx)\n",
>>> +			ts_info->rx_ts_mask_avail, ts_info->tx_ts_mask_avail);
>>> +		return -EINVAL;
>>> +	}
>>> +	if (ts_info->rx_ts_mask != ts_info->tx_ts_mask) {
>>> +		dev_err(qmc_hdlc->dev, "tx and rx timeslots mismatch (0x%llx, 0x%llx)\n",
>>> +			ts_info->rx_ts_mask, ts_info->tx_ts_mask);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	ts_mask_avail = ts_info->rx_ts_mask_avail;
>>> +	ts_mask = ts_info->rx_ts_mask;
>>> +	map = 0;
>>> +	bit = 0;
>>> +	for (i = 0; i < 64; i++) {
>>> +		if (ts_mask_avail & BIT_ULL(i)) {
>>> +			if (ts_mask & BIT_ULL(i))
>>> +				map |= BIT_ULL(bit);
>>> +			bit++;
>>> +		}
>>> +	}
>>> +
>>> +	if (hweight64(ts_mask) != hweight64(map)) {
>>> +		dev_err(qmc_hdlc->dev, "Cannot translate timeslots (0x%llx,0x%llx) -> 0x%llx\n",
>>> +			ts_mask_avail, ts_mask, map);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>
>> till here the block looks like copy of the block from previous function.
>> It worth to make a separate function for it, I think.
>>
>>> +	if (map >= BIT_ULL(32)) {
>>> +		dev_err(qmc_hdlc->dev, "Slot map out of 32bit (0x%llx,0x%llx) -> 0x%llx\n",
>>> +			ts_mask_avail, ts_mask, map);
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	*slot_map = map;
>>> +	return 0;
>>> +}
>>> +
> [...]
> 
> I am not so sure. There are slighty differences between the two functions.
> The error messages and, in particular, the loop in qmc_hdlc_xlate_slot_map() is:
> 	--- 8< ---
> 	ts_mask_avail = ts_info->rx_ts_mask_avail;
> 	ts_mask = 0;
> 	map = slot_map;
> 	bit = 0;
> 	for (i = 0; i < 64; i++) {
> 		if (ts_mask_avail & BIT_ULL(i)) {
> 			if (map & BIT_ULL(bit))
> 				ts_mask |= BIT_ULL(i);
> 			bit++;
> 		}
> 	}
> 	--- 8< ---
> 
> whereas it is the following in qmc_hdlc_xlate_ts_info():
> 	--- 8< ---
> 	ts_mask_avail = ts_info->rx_ts_mask_avail;
> 	ts_mask = ts_info->rx_ts_mask;
> 	map = 0;
> 	bit = 0;
> 	for (i = 0; i < 64; i++) {
> 		if (ts_mask_avail & BIT_ULL(i)) {
> 			if (ts_mask & BIT_ULL(i))
> 				map |= BIT_ULL(bit);
> 			bit++;
> 		}
> 	}
> 	--- 8< ---
> 
> ts_map and map initializations are not the same, i and bit are not used for
> the same purpose and the computed value is not computed based on the same
> information.
> 
> With that pointed, I am not sure that having some common code for both
> function will be relevant. Your opinion ?

I see. I'm just thinking if it's possible to use helpers from bitops.h
and bitmap.h here to avoid open-coding common parts of the code.

> Best regards,
> Hervé


  reply	other threads:[~2024-01-25  1:00 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 16:49 [PATCH 0/4] Add support for QMC HDLC Herve Codina
2024-01-23 16:49 ` Herve Codina
2024-01-23 16:49 ` [PATCH 1/4] net: wan: " Herve Codina
2024-01-23 16:49   ` Herve Codina
2024-01-24 10:03   ` Vadim Fedorenko
2024-01-24 10:03     ` Vadim Fedorenko
2024-01-24 14:39     ` Herve Codina
2024-01-24 14:39       ` Herve Codina
2024-01-23 16:49 ` [PATCH 2/4] MAINTAINERS: Add the Freescale QMC HDLC driver entry Herve Codina
2024-01-23 16:49   ` Herve Codina
2024-01-23 16:49 ` [PATCH 3/4] net: wan: fsl_qmc_hdlc: Add runtime timeslots changes support Herve Codina
2024-01-23 16:49   ` Herve Codina
2024-01-24 10:10   ` Vadim Fedorenko
2024-01-24 10:10     ` Vadim Fedorenko
2024-01-24 15:26     ` Herve Codina
2024-01-24 15:26       ` Herve Codina
2024-01-24 16:19       ` Vadim Fedorenko [this message]
2024-01-24 16:19         ` Vadim Fedorenko
2024-01-23 16:49 ` [PATCH 4/4] net: wan: fsl_qmc_hdlc: Add framer support Herve Codina
2024-01-23 16:49   ` Herve Codina

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