From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Cc: platform-driver-x86@vger.kernel.org,
intel-xe@lists.freedesktop.org, hdegoede@redhat.com,
ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com,
rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com,
airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com
Subject: Re: [PATCH v6 11/12] platform/x86/intel/pmt: use a version struct
Date: Mon, 7 Jul 2025 16:34:19 +0300 (EEST) [thread overview]
Message-ID: <c9750800-90b5-8814-d669-8178db38b98d@linux.intel.com> (raw)
In-Reply-To: <20250703211150.135320-12-michael.j.ruhl@intel.com>
[-- Attachment #1: Type: text/plain, Size: 6607 bytes --]
On Thu, 3 Jul 2025, Michael J. Ruhl wrote:
> In preparation for supporting multiple crashlog versions, use a struct
> to keep bit offset info for the status and control bits.
>
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
> drivers/platform/x86/intel/pmt/crashlog.c | 92 ++++++++++++++++-------
> 1 file changed, 66 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index 8cca520c5a1c..edc41144909c 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -24,21 +24,6 @@
> /* Crashlog discovery header types */
> #define CRASH_TYPE_OOBMSM 1
>
> -/* Control Flags */
> -#define CRASHLOG_FLAG_DISABLE BIT(28)
> -
> -/*
> - * Bits 29 and 30 control the state of bit 31.
> - *
> - * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
> - * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
> - * Bit 31 is the read-only status with a 1 indicating log is complete.
> - */
> -#define CRASHLOG_FLAG_TRIGGER_CLEAR BIT(29)
> -#define CRASHLOG_FLAG_TRIGGER_EXECUTE BIT(30)
> -#define CRASHLOG_FLAG_TRIGGER_COMPLETE BIT(31)
> -#define CRASHLOG_FLAG_TRIGGER_MASK GENMASK(31, 28)
> -
> /* Crashlog Discovery Header */
> #define CONTROL_OFFSET 0x0
> #define GUID_OFFSET 0x4
> @@ -50,10 +35,63 @@
> /* size is in bytes */
> #define GET_SIZE(v) ((v) * sizeof(u32))
>
> +/*
> + * Type 1 Version 0
> + * status and control registers are combined.
> + *
> + * Bits 29 and 30 control the state of bit 31.
> + * Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
> + * Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
> + * Bit 31 is the read-only status with a 1 indicating log is complete.
> + */
> +#define TYPE1_VER0_STATUS_OFFSET 0x00
> +#define TYPE1_VER0_CONTROL_OFFSET 0x00
> +
> +#define TYPE1_VER0_DISABLE BIT(28)
> +#define TYPE1_VER0_CLEAR BIT(29)
> +#define TYPE1_VER0_EXECUTE BIT(30)
> +#define TYPE1_VER0_COMPLETE BIT(31)
> +#define TYPE1_VER0_TRIGGER_MASK GENMASK(31, 28)
> +
> +/* After offset, order alphabetically, not bit ordered */
> +struct crashlog_status {
> + u32 offset;
> + u32 cleared;
> + u32 complete;
> + u32 disabled;
> +};
> +
> +struct crashlog_control {
> + u32 offset;
> + u32 trigger_mask;
> + u32 clear;
> + u32 disable;
> + u32 manual;
> +};
> +
> +struct crashlog_info {
> + struct crashlog_status status;
> + struct crashlog_control control;
> +};
> +
> +static const struct crashlog_info crashlog_type1_ver0 = {
> + .status.offset = TYPE1_VER0_STATUS_OFFSET,
> + .status.cleared = TYPE1_VER0_CLEAR,
> + .status.complete = TYPE1_VER0_COMPLETE,
> + .status.disabled = TYPE1_VER0_DISABLE,
> +
> + .control.offset = TYPE1_VER0_CONTROL_OFFSET,
> + .control.trigger_mask = TYPE1_VER0_TRIGGER_MASK,
> + .control.clear = TYPE1_VER0_CLEAR,
> + .control.disable = TYPE1_VER0_DISABLE,
> + .control.manual = TYPE1_VER0_EXECUTE,
> +};
> +
> struct crashlog_entry {
> /* entry must be first member of struct */
> struct intel_pmt_entry entry;
> struct mutex control_mutex;
> + const struct crashlog_info *info;
> };
>
> struct pmt_crashlog_priv {
> @@ -70,24 +108,25 @@ struct pmt_crashlog_priv {
> /* read/modify/write */
> static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
> {
> + const struct crashlog_control *control = &crashlog->info->control;
> struct intel_pmt_entry *entry = &crashlog->entry;
> - u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
> + u32 reg = readl(entry->disc_table + control->offset);
>
> - reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
> + reg &= ~control->trigger_mask;
>
> if (set)
> reg |= bit;
> else
> reg &= ~bit;
>
> - writel(reg, entry->disc_table + CONTROL_OFFSET);
> + writel(reg, entry->disc_table + control->offset);
> }
>
> /* read/check */
> static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
> {
> - struct intel_pmt_entry *entry = &crashlog->entry;
> - u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
> + const struct crashlog_status *status = &crashlog->info->status;
> + u32 reg = readl(crashlog->entry.disc_table + status->offset);
>
> return !!(reg & bit);
> }
> @@ -95,13 +134,13 @@ static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
> static bool pmt_crashlog_complete(struct crashlog_entry *crashlog)
> {
> /* return current value of the crashlog complete flag */
> - return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_TRIGGER_COMPLETE);
> + return pmt_crashlog_rc(crashlog, crashlog->info->status.complete);
> }
>
> static bool pmt_crashlog_disabled(struct crashlog_entry *crashlog)
> {
> /* return current value of the crashlog disabled flag */
> - return pmt_crashlog_rc(crashlog, CRASHLOG_FLAG_DISABLE);
> + return pmt_crashlog_rc(crashlog, crashlog->info->status.disabled);
> }
>
> static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
> @@ -121,17 +160,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
>
> static void pmt_crashlog_set_disable(struct crashlog_entry *crashlog, bool disable)
> {
> - pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_DISABLE, disable);
> + pmt_crashlog_rmw(crashlog, crashlog->info->control.disable, disable);
> }
>
> static void pmt_crashlog_set_clear(struct crashlog_entry *crashlog)
> {
> - pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_CLEAR, CRASHLOG_SET_BIT);
> + pmt_crashlog_rmw(crashlog, crashlog->info->control.clear, CRASHLOG_SET_BIT);
> }
>
> static void pmt_crashlog_set_execute(struct crashlog_entry *crashlog)
> {
> - pmt_crashlog_rmw(crashlog, CRASHLOG_FLAG_TRIGGER_EXECUTE, CRASHLOG_SET_BIT);
> + pmt_crashlog_rmw(crashlog, crashlog->info->control.manual, CRASHLOG_SET_BIT);
> }
>
> /*
> @@ -235,9 +274,10 @@ static int pmt_crashlog_header_decode(struct intel_pmt_entry *entry,
> if (!pmt_crashlog_supported(entry))
> return 1;
>
> - /* initialize control mutex */
> + /* initialize the crashlog struct */
> crashlog = container_of(entry, struct crashlog_entry, entry);
> mutex_init(&crashlog->control_mutex);
> + crashlog->info = &crashlog_type1_ver0;
>
> header->access_type = GET_ACCESS(readl(disc_table));
> header->guid = readl(disc_table + GUID_OFFSET);
>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
--
i.
next prev parent reply other threads:[~2025-07-07 13:34 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-03 21:11 [PATCH v6 00/12] Crashlog Type1 Version2 support Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 01/12] platform/x86/intel/pmt: fix a crashlog NULL pointer access Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 02/12] drm/xe: Correct BMG VSEC header sizing Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 03/12] platform/x86/intel/pmt: white space cleanup Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 04/12] platform/x86/intel/pmt: mutex clean up Michael J. Ruhl
2025-07-07 13:16 ` Ilpo Järvinen
2025-07-03 21:11 ` [PATCH v6 05/12] platform/x86/intel/pmt: use guard(mutex) Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 06/12] platform/x86/intel/pmt: re-order trigger logic Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 07/12] platform/x86/intel/pmt: correct types Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 08/12] platform/x86/intel/pmt: decouple sysfs and namespace Michael J. Ruhl
2025-07-03 21:11 ` [PATCH v6 09/12] platform/x86/intel/pmt: add register access helpers Michael J. Ruhl
2025-07-07 13:23 ` Ilpo Järvinen
2025-07-03 21:11 ` [PATCH v6 10/12] platform/x86/intel/pmt: refactor base parameter Michael J. Ruhl
2025-07-07 13:28 ` Ilpo Järvinen
2025-07-03 21:11 ` [PATCH v6 11/12] platform/x86/intel/pmt: use a version struct Michael J. Ruhl
2025-07-07 13:34 ` Ilpo Järvinen [this message]
2025-07-03 21:11 ` [PATCH v6 12/12] platform/x86/intel/pmt: support BMG crashlog Michael J. Ruhl
2025-07-07 13:45 ` Ilpo Järvinen
2025-07-07 21:35 ` Ruhl, Michael J
2025-07-03 21:19 ` ✓ CI.KUnit: success for Crashlog Type1 Version2 support (rev6) Patchwork
2025-07-03 22:01 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-05 15:25 ` ✓ Xe.CI.Full: " Patchwork
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