* [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb
@ 2024-02-19 15:02 Josua Mayer
2024-02-19 15:03 ` [PATCH v7 1/4] dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T Josua Mayer
` (4 more replies)
0 siblings, 5 replies; 15+ messages in thread
From: Josua Mayer @ 2024-02-19 15:02 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: devicetree, Grygorii Strashko, linux-kernel, MD Danish Anwar,
Josua Mayer, Krzysztof Kozlowski, Yazan Shhady, linux-arm-kernel
This series adds DT bindings and dts descriptions for SolidRun AM642
based SoM and Hummingboard EVB.
Additionally a commit from downstream vendor kernel are included,
enhancing support for pru based ethernet.
I wasn't sure how to properly annotate it in commit description /
signed-off area ...:
1. add description for "Industrial Ethernet Peripherals" (IEP) to am64
https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/arch/arm64/boot/dts/ti/k3-am64-main.dtsi?h=ti-linux-6.1.y-cicd&id=5afb73d82a014b59462162d960b350b8c58e5ae6
IEP is already supported in-tree by a driver, and used in
k3-am65-main.dtsi.
To avoid introducing new dtbs_check errors, respective patches were
submitted via rtc, mtd and iio trees.
Only one error remains which is common to all k3-am64:
- 'mux-controller' does not match any of the regexes
To: Nishanth Menon <nm@ti.com>
To: Vignesh Raghavendra <vigneshr@ti.com>
To: Tero Kristo <kristo@kernel.org>
To: Rob Herring <robh+dt@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
To: Conor Dooley <conor+dt@kernel.org>
Cc: Yazan Shhady <yazan.shhady@solid-run.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Josua Mayer <josua@solid-run.com>
Changes in v7:
- split rtc, iio, mtd bindings to go via respective trees:
- iio: https://lore.kernel.org/r/20240219-iio-hdc20x0-interrupt-binding-v7-1-c8ffb39c3768@solid-run.com
- mtd: https://lore.kernel.org/r/20240219-mtd-flash-interrupt-binding-v7-1-206e30a656fa@solid-run.com
- rtc: https://lore.kernel.org/r/20240219-rtc-abracon-convert-bindings-v7-1-aca4fc3b8cec@solid-run.com
- Link to v6: https://lore.kernel.org/r/20240212-add-am64-som-v6-0-b59edb2bc8c3@solid-run.com
Changes in v6:
- renamed pinctrl nodes to *-default-pins
(reported by Vignesh Raghavendra <vigneshr@ti.com>)
(dropped Reviewed-by: Andrew Davis <afd@ti.com> because all the rename)
- removed tabs from pinctrl comments to shorten lines
- updated humidity sensor yaml with interrupts property
- updated spi-nor flash yaml with interrupts property
- Link to v5: https://lore.kernel.org/r/20240211-add-am64-som-v5-0-790ed7121249@solid-run.com
Changes in v5:
- abracon,abx80x.yaml:
- reworded 'compatible' description
- removed $ref to interrupts.yaml
- nested example in fake i2c
- changed maintainer to rtc list
(reported by Conor Dooley <conor@kernel.org>)
- patch 4/5 dts:
- re-added status properties for sdhci nodes
k3-am64-main.dtsi has been changed in-tree since v1
such that sdhci nodes are explicitly status disabled now.
- picked up reviewed-by
(reported by Andrew Davis <afd@ti.com>)
- Link to v4: https://lore.kernel.org/r/20240202-add-am64-som-v4-0-5f8b12af5e71@solid-run.com
Changes in v4:
- abracon,abx80x.yaml: fixed dtc error in example irq reference
- Link to v3: https://lore.kernel.org/r/20240202-add-am64-som-v3-0-2f44023d50e9@solid-run.com
Changes in v3:
- removed lots more status properties, double-checked against soc dtsi
(reported by Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>)
(reported by Andrew Davis <afd@ti.com>)
- removed intentionally-disabled pcie node from dts
- rewrote yaml bindings to use enum instead of anyof+const+description
(reported by Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>)
- abracon yaml
- added missing maintainer
- added diode type property type
- added example
(reported by Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>)
- added reference to /schemas/interrupts.yaml#
- use generic name for pru ethernet controller node
(reported by Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>)
- removed unnamed dmas from pru ethernet controller node
- moved pcie/usb3 features to dtb overlays
- Link to v2: https://lore.kernel.org/r/20240112-add-am64-som-v2-0-1385246c428c@solid-run.com
Changes in v2:
- reordered patchset to drop separate patch adding iep handle to som
- moved dtbs_check warnings to cover letter
- converted abracon abx80x rtc bindings to yaml
- updated dts:
- remove unnecessary status properties
- changed non-generic node names
- use color property for led descriptions,
they have no default function on evaluation board
- drop earlycon bootargs from chosen node
(reported by Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>)
- converted charger node to comment, part not assembled, has no bindings
- picked up acked-by on board bindings patch
- Link to v1: https://lore.kernel.org/r/20240103-add-am64-som-v1-0-dda1f9227aef@solid-run.com
---
Josua Mayer (3):
dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T
arm64: dts: add description for solidrun am642 som and evaluation board
arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3
Suman Anna (1):
arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes
Documentation/devicetree/bindings/arm/ti/k3.yaml | 7 +
arch/arm64/boot/dts/ti/Makefile | 7 +
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 +
.../boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso | 45 ++
.../boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso | 44 ++
arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts | 292 ++++++++++
arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 594 +++++++++++++++++++++
7 files changed, 1013 insertions(+)
---
base-commit: 83d0ff463b50d2395e05339a34e35d14ba82043f
change-id: 20240101-add-am64-som-51a1ca47edf3
Best regards,
--
Josua Mayer <josua@solid-run.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v7 1/4] dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T 2024-02-19 15:02 [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Josua Mayer @ 2024-02-19 15:03 ` Josua Mayer 2024-02-19 15:03 ` [PATCH v7 2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes Josua Mayer ` (3 subsequent siblings) 4 siblings, 0 replies; 15+ messages in thread From: Josua Mayer @ 2024-02-19 15:03 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Yazan Shhady, linux-arm-kernel, devicetree, linux-kernel, Josua Mayer, Krzysztof Kozlowski Add bindings for SolidRun AM642 HummingBoard-T Board, which is the evaluation board for SolidRun AM642 SoM. Signed-off-by: Josua Mayer <josua@solid-run.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index c6506bccfe88..0233a8b0b6fc 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -87,6 +87,13 @@ properties: - const: tq,am642-tqma6442l - const: ti,am642 + - description: K3 AM642 SoC SolidRun SoM based boards + items: + - enum: + - solidrun,am642-hummingboard-t + - const: solidrun,am642-sr-som + - const: ti,am642 + - description: K3 AM654 SoC items: - enum: -- 2.35.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v7 2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes 2024-02-19 15:02 [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Josua Mayer 2024-02-19 15:03 ` [PATCH v7 1/4] dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T Josua Mayer @ 2024-02-19 15:03 ` Josua Mayer 2024-02-27 14:12 ` Vignesh Raghavendra 2024-02-19 15:03 ` [PATCH v7 3/4] arm64: dts: add description for solidrun am642 som and evaluation board Josua Mayer ` (2 subsequent siblings) 4 siblings, 1 reply; 15+ messages in thread From: Josua Mayer @ 2024-02-19 15:03 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, Grygorii Strashko, linux-kernel, MD Danish Anwar, Josua Mayer, Yazan Shhady, linux-arm-kernel From: Suman Anna <s-anna@ti.com> The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) to manage/generate Industrial Ethernet functions such as time stamping. Each IEP sub-module is sourced from an internal clock mux that can be derived from either of the IP instance's ICSSG_IEP_GCLK or from another internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG instances. The IEP clock is currently configured to be derived indirectly from the ICSSG_ICLK running at 250 MHz. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: Josua Mayer <josua@solid-run.com> --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index e348114f42e0..9d2dad8ae8df 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1244,6 +1244,18 @@ icssg0_iepclk_mux: iepclk-mux@30 { }; }; + icssg0_iep0: iep@2e000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2e000 0x1000>; + clocks = <&icssg0_iepclk_mux>; + }; + + icssg0_iep1: iep@2f000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2f000 0x1000>; + clocks = <&icssg0_iepclk_mux>; + }; + icssg0_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>; @@ -1385,6 +1397,18 @@ icssg1_iepclk_mux: iepclk-mux@30 { }; }; + icssg1_iep0: iep@2e000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2e000 0x1000>; + clocks = <&icssg1_iepclk_mux>; + }; + + icssg1_iep1: iep@2f000 { + compatible = "ti,am654-icss-iep"; + reg = <0x2f000 0x1000>; + clocks = <&icssg1_iepclk_mux>; + }; + icssg1_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>; -- 2.35.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v7 2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes 2024-02-19 15:03 ` [PATCH v7 2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes Josua Mayer @ 2024-02-27 14:12 ` Vignesh Raghavendra 0 siblings, 0 replies; 15+ messages in thread From: Vignesh Raghavendra @ 2024-02-27 14:12 UTC (permalink / raw) To: Josua Mayer, Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, Grygorii Strashko, linux-kernel, MD Danish Anwar, Yazan Shhady, linux-arm-kernel On 19/02/24 20:33, Josua Mayer wrote: > From: Suman Anna <s-anna@ti.com> > > The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) > to manage/generate Industrial Ethernet functions such as time stamping. > Each IEP sub-module is sourced from an internal clock mux that can be > derived from either of the IP instance's ICSSG_IEP_GCLK or from another > internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG > instances. The IEP clock is currently configured to be derived > indirectly from the ICSSG_ICLK running at 250 MHz. > > Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> > Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> > Signed-off-by: Suman Anna <s-anna@ti.com> > Signed-off-by: MD Danish Anwar <danishanwar@ti.com> > Signed-off-by: Josua Mayer <josua@solid-run.com> > --- This patch is already picked as part of different series: https://lore.kernel.org/all/20240215103036.2825096-2-danishanwar@ti.com/ > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > index e348114f42e0..9d2dad8ae8df 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > @@ -1244,6 +1244,18 @@ icssg0_iepclk_mux: iepclk-mux@30 { > }; > }; > > + icssg0_iep0: iep@2e000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2e000 0x1000>; > + clocks = <&icssg0_iepclk_mux>; > + }; > + > + icssg0_iep1: iep@2f000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2f000 0x1000>; > + clocks = <&icssg0_iepclk_mux>; > + }; > + > icssg0_mii_rt: mii-rt@32000 { > compatible = "ti,pruss-mii", "syscon"; > reg = <0x32000 0x100>; > @@ -1385,6 +1397,18 @@ icssg1_iepclk_mux: iepclk-mux@30 { > }; > }; > > + icssg1_iep0: iep@2e000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2e000 0x1000>; > + clocks = <&icssg1_iepclk_mux>; > + }; > + > + icssg1_iep1: iep@2f000 { > + compatible = "ti,am654-icss-iep"; > + reg = <0x2f000 0x1000>; > + clocks = <&icssg1_iepclk_mux>; > + }; > + > icssg1_mii_rt: mii-rt@32000 { > compatible = "ti,pruss-mii", "syscon"; > reg = <0x32000 0x100>; > -- Regards Vignesh _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v7 3/4] arm64: dts: add description for solidrun am642 som and evaluation board 2024-02-19 15:02 [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Josua Mayer 2024-02-19 15:03 ` [PATCH v7 1/4] dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T Josua Mayer 2024-02-19 15:03 ` [PATCH v7 2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes Josua Mayer @ 2024-02-19 15:03 ` Josua Mayer 2024-02-19 15:03 ` [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 Josua Mayer 2024-02-27 14:09 ` (subset) [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Vignesh Raghavendra 4 siblings, 0 replies; 15+ messages in thread From: Josua Mayer @ 2024-02-19 15:03 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Yazan Shhady, linux-arm-kernel, devicetree, linux-kernel, Josua Mayer Add description for the SolidRun AM642 SoM, and HummingBoard-T evaluation board. The SoM features: - 1x cpsw ethernet with phy - 2x pru ethernet with phy - eMMC - spi flash (assembly option) Additionally microSD and usb-2.0 otg are included in the SoM description as they are supported boot sources for the SOC boot-rom. The Carrier provides: - 3x RJ45 connector - 2x M.2 connector - USB-2.0 Hub - USB-A Connector - LEDs - 2x CAN transceiver - 1x RS485 transceiver - sensors The M.2 connectors support either USB-3.1 or PCI-E depending on status of a mux. By default the mux is switched off. Signed-off-by: Josua Mayer <josua@solid-run.com> --- arch/arm64/boot/dts/ti/Makefile | 1 + arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts | 292 ++++++++++ arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 594 +++++++++++++++++++++ 3 files changed, 887 insertions(+) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 52c1dc910308..bd73ce06acba 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -38,6 +38,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-hdmi-audio.dtbo # Boards with AM64x SoC dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts new file mode 100644 index 000000000000..234d76e4e944 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts @@ -0,0 +1,292 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> + * + * DTS for SolidRun AM642 HummingBoard-T, + * running on Cortex A53. + * + */ + +/dts-v1/; + +#include <dt-bindings/leds/common.h> +#include <dt-bindings/phy/phy.h> + +#include "k3-am642.dtsi" +#include "k3-am642-sr-som.dtsi" + +/ { + model = "SolidRun AM642 HummingBoard-T"; + compatible = "solidrun,am642-hummingboard-t", "solidrun,am642-sr-som", "ti,am642"; + + aliases { + serial5 = &main_uart3; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_default_pins>; + + /* D24 */ + led1: led-1 { + label = "led1"; + gpios = <&main_gpio0 29 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_GREEN>; + }; + + /* D25 */ + led2: led-2 { + label = "led2"; + gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_GREEN>; + }; + + /* D26 */ + led3: led-3 { + label = "led3"; + gpios = <&main_gpio0 33 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_GREEN>; + }; + }; + + regulator-m2-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®ulator_pcie_3v3_default_pins>; + regulator-name = "m2-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&main_gpio1 17 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + regulator-vpp-1v8 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®ulator_vpp_1v8_default_pins>; + regulator-name = "vpp-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&main_gpio1 78 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + serdes_mux: mux-controller { + compatible = "gpio-mux"; + pinctrl-names = "default"; + pinctrl-0 = <&serdes_mux_default_pins>; + #mux-control-cells = <0>; + /* + * Mux has 2 IOs: + * - select: 0 = USB-3 (M2); 1 = PCIE (M1) + * - shutdown: 0 = active; 1 = disabled (high impedance) + */ + mux-gpios = <&main_gpio1 40 GPIO_ACTIVE_HIGH>, <&main_gpio1 41 GPIO_ACTIVE_HIGH>; + /* default disabled */ + idle-state = <2>; + }; +}; + +&main_gpio0 { + m2-reset-hog { + gpio-hog; + gpios = <12 GPIO_ACTIVE_LOW>; + output-low; /* deasserted */ + line-name = "m2-reset"; + }; + + m1-m2-w-disable1-hog { + gpio-hog; + gpios = <32 GPIO_ACTIVE_LOW>; + output-low; /* deasserted */ + line-name = "m1-m2-pcie-w-disable1"; + }; + + m1-m2-w-disable2-hog { + gpio-hog; + gpios = <34 GPIO_ACTIVE_LOW>; + output-low; /* deasserted */ + line-name = "m1-m2-pcie-w-disable2"; + }; +}; + +&main_gpio1 { + m1-pcie-clkreq0-hog { + gpio-hog; + gpios = <11 GPIO_ACTIVE_LOW>; + input; + line-name = "m1-pcie-clkreq0"; + }; + + m2-pcie-clkreq-hog { + gpio-hog; + gpios = <35 GPIO_ACTIVE_LOW>; + input; + line-name = "m2-pcie-clkreq"; + }; +}; + +&main_i2c0 { + pinctrl-0 = <&main_i2c0_default_pins>, <&main_i2c0_int_default_pins>; + + humidity-sensor@41 { + compatible = "ti,hdc2010"; + reg = <0x41>; + interrupt-parent = <&main_gpio0>; + interrupts = <37 IRQ_TYPE_EDGE_FALLING>; + }; + + light-sensor@44 { + compatible = "ti,opt3001"; + reg = <0x44>; + interrupt-parent = <&main_gpio0>; + interrupts = <37 IRQ_TYPE_EDGE_FALLING>; + }; + + /* charger@6a */ +}; + +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c1_default_pins>; + status = "okay"; + + rtc@69 { + compatible = "abracon,abx80x"; + reg = <0x69>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int_default_pins>; + abracon,tc-diode = "schottky"; + abracon,tc-resistor = <3>; + interrupt-parent = <&main_gpio0>; + interrupts = <44 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&main_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan0_default_pins>; + status = "okay"; + + can-transceiver { + max-bitrate = <8000000>; + }; +}; + +&main_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan1_default_pins>; + status = "okay"; + + can-transceiver { + max-bitrate = <8000000>; + }; +}; + +&main_pmx0 { + leds_default_pins: leds-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0074, PIN_OUTPUT, 7) /* GPMC0_AD14.GPIO0_29 */ + AM64X_IOPAD(0x0078, PIN_OUTPUT, 7) /* GPMC0_AD15.GPIO0_30 */ + AM64X_IOPAD(0x0088, PIN_OUTPUT, 7) /* GPMC0_OEn_REn.GPIO0_33 */ + >; + }; + + main_i2c0_int_default_pins: main-i2c0-int-default-pins { + pinctrl-single,pins = < + /* external pull-up on Carrier */ + AM64X_IOPAD(0x0098, PIN_INPUT, 7) /* GPMC0_WAIT0.GPIO0_37 */ + >; + }; + + main_i2c1_default_pins: main-i2c1-default-pins { + pinctrl-single,pins = < + /* external pull-up on SoM */ + AM64X_IOPAD(0x0268, PIN_INPUT, 0) /* I2C1_SCL.I2C1_SCL */ + AM64X_IOPAD(0x026c, PIN_INPUT, 0) /* I2C1_SDA.I2C1_SDA */ + >; + }; + + main_mcan0_default_pins: main-mcan0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* MCAN0_RX.MCAN0_RX */ + AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* MCAN0_TX.MCAN0_TX */ + >; + }; + + main_mcan1_default_pins: main-mcan1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* MCAN1_RX.MCAN1_RX */ + AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* MCAN1_TX.MCAN1_TX */ + >; + }; + + main_uart3_default_pins: main-uart3-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x016c, PIN_INPUT, 10) /* PRG0_PRU0_GPO3.UART3_CTSn */ + AM64X_IOPAD(0x0170, PIN_OUTPUT, 10) /* PRG0_PRU0_GPO4.UART3_TXD */ + AM64X_IOPAD(0x0174, PIN_OUTPUT, 10) /* PRG0_PRU0_GPO5.UART3_RTSn */ + AM64X_IOPAD(0x01ac, PIN_INPUT, 10) /* PRG0_PRU0_GPO19.UART3_RXD */ + >; + }; + + pcie0_default_pins: pcie0-default-pins { + pinctrl-single,pins = < + /* connector M2 RESET */ + AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* OSPI0_CSn1.GPIO0_12 */ + /* connectors M1 & M2 W_DISABLE1 */ + AM64X_IOPAD(0x0084, PIN_OUTPUT, 7) /* GPMC0_ADVN_ALE.GPIO0_32 */ + /* connectors M1 & M2 W_DISABLE2 */ + AM64X_IOPAD(0x008c, PIN_OUTPUT, 7) /* GPMC0_WEN.GPIO0_34 */ + /* connectors M1 & M2 PERST0 (PCI Reset) */ + AM64X_IOPAD(0x019c, PIN_OUTPUT, 7) /* PRG0_PRU0_GPO15.GPIO1_15 */ + /* connector M1 CLKREQ0 */ + AM64X_IOPAD(0x018c, PIN_INPUT, 7) /* PRG0_PRU0_GPO11.GPIO1_11 */ + /* connector M2 CLKREQ0 */ + AM64X_IOPAD(0x01ec, PIN_INPUT, 7) /* PRG0_PRU1_GPO15.GPIO1_35 */ + >; + }; + + regulator_pcie_3v3_default_pins: regulator-pcie-3v3-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01a4, PIN_OUTPUT, 7) /* PRG0_PRU0_GPO17.GPIO1_17 */ + >; + }; + + regulator_vpp_1v8_default_pins: regulator-vpp-1v8-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x029c, PIN_OUTPUT, 7) /* MMC1_SDWP.GPIO1_78 */ + >; + }; + + rtc_int_default_pins: rtc-int-default-pins { + pinctrl-single,pins = < + /* external pull-up on Carrier */ + AM64X_IOPAD(0x00b4, PIN_INPUT, 7) /* GPMC0_CSn3.GPIO0_44 */ + >; + }; + + serdes_mux_default_pins: serdes-mux-default-pins { + pinctrl-single,pins = < + /* SEL, 10k pull-down on carrier, 2.2k pullup on SoM */ + AM64X_IOPAD(0x0200, PIN_OUTPUT, 7) /* PRG0_MDIO0_MDIO.GPIO1_40 */ + /* EN */ + AM64X_IOPAD(0x0204, PIN_OUTPUT, 7) /* PRG0_MDIO0_MDC.GPIO1_41 */ + >; + }; +}; + +&main_uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart3_default_pins>; + uart-has-rtscts; + rs485-rts-active-low; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +&usb0 { + dr_mode = "host"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi new file mode 100644 index 000000000000..c19d0b8bbf0f --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi @@ -0,0 +1,594 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> + * + */ + +#include <dt-bindings/net/ti-dp83869.h> + +/ { + model = "SolidRun AM642 SoM"; + compatible = "solidrun,am642-sr-som", "ti,am642"; + + aliases { + ethernet0 = &cpsw_port1; + ethernet1 = &icssg1_emac0; + ethernet2 = &icssg1_emac1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + serial2 = &main_uart0; + }; + + chosen { + /* SoC default UART console */ + stdout-path = "serial2:115200n8"; + }; + + /* PRU Ethernet Controller */ + ethernet { + compatible = "ti,am642-icssg-prueth"; + pinctrl-names = "default"; + pinctrl-0 = <&pru_rgmii1_default_pins>, <&pru_rgmii2_default_pins>; + + sram = <&oc_sram>; + ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>; + firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", + "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", + "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", + "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", + "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", + "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf"; + + /* configure internal pinmux for mii mode */ + ti,pruss-gp-mux-sel = <2>, <2>, <2>, <2>, <2>, <2>; + + ti,mii-g-rt = <&icssg1_mii_g_rt>; + ti,mii-rt = <&icssg1_mii_rt>; + ti,iep = <&icssg1_iep0>, <&icssg1_iep1>; + + /* + * Configure icssg interrupt controller to map pru-internal + * interrupts 8/9 via channels 0/1 to host interrupts 0/1. + * + * For details see interrupt controller documentation: + * Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml + */ + interrupt-parent = <&icssg1_intc>; + interrupts = <24 0 2>, <25 1 3>; + interrupt-names = "tx_ts0", "tx_ts1"; + + dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */ + <&main_pktdma 0xc201 15>, /* egress slice 0 */ + <&main_pktdma 0xc202 15>, /* egress slice 0 */ + <&main_pktdma 0xc203 15>, /* egress slice 0 */ + <&main_pktdma 0xc204 15>, /* egress slice 1 */ + <&main_pktdma 0xc205 15>, /* egress slice 1 */ + <&main_pktdma 0xc206 15>, /* egress slice 1 */ + <&main_pktdma 0xc207 15>, /* egress slice 1 */ + <&main_pktdma 0x4200 15>, /* ingress slice 0 */ + <&main_pktdma 0x4201 15>; /* ingress slice 1 */ + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", + "tx1-0", "tx1-1", "tx1-2", "tx1-3", + "rx0", "rx1"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + icssg1_emac0: port@0 { + reg = <0>; + ti,syscon-rgmii-delay = <&main_conf 0x4110>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <ðernet_phy2>; + phy-mode = "rgmii-id"; + }; + + icssg1_emac1: port@1 { + reg = <1>; + ti,syscon-rgmii-delay = <&main_conf 0x4114>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <ðernet_phy1>; + phy-mode = "rgmii-id"; + }; + }; + }; + + /* DDR16SS0: + * - Bank 1 @ 0x080000000-0x0FFFFFFFF: max. 2GB in 32-bit address space + * - Bank 2 @ 0x880000000-0x9FFFFFFFF: max. 6GB in 64-bit address space + */ + memory@80000000 { + reg = <0x00000000 0x80000000 0x00000000 0x80000000>, + <0x00000008 0x80000000 0x00000001 0x80000000>; + device_type = "memory"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ + no-map; + }; + + main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0000000 0x00 0x100000>; + no-map; + }; + + main_r5fss0_core0_memory_region: r5f-memory@a0100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0100000 0x00 0xf00000>; + no-map; + }; + + main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa1000000 0x00 0x100000>; + no-map; + }; + + main_r5fss0_core1_memory_region: r5f-memory@a1100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa1100000 0x00 0xf00000>; + no-map; + }; + + main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa2000000 0x00 0x100000>; + no-map; + }; + + main_r5fss1_core0_memory_region: r5f-memory@a2100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa2100000 0x00 0xf00000>; + no-map; + }; + + main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa3000000 0x00 0x100000>; + no-map; + }; + + main_r5fss1_core1_memory_region: r5f-memory@a3100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa3100000 0x00 0xf00000>; + no-map; + }; + }; + + vdd_mmc0: regulator-vdd-mmc0 { + compatible = "regulator-fixed"; + regulator-name = "vdd-mmc0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&cpsw3g { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_default_pins>; +}; + +&cpsw3g_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&mdio0_default_pins>; + status = "okay"; + + ethernet_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id2000.a0f1"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <ðernet_phy0_default_pins>; + ti,clk-output-sel = <DP83869_CLK_O_SEL_REF_CLK>; + ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>; + /* + * Disable interrupts because ISR never clears 0x0040 + * + * interrupt-parent = <&main_gpio1>; + * interrupts = <70 IRQ_TYPE_LEVEL_LOW>; + */ + /* + * Disable HW Reset because clock signal is daisy-chained + * + * reset-gpios = <&main_gpio0 84 GPIO_ACTIVE_LOW>; + * reset-assert-us = <1>; + * reset-deassert-us = <30>; + */ + }; +}; + +&cpsw_port1 { + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy0>; +}; + +&cpsw_port2 { + status = "disabled"; +}; + +&icssg1_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&pru1_mdio0_default_pins>; + status = "okay"; + + ethernet_phy1: ethernet-phy@3 { + compatible = "ethernet-phy-id2000.a0f1"; + reg = <3>; + pinctrl-names = "default"; + pinctrl-0 = <ðernet_phy1_default_pins>; + ti,clk-output-sel = <DP83869_CLK_O_SEL_REF_CLK>; + ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>; + /* + * Disable interrupts because ISR never clears 0x0040 + * + * interrupt-parent = <&main_gpio1>; + * interrupts = <70 IRQ_TYPE_LEVEL_LOW>; + */ + /* + * Disable HW Reset because clock signal is daisy-chained + * + * reset-gpios = <&main_gpio0 20 GPIO_ACTIVE_LOW>; + * reset-assert-us = <1>; + * reset-deassert-us = <30>; + */ + }; + + ethernet_phy2: ethernet-phy@f { + compatible = "ethernet-phy-id2000.a0f1"; + reg = <0xf>; + pinctrl-names = "default"; + pinctrl-0 = <ðernet_phy2_default_pins>; + ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>; + /* + * Disable interrupts because ISR never clears 0x0040 + * + * interrupt-parent = <&main_gpio1>; + * interrupts = <70 IRQ_TYPE_LEVEL_LOW>; + */ + /* + * Disable HW Reset because clock signal is daisy-chained + * + * reset-gpios = <&main_gpio0 52 GPIO_ACTIVE_LOW>; + * reset-assert-us = <1>; + * reset-deassert-us = <30>; + */ + }; +}; + +&mailbox0_cluster2 { + status = "okay"; + + mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { + ti,mbox-rx = <0 0 2>; + ti,mbox-tx = <1 0 2>; + }; + + mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { + ti,mbox-rx = <2 0 2>; + ti,mbox-tx = <3 0 2>; + }; +}; + +&mailbox0_cluster4 { + status = "okay"; + + mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { + ti,mbox-rx = <0 0 2>; + ti,mbox-tx = <1 0 2>; + }; + + mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { + ti,mbox-rx = <2 0 2>; + ti,mbox-tx = <3 0 2>; + }; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_default_pins>; + status = "okay"; + + som_eeprom: eeprom@50 { + compatible = "atmel,24c01"; + reg = <0x50>; + pagesize = <8>; + }; +}; + +&main_pmx0 { + /* hog global functions */ + pinctrl-names = "default"; + pinctrl-0 = <ðernet_phy_default_pins>; + + ethernet_phy_default_pins: ethernet-phy-default-pins { + pinctrl-single,pins = < + /* interrupt / power-down, external pull-up on SoM */ + AM64X_IOPAD(0x0278, PIN_INPUT, 7) /* EXTINTn.GPIO1_70 */ + >; + }; + + ethernet_phy0_default_pins: ethernet-phy0-default-pins { + pinctrl-single,pins = < + /* reset */ + AM64X_IOPAD(0x0154, PIN_OUTPUT, 7) /* PRG1_PRU1_GPO19.GPIO0_84 */ + /* reference clock */ + AM64X_IOPAD(0x0274, PIN_OUTPUT, 5) /* EXT_REFCLK1.CLKOUT0 */ + >; + }; + + ethernet_phy1_default_pins: ethernet-phy1-default-pins { + pinctrl-single,pins = < + /* reset */ + AM64X_IOPAD(0x0150, PIN_OUTPUT, 7) /* PRG1_PRU1_GPO18.GPIO0_20 */ + /* led0, external pull-down on SoM */ + AM64X_IOPAD(0x0128, PIN_INPUT, 7) /* PRG1_PRU1_GPO8.GPIO0_73 */ + /* led1/rxer */ + AM64X_IOPAD(0x011c, PIN_INPUT, 7) /* PRG1_PRU1_GPO5.GPIO0_70 */ + >; + }; + + ethernet_phy2_default_pins: ethernet-phy2-default-pins { + pinctrl-single,pins = < + /* reset */ + AM64X_IOPAD(0x00d4, PIN_OUTPUT, 7) /* PRG1_PRU0_GPO7.GPIO0_52 */ + /* led0, external pull-down on SoM */ + AM64X_IOPAD(0x00d8, PIN_INPUT, 7) /* PRG1_PRU0_GPO8.GPIO0_53 */ + /* led1/rxer */ + AM64X_IOPAD(0x00cc, PIN_INPUT, 7) /* PRG1_PRU0_GPO5.GPIO0_50 */ + >; + }; + + main_i2c0_default_pins: main-i2c0-default-pins { + pinctrl-single,pins = < + /* external pull-up on SoM */ + AM64X_IOPAD(0x0260, PIN_INPUT, 0) /* I2C0_SCL.I2C0_SCL */ + AM64X_IOPAD(0x0264, PIN_INPUT, 0) /* I2C0_SDA.I2C0_SDA */ + >; + }; + + /* + * main_mmc0_default_pins: main-mmc0-default-pins + * + * MMC0_CMD: no padconfig + * MMC0_CLK: no padconfig, external pull-up on SoM + * MMC0_DAT0: no padconfig + * MMC0_DAT1: no padconfig + * MMC0_DAT2: no padconfig + * MMC0_DAT3: no padconfig + * MMC0_DAT4: no padconfig + * MMC0_DAT5: no padconfig + * MMC0_DAT6: no padconfig + * MMC0_DAT7: no padconfig + * MMC0_DS: no padconfig, external pull-down on SoM + */ + + main_mmc1_default_pins: main-mmc1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ + AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* MMC1_CLK.MMC1_CLK */ + AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* MMC1_DAT0.MMC1_DAT0 */ + AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* MMC1_DAT1.MMC1_DAT1 */ + AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* MMC1_DAT2.MMC1_DAT2 */ + AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* MMC1_DAT3.MMC1_DAT3 */ + /* external pull-down on SoM & Carrier */ + AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* MMC1_SDCD.MMC1_SDCD */ + AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB: clock loopback */ + >; + }; + + main_uart0_default_pins: main-uart0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* UART0_RXD.UART0_RXD */ + AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* UART0_TXD.UART0_TXD */ + >; + }; + + mdio0_default_pins: mdio0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* PRG0_PRU1_GPO19.MDIO0_MDC */ + AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* PRG0_PRU1_GPO18.MDIO0_MDIO */ + >; + }; + + ospi0_default_pins: ospi0-default-pins { + pinctrl-single,pins = < + /* external pull-down on SoM */ + AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* OSPI0_CLK.OSPI0_CLK */ + AM64X_IOPAD(0x0008, PIN_OUTPUT, 0) /* OSPI0_DQS.OSPI0_DQS */ + /* external pull-up on SoM */ + AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* OSPI0_CSn0.OSPI0_CSn0 */ + AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* OSPI0_D0.OSPI0_D0 */ + AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* OSPI0_D1.OSPI0_D1 */ + AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* OSPI0_D2.OSPI0_D2 */ + AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* OSPI0_D3.OSPI0_D3 */ + AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* OSPI0_D4.OSPI0_D4 */ + AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* OSPI0_D5.OSPI0_D5 */ + AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* OSPI0_D6.OSPI0_D6 */ + AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* OSPI0_D7.OSPI0_D7 */ + >; + }; + + ospi0_flash0_default_pins: ospi0-flash0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0034, PIN_OUTPUT, 7) /* OSPI0_CSn2.GPIO0_13 */ + AM64X_IOPAD(0x0038, PIN_INPUT, 7) /* OSPI0_CSn3.GPIO0_14 */ + >; + }; + + pru1_mdio0_default_pins: pru1-mdio0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x015c, PIN_OUTPUT, 0) /* PRG1_MDIO0_MDC.PRG1_MDIO0_MDC */ + AM64X_IOPAD(0x0158, PIN_INPUT, 0) /* PRG1_MDIO0_MDIO.PRG1_MDIO0_MDIO */ + >; + }; + + pru_rgmii1_default_pins: pru-rgmii1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x00b8, PIN_INPUT, 2) /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */ + AM64X_IOPAD(0x00bc, PIN_INPUT, 2) /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */ + AM64X_IOPAD(0x00c0, PIN_INPUT, 2) /* (W8) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */ + AM64X_IOPAD(0x00c4, PIN_INPUT, 2) /* (V8) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */ + AM64X_IOPAD(0x00d0, PIN_INPUT, 2) /* (AA7) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */ + AM64X_IOPAD(0x00c8, PIN_INPUT, 2) /* (Y8) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */ + AM64X_IOPAD(0x00e4, PIN_OUTPUT, 2) /* (AA8) PRG1_PRU0_GPO11.PRG1_RGMII1_TD0 */ + AM64X_IOPAD(0x00e8, PIN_OUTPUT, 2) /* (U9) PRG1_PRU0_GPO12.PRG1_RGMII1_TD1 */ + AM64X_IOPAD(0x00ec, PIN_OUTPUT, 2) /* (W9) PRG1_PRU0_GPO13.PRG1_RGMII1_TD2 */ + AM64X_IOPAD(0x00f0, PIN_OUTPUT, 2) /* (AA9) PRG1_PRU0_GPO14.PRG1_RGMII1_TD3 */ + AM64X_IOPAD(0x00f8, PIN_INPUT, 2) /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */ + AM64X_IOPAD(0x00f4, PIN_OUTPUT, 2) /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */ + >; + }; + + pru_rgmii2_default_pins: pru-rgmii2-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* PRG1_PRU1_GPO0.RGMII2_RD0 */ + AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* PRG1_PRU1_GPO1.RGMII2_RD1 */ + AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* PRG1_PRU1_GPO2.RGMII2_RD2 */ + AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* PRG1_PRU1_GPO3.RGMII2_RD3 */ + AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* PRG1_PRU1_GPO6.RGMII2_RXC */ + AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* PRG1_PRU1_GPO4.RGMII2_RX_CTL */ + AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* PRG1_PRU1_GPO11.RGMII2_TD0 */ + AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* PRG1_PRU1_GPO12.RGMII2_TD1 */ + AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* PRG1_PRU1_GPO13.RGMII2_TD2 */ + AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* PRG1_PRU1_GPO14.RGMII2_TD3 */ + AM64X_IOPAD(0x0148, PIN_INPUT, 2) /* PRG1_PRU1_GPO16.RGMII2_TXC */ + AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* PRG1_PRU1_GPO15.RGMII2_TX_CTL */ + >; + }; + + rgmii1_default_pins: rgmii1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* PRG0_PRU1_GPO7.RGMII1_RD0 */ + AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* PRG0_PRU1_GPO9.RGMII1_RD1 */ + AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* PRG0_PRU1_GPO10.RGMII1_RD2 */ + AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* PRG0_PRU1_GPO17.RGMII1_RD3 */ + AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* PRG0_PRU0_GPO10.RGMII1_RXC */ + AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* PRG0_PRU0_GPO9.RGMII1_RX_CTL */ + AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* PRG1_PRU1_GPO7.RGMII1_TD0 */ + AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* PRG1_PRU1_GPO9.RGMII1_TD1 */ + AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* PRG1_PRU1_GPO10.RGMII1_TD2 */ + AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* PRG1_PRU1_GPO17.RGMII1_TD3 */ + AM64X_IOPAD(0x00e0, PIN_INPUT, 4) /* PRG1_PRU0_GPO10.RGMII1_TXC */ + AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* PRG1_PRU0_GPO9.RGMII1_TX_CTL */ + >; + }; + + usb0_default_pins: usb0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* USB0_DRVVBUS.USB0_DRVVBUS */ + >; + }; +}; + +&main_r5fss0_core0 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; + memory-region = <&main_r5fss0_core0_dma_memory_region>, + <&main_r5fss0_core0_memory_region>; +}; + +&main_r5fss0_core1 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; + memory-region = <&main_r5fss0_core1_dma_memory_region>, + <&main_r5fss0_core1_memory_region>; +}; + +&main_r5fss1_core0 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; + memory-region = <&main_r5fss1_core0_dma_memory_region>, + <&main_r5fss1_core0_memory_region>; +}; + +&main_r5fss1_core1 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; + memory-region = <&main_r5fss1_core1_dma_memory_region>, + <&main_r5fss1_core1_memory_region>; +}; + +/* SoC default UART console */ +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_default_pins>; + status = "okay"; +}; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&ospi0_default_pins>; + num-cs = <1>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&ospi0_flash0_default_pins>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <200000000>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + cdns,read-delay = <0>; + interrupt-parent = <&main_gpio0>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&main_gpio0 13 GPIO_ACTIVE_LOW>; + }; +}; + +&sdhci0 { + /* mmc0 pins have no padconfig */ + bus-width = <8>; + ti,driver-strength-ohm = <50>; + disable-wp; + non-removable; + cap-mmc-hw-reset; + no-sd; + /* + * MMC controller supports switching between 1.8V and 3.3V signalling. + * However MMC0 (unlike MMC1) does not integrate an LDO. + * Explicitly link a regulator node for indicating to the driver which + * voltages are actually usable. + */ + vqmmc-supply = <&vdd_mmc0>; + status = "okay"; +}; + +/* + * microSD is on carrier - however since SoC can boot from it, + * configure it just in case. + */ +&sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_default_pins>; + bus-width = <4>; + ti,driver-strength-ohm = <50>; + disable-wp; + status = "okay"; +}; + +/* + * USB settings are a carrier choice - however since SoC can boot from it, + * configure as USB-2.0 OTG here, keeping USB-3 serdes disabled. + */ +&usb0 { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_default_pins>; + dr_mode = "otg"; + maximum-speed = "high-speed"; +}; + +&usbss0 { + ti,vbus-divider; + ti,usb2-only; +}; -- 2.35.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-02-19 15:02 [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Josua Mayer ` (2 preceding siblings ...) 2024-02-19 15:03 ` [PATCH v7 3/4] arm64: dts: add description for solidrun am642 som and evaluation board Josua Mayer @ 2024-02-19 15:03 ` Josua Mayer 2024-10-25 13:57 ` Geert Uytterhoeven 2024-02-27 14:09 ` (subset) [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Vignesh Raghavendra 4 siblings, 1 reply; 15+ messages in thread From: Josua Mayer @ 2024-02-19 15:03 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Yazan Shhady, linux-arm-kernel, devicetree, linux-kernel, Josua Mayer HummingBoard-T features two M.2 connectors labeled "M1" and "M2". The single SerDes lane of the SoC can be routed to either M1 pci-e signals, or M2 usb-3 signals by a gpio-controlled mux. Add overlays for each configuration. Signed-off-by: Josua Mayer <josua@solid-run.com> --- arch/arm64/boot/dts/ti/Makefile | 6 +++ .../boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso | 45 ++++++++++++++++++++++ .../boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso | 44 +++++++++++++++++++++ 3 files changed, 95 insertions(+) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index bd73ce06acba..cd12720638c7 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -37,8 +37,14 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-csi2-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-hdmi-audio.dtbo # Boards with AM64x SoC +k3-am642-hummingboard-t-pcie-dtbs := \ + k3-am642-hummingboard-t.dtb k3-am642-hummingboard-t-pcie.dtbo +k3-am642-hummingboard-t-usb3-dtbs := \ + k3-am642-hummingboard-t.dtb k3-am642-hummingboard-t-usb3.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-pcie.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-usb3.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso new file mode 100644 index 000000000000..bd9a5caf20da --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> + * + * Overlay for SolidRun AM642 HummingBoard-T to enable PCI-E. + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy.h> + +#include "k3-serdes.h" + +&pcie0_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_default_pins>; + reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_link>; + phy-names = "pcie-phy"; + num-lanes = <1>; + status = "okay"; +}; + +&serdes0 { + #address-cells = <1>; + #size-cells = <0>; + + serdes0_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_PCIE>; + #phy-cells = <0>; + resets = <&serdes_wiz0 1>; + }; +}; + +&serdes_ln_ctrl { + idle-states = <AM64_SERDES0_LANE0_PCIE0>; +}; + +&serdes_mux { + idle-state = <1>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso new file mode 100644 index 000000000000..ffcc3bd3c7bc --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> + * + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/phy/phy.h> + +#include "k3-serdes.h" + +&serdes0 { + #address-cells = <1>; + #size-cells = <0>; + + serdes0_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_USB3>; + #phy-cells = <0>; + resets = <&serdes_wiz0 1>; + }; +}; + +&serdes_ln_ctrl { + idle-states = <AM64_SERDES0_LANE0_USB>; +}; + +&serdes_mux { + idle-state = <0>; +}; + +&usbss0 { + /delete-property/ ti,usb2-only; +}; + +&usb0 { + maximum-speed = "super-speed"; + phys = <&serdes0_link>; + phy-names = "cdns3,usb3-phy"; +}; -- 2.35.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-02-19 15:03 ` [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 Josua Mayer @ 2024-10-25 13:57 ` Geert Uytterhoeven 2024-10-28 15:31 ` Vignesh Raghavendra 0 siblings, 1 reply; 15+ messages in thread From: Geert Uytterhoeven @ 2024-10-25 13:57 UTC (permalink / raw) To: Josua Mayer Cc: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel, devicetree, linux-kernel Hi Josua, On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: > HummingBoard-T features two M.2 connectors labeled "M1" and "M2". > The single SerDes lane of the SoC can be routed to either M1 pci-e > signals, or M2 usb-3 signals by a gpio-controlled mux. > > Add overlays for each configuration. > > Signed-off-by: Josua Mayer <josua@solid-run.com> Thanks for your patch, which is now commit bbef42084cc170cb ("arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3") in v6.9. > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso > @@ -0,0 +1,44 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> > + * > + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/phy/phy.h> > + > +#include "k3-serdes.h" > + > +&serdes0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + serdes0_link: phy@0 { > + reg = <0>; > + cdns,num-lanes = <1>; > + cdns,phy-type = <PHY_TYPE_USB3>; > + #phy-cells = <0>; > + resets = <&serdes_wiz0 1>; > + }; > +}; > + > +&serdes_ln_ctrl { > + idle-states = <AM64_SERDES0_LANE0_USB>; > +}; > + > +&serdes_mux { > + idle-state = <0>; > +}; > + > +&usbss0 { > + /delete-property/ ti,usb2-only; /delete-property/ (and /delete-node/) to delete something in the base DTS does not work. > +}; > + > +&usb0 { > + maximum-speed = "super-speed"; > + phys = <&serdes0_link>; > + phy-names = "cdns3,usb3-phy"; > +}; You can run dtx_diff --color arch/arm64/boot/dts/ti/k3-am642-hummingboard-t{,-usb3}.dtb to verify. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-10-25 13:57 ` Geert Uytterhoeven @ 2024-10-28 15:31 ` Vignesh Raghavendra 2024-10-28 17:19 ` Josua Mayer 0 siblings, 1 reply; 15+ messages in thread From: Vignesh Raghavendra @ 2024-10-28 15:31 UTC (permalink / raw) To: Geert Uytterhoeven, Josua Mayer Cc: Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel, devicetree, linux-kernel On 25/10/24 19:27, Geert Uytterhoeven wrote: > Hi Josua, > > On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: >> HummingBoard-T features two M.2 connectors labeled "M1" and "M2". >> The single SerDes lane of the SoC can be routed to either M1 pci-e >> signals, or M2 usb-3 signals by a gpio-controlled mux. >> >> Add overlays for each configuration. >> >> Signed-off-by: Josua Mayer <josua@solid-run.com> > > Thanks for your patch, which is now commit bbef42084cc170cb ("arm64: > dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3") in v6.9. > >> --- /dev/null >> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso >> @@ -0,0 +1,44 @@ >> +// SPDX-License-Identifier: GPL-2.0+ >> +/* >> + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> >> + * >> + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. >> + */ >> + >> +/dts-v1/; >> +/plugin/; >> + >> +#include <dt-bindings/phy/phy.h> >> + >> +#include "k3-serdes.h" >> + >> +&serdes0 { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + serdes0_link: phy@0 { >> + reg = <0>; >> + cdns,num-lanes = <1>; >> + cdns,phy-type = <PHY_TYPE_USB3>; >> + #phy-cells = <0>; >> + resets = <&serdes_wiz0 1>; >> + }; >> +}; >> + >> +&serdes_ln_ctrl { >> + idle-states = <AM64_SERDES0_LANE0_USB>; >> +}; >> + >> +&serdes_mux { >> + idle-state = <0>; >> +}; >> + >> +&usbss0 { >> + /delete-property/ ti,usb2-only; > > /delete-property/ (and /delete-node/) to delete something in the base DTS > does not work. Geert, Thanks for the catching Joshua, This overlay is pretty useless in light of above issue. I intend to just drop this file unless you convince me otherwise? -- Regards Vignesh ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-10-28 15:31 ` Vignesh Raghavendra @ 2024-10-28 17:19 ` Josua Mayer 2024-10-28 17:57 ` Geert Uytterhoeven 2024-10-28 18:44 ` Vignesh Raghavendra 0 siblings, 2 replies; 15+ messages in thread From: Josua Mayer @ 2024-10-28 17:19 UTC (permalink / raw) To: Vignesh Raghavendra, Geert Uytterhoeven Cc: Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Hi Geert, Vignesh, Am 28.10.24 um 16:31 schrieb Vignesh Raghavendra: > > On 25/10/24 19:27, Geert Uytterhoeven wrote: >> Hi Josua, >> >> On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: >>> HummingBoard-T features two M.2 connectors labeled "M1" and "M2". >>> The single SerDes lane of the SoC can be routed to either M1 pci-e >>> signals, or M2 usb-3 signals by a gpio-controlled mux. >>> >>> Add overlays for each configuration. >>> >>> Signed-off-by: Josua Mayer <josua@solid-run.com> >> Thanks for your patch, which is now commit bbef42084cc170cb ("arm64: >> dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3") in v6.9. >> >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso >>> @@ -0,0 +1,44 @@ >>> +// SPDX-License-Identifier: GPL-2.0+ >>> +/* >>> + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> >>> + * >>> + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. >>> + */ >>> + >>> +/dts-v1/; >>> +/plugin/; >>> + >>> +#include <dt-bindings/phy/phy.h> >>> + >>> +#include "k3-serdes.h" >>> + >>> +&serdes0 { >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + serdes0_link: phy@0 { >>> + reg = <0>; >>> + cdns,num-lanes = <1>; >>> + cdns,phy-type = <PHY_TYPE_USB3>; >>> + #phy-cells = <0>; >>> + resets = <&serdes_wiz0 1>; >>> + }; >>> +}; >>> + >>> +&serdes_ln_ctrl { >>> + idle-states = <AM64_SERDES0_LANE0_USB>; >>> +}; >>> + >>> +&serdes_mux { >>> + idle-state = <0>; >>> +}; >>> + >>> +&usbss0 { >>> + /delete-property/ ti,usb2-only; >> /delete-property/ (and /delete-node/) to delete something in the base DTS >> does not work. My understanding is that flags are equivalent to boolean, i.e: ti,usb2-only = <true>; ti,usb2-only; are equivalent. If so, can we assign <false> within the overlay? > Geert, > > Thanks for the catching Excellent spotting indeed. I noticed this in passing about a week ago when I requested Debian enable the necessary drivers in their distro kernel (without understanding the root cause). > > Joshua, > > This overlay is pretty useless in light of above issue. I intend to > just drop this file unless you convince me otherwise? > I would really prefer to fix it, or somehow replace with equivalent functionality. My original proposal was having the board a dtsi, and the pci and usb3 variants as standalone dts. ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-10-28 17:19 ` Josua Mayer @ 2024-10-28 17:57 ` Geert Uytterhoeven 2024-10-28 18:44 ` Vignesh Raghavendra 1 sibling, 0 replies; 15+ messages in thread From: Geert Uytterhoeven @ 2024-10-28 17:57 UTC (permalink / raw) To: Josua Mayer Cc: Vignesh Raghavendra, Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Hi Josua, On Mon, Oct 28, 2024 at 6:19 PM Josua Mayer <josua@solid-run.com> wrote: > Am 28.10.24 um 16:31 schrieb Vignesh Raghavendra: > > On 25/10/24 19:27, Geert Uytterhoeven wrote: > >> On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: > >>> HummingBoard-T features two M.2 connectors labeled "M1" and "M2". > >>> The single SerDes lane of the SoC can be routed to either M1 pci-e > >>> signals, or M2 usb-3 signals by a gpio-controlled mux. > >>> > >>> Add overlays for each configuration. > >>> > >>> Signed-off-by: Josua Mayer <josua@solid-run.com> > >> Thanks for your patch, which is now commit bbef42084cc170cb ("arm64: > >> dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3") in v6.9. > >> > >>> --- /dev/null > >>> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso > >>> @@ -0,0 +1,44 @@ > >>> +// SPDX-License-Identifier: GPL-2.0+ > >>> +/* > >>> + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> > >>> + * > >>> + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. > >>> + */ > >>> + > >>> +/dts-v1/; > >>> +/plugin/; > >>> + > >>> +#include <dt-bindings/phy/phy.h> > >>> + > >>> +#include "k3-serdes.h" > >>> + > >>> +&serdes0 { > >>> + #address-cells = <1>; > >>> + #size-cells = <0>; > >>> + > >>> + serdes0_link: phy@0 { > >>> + reg = <0>; > >>> + cdns,num-lanes = <1>; > >>> + cdns,phy-type = <PHY_TYPE_USB3>; > >>> + #phy-cells = <0>; > >>> + resets = <&serdes_wiz0 1>; > >>> + }; > >>> +}; > >>> + > >>> +&serdes_ln_ctrl { > >>> + idle-states = <AM64_SERDES0_LANE0_USB>; > >>> +}; > >>> + > >>> +&serdes_mux { > >>> + idle-state = <0>; > >>> +}; > >>> + > >>> +&usbss0 { > >>> + /delete-property/ ti,usb2-only; > >> /delete-property/ (and /delete-node/) to delete something in the base DTS > >> does not work. > > My understanding is that flags are equivalent to boolean, i.e: > > ti,usb2-only = <true>; > ti,usb2-only; > > are equivalent. > > If so, can we assign <false> within the overlay? Unfortunately not. My first thought was "it depends on the actual code in the driver", but that turns out to be wrong: static inline bool of_property_read_bool(const struct device_node *np, const char *propname) { const struct property *prop = of_find_property(np, propname, NULL); return prop ? true : false; } static inline bool of_property_present(const struct device_node *np, const char *propname) { return of_property_read_bool(np, propname); } So both methods just check if the property is present, and do not use its value, when present (i.e. the former does not "read" the bool). drivers/usb/cdns3/cdns3-ti.c uses device_property_read_bool: static inline bool device_property_read_bool(const struct device *dev, const char *propname) { return device_property_present(dev, propname); } so (at least for DT) that should map to the above. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-10-28 17:19 ` Josua Mayer 2024-10-28 17:57 ` Geert Uytterhoeven @ 2024-10-28 18:44 ` Vignesh Raghavendra 2024-10-30 12:18 ` Josua Mayer 1 sibling, 1 reply; 15+ messages in thread From: Vignesh Raghavendra @ 2024-10-28 18:44 UTC (permalink / raw) To: Josua Mayer, Geert Uytterhoeven Cc: Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org On 28/10/24 22:49, Josua Mayer wrote: > Hi Geert, Vignesh, > > Am 28.10.24 um 16:31 schrieb Vignesh Raghavendra: >> >> On 25/10/24 19:27, Geert Uytterhoeven wrote: >>> Hi Josua, >>> >>> On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: >>>> HummingBoard-T features two M.2 connectors labeled "M1" and "M2". >>>> The single SerDes lane of the SoC can be routed to either M1 pci-e >>>> signals, or M2 usb-3 signals by a gpio-controlled mux. >>>> >>>> Add overlays for each configuration. >>>> >>>> Signed-off-by: Josua Mayer <josua@solid-run.com> >>> Thanks for your patch, which is now commit bbef42084cc170cb ("arm64: >>> dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3") in v6.9. >>> >>>> --- /dev/null >>>> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso >>>> @@ -0,0 +1,44 @@ >>>> +// SPDX-License-Identifier: GPL-2.0+ >>>> +/* >>>> + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> >>>> + * >>>> + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. >>>> + */ >>>> + >>>> +/dts-v1/; >>>> +/plugin/; >>>> + >>>> +#include <dt-bindings/phy/phy.h> >>>> + >>>> +#include "k3-serdes.h" >>>> + >>>> +&serdes0 { >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>>> + >>>> + serdes0_link: phy@0 { >>>> + reg = <0>; >>>> + cdns,num-lanes = <1>; >>>> + cdns,phy-type = <PHY_TYPE_USB3>; >>>> + #phy-cells = <0>; >>>> + resets = <&serdes_wiz0 1>; >>>> + }; >>>> +}; >>>> + >>>> +&serdes_ln_ctrl { >>>> + idle-states = <AM64_SERDES0_LANE0_USB>; >>>> +}; >>>> + >>>> +&serdes_mux { >>>> + idle-state = <0>; >>>> +}; >>>> + >>>> +&usbss0 { >>>> + /delete-property/ ti,usb2-only; >>> /delete-property/ (and /delete-node/) to delete something in the base DTS >>> does not work. > > My understanding is that flags are equivalent to boolean, i.e: > > ti,usb2-only = <true>; > ti,usb2-only; > > are equivalent. > > If so, can we assign <false> within the overlay? > >> Geert, >> >> Thanks for the catching > Excellent spotting indeed. > I noticed this in passing about a week ago when I requested > Debian enable the necessary drivers in their distro kernel > (without understanding the root cause). >> >> Joshua, >> >> This overlay is pretty useless in light of above issue. I intend to >> just drop this file unless you convince me otherwise? >> > I would really prefer to fix it, or somehow replace with equivalent functionality. > > My original proposal was having the board a dtsi, and the pci and usb3 > variants as standalone dts. > Yeah, you would need a separate board dts for this profile. Please propose a patch -- Regards Vignesh ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-10-28 18:44 ` Vignesh Raghavendra @ 2024-10-30 12:18 ` Josua Mayer 2024-11-04 15:56 ` Geert Uytterhoeven 0 siblings, 1 reply; 15+ messages in thread From: Josua Mayer @ 2024-10-30 12:18 UTC (permalink / raw) To: Vignesh Raghavendra, Geert Uytterhoeven Cc: Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Am 28.10.24 um 19:44 schrieb Vignesh Raghavendra: > > On 28/10/24 22:49, Josua Mayer wrote: >> Hi Geert, Vignesh, >> >> Am 28.10.24 um 16:31 schrieb Vignesh Raghavendra: >>> On 25/10/24 19:27, Geert Uytterhoeven wrote: >>>> Hi Josua, >>>> >>>> On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: >>>>> HummingBoard-T features two M.2 connectors labeled "M1" and "M2". >>>>> The single SerDes lane of the SoC can be routed to either M1 pci-e >>>>> signals, or M2 usb-3 signals by a gpio-controlled mux. >>>>> >>>>> Add overlays for each configuration. >>>>> >>>>> Signed-off-by: Josua Mayer <josua@solid-run.com> >>>> Thanks for your patch, which is now commit bbef42084cc170cb ("arm64: >>>> dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3") in v6.9. >>>> >>>>> --- /dev/null >>>>> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso >>>>> @@ -0,0 +1,44 @@ >>>>> +// SPDX-License-Identifier: GPL-2.0+ >>>>> +/* >>>>> + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> >>>>> + * >>>>> + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. >>>>> + */ >>>>> + >>>>> +/dts-v1/; >>>>> +/plugin/; >>>>> + >>>>> +#include <dt-bindings/phy/phy.h> >>>>> + >>>>> +#include "k3-serdes.h" >>>>> + >>>>> +&serdes0 { >>>>> + #address-cells = <1>; >>>>> + #size-cells = <0>; >>>>> + >>>>> + serdes0_link: phy@0 { >>>>> + reg = <0>; >>>>> + cdns,num-lanes = <1>; >>>>> + cdns,phy-type = <PHY_TYPE_USB3>; >>>>> + #phy-cells = <0>; >>>>> + resets = <&serdes_wiz0 1>; >>>>> + }; >>>>> +}; >>>>> + >>>>> +&serdes_ln_ctrl { >>>>> + idle-states = <AM64_SERDES0_LANE0_USB>; >>>>> +}; >>>>> + >>>>> +&serdes_mux { >>>>> + idle-state = <0>; >>>>> +}; >>>>> + >>>>> +&usbss0 { >>>>> + /delete-property/ ti,usb2-only; >>>> /delete-property/ (and /delete-node/) to delete something in the base DTS >>>> does not work. >> My understanding is that flags are equivalent to boolean, i.e: >> >> ti,usb2-only = <true>; >> ti,usb2-only; >> >> are equivalent. >> >> If so, can we assign <false> within the overlay? >> >>> Geert, >>> >>> Thanks for the catching >> Excellent spotting indeed. >> I noticed this in passing about a week ago when I requested >> Debian enable the necessary drivers in their distro kernel >> (without understanding the root cause). >>> Joshua, >>> >>> This overlay is pretty useless in light of above issue. I intend to >>> just drop this file unless you convince me otherwise? >>> >> I would really prefer to fix it, or somehow replace with equivalent functionality. >> >> My original proposal was having the board a dtsi, and the pci and usb3 >> variants as standalone dts. >> > > Yeah, you would need a separate board dts for this profile. Please > propose a patch Is there any chance of reassigning <false> and making an argument that this should be fixed? I find it frustrating that overlays can't override boolean properties, and for consistency reasons I would otherwise change both pcie and usb3 overlays to standalone dts. ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-10-30 12:18 ` Josua Mayer @ 2024-11-04 15:56 ` Geert Uytterhoeven 2024-11-12 5:03 ` Josua Mayer 0 siblings, 1 reply; 15+ messages in thread From: Geert Uytterhoeven @ 2024-11-04 15:56 UTC (permalink / raw) To: Josua Mayer Cc: Vignesh Raghavendra, Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Hi Josua, On Wed, Oct 30, 2024 at 1:18 PM Josua Mayer <josua@solid-run.com> wrote: > Am 28.10.24 um 19:44 schrieb Vignesh Raghavendra: > > On 28/10/24 22:49, Josua Mayer wrote: > >> Am 28.10.24 um 16:31 schrieb Vignesh Raghavendra: > >>> On 25/10/24 19:27, Geert Uytterhoeven wrote: > >>>> On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: > >>>>> HummingBoard-T features two M.2 connectors labeled "M1" and "M2". > >>>>> The single SerDes lane of the SoC can be routed to either M1 pci-e > >>>>> signals, or M2 usb-3 signals by a gpio-controlled mux. > >>>>> > >>>>> Add overlays for each configuration. > >>>>> > >>>>> Signed-off-by: Josua Mayer <josua@solid-run.com> > >>>>> --- /dev/null > >>>>> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso > >>>>> +&usbss0 { > >>>>> + /delete-property/ ti,usb2-only; > >>>> /delete-property/ (and /delete-node/) to delete something in the base DTS > >>>> does not work. > >> My understanding is that flags are equivalent to boolean, i.e: > >> > >> ti,usb2-only = <true>; > >> ti,usb2-only; > >> > >> are equivalent. > >> > >> If so, can we assign <false> within the overlay? > Is there any chance of reassigning <false> and making an argument > that this should be fixed? In theory, it can be done, if (1) all code that checks boolean properties would use of_property_read_bool() instead of of_property_present(), and (2) of_property_read_bool() would be changed to actually read the boolean value instead of just checking for the presence of the property. And of course we have to do that in all software that uses DT (i.e. not just Linux). See [1][2][3] below for caveats. Using a similar solution for /delete-node/ is more complex, but still feasible, by setting its "status" property to "disabled" . I think that can be made to work if all DT core code that looks up nodes would just ignore any node that has a disabled status. I.e. callers would no longer see disabled nodes at all. > I find it frustrating that overlays can't override boolean properties, > and for consistency reasons I would otherwise change both > pcie and usb3 overlays to standalone dts. OK. [1] The example in Documentation/devicetree/bindings/sound/rt5651.txt has: realtek,dmic-en = "true"; realtek,in2-diff = "false"; Obviously the second line doesn't really work with the current code, but fortunately there are no actual users of that (in upstream DTS). Note: "realtek,in2-diff" is a typo for "realtek,in2-differential". [2] The example in Documentation/devicetree/bindings/sound/pcm3060.txt has: ti,out-single-ended = "true"; Again, this is an open invitation for replacing "true" by "false". Fortunately there are no such users (in upstream DTS). [3] arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi has: gpmc,device-nand = "true"; But "gpmc,device-nand" does not exist. Oh, it is under removal: https://lore.kernel.org/all/20241009-gpmc-omap-dtbx-v2-2-fc68124a090a@kernel.org/ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 2024-11-04 15:56 ` Geert Uytterhoeven @ 2024-11-12 5:03 ` Josua Mayer 0 siblings, 0 replies; 15+ messages in thread From: Josua Mayer @ 2024-11-12 5:03 UTC (permalink / raw) To: Geert Uytterhoeven Cc: Vignesh Raghavendra, Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yazan Shhady, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Hi Geert, Am 04.11.24 um 17:56 schrieb Geert Uytterhoeven: > Hi Josua, > > On Wed, Oct 30, 2024 at 1:18 PM Josua Mayer <josua@solid-run.com> wrote: >> Am 28.10.24 um 19:44 schrieb Vignesh Raghavendra: >>> On 28/10/24 22:49, Josua Mayer wrote: >>>> Am 28.10.24 um 16:31 schrieb Vignesh Raghavendra: >>>>> On 25/10/24 19:27, Geert Uytterhoeven wrote: >>>>>> On Mon, Feb 19, 2024 at 4:05 PM Josua Mayer <josua@solid-run.com> wrote: >>>>>>> HummingBoard-T features two M.2 connectors labeled "M1" and "M2". >>>>>>> The single SerDes lane of the SoC can be routed to either M1 pci-e >>>>>>> signals, or M2 usb-3 signals by a gpio-controlled mux. >>>>>>> >>>>>>> Add overlays for each configuration. >>>>>>> >>>>>>> Signed-off-by: Josua Mayer <josua@solid-run.com> >>>>>>> --- /dev/null >>>>>>> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso >>>>>>> +&usbss0 { >>>>>>> + /delete-property/ ti,usb2-only; >>>>>> /delete-property/ (and /delete-node/) to delete something in the base DTS >>>>>> does not work. >>>> My understanding is that flags are equivalent to boolean, i.e: >>>> >>>> ti,usb2-only = <true>; >>>> ti,usb2-only; >>>> >>>> are equivalent. >>>> >>>> If so, can we assign <false> within the overlay? >> Is there any chance of reassigning <false> and making an argument >> that this should be fixed? > In theory, it can be done, if (1) all code that checks boolean > properties would use of_property_read_bool() instead of > of_property_present(), and (2) of_property_read_bool() would be changed > to actually read the boolean value instead of just checking for the > presence of the property. And of course we have to do that in all > software that uses DT (i.e. not just Linux). > See [1][2][3] below for caveats. Thank you for all those pointers! > > Using a similar solution for /delete-node/ is more complex, but still > feasible, by setting its "status" property to "disabled" . I think > that can be made to work if all DT core code that looks up nodes would > just ignore any node that has a disabled status. Agreed! > I.e. callers would > no longer see disabled nodes at all. > >> I find it frustrating that overlays can't override boolean properties, >> and for consistency reasons I would otherwise change both >> pcie and usb3 overlays to standalone dts. > OK. Setting a property = "false" would be quite preferential in my opinion, over dropping the overlays. Unfortunately I am preoccupied, and can't submit tested patches within current merge window. I will draft a minimal untested patch, and submit it to the list, to get some comments. For next window I could prepare a tested version. > > [1] The example in Documentation/devicetree/bindings/sound/rt5651.txt has: > > realtek,dmic-en = "true"; > realtek,in2-diff = "false"; > > Obviously the second line doesn't really work with the current > code, but fortunately there are no actual users of that (in > upstream DTS). > Note: "realtek,in2-diff" is a typo for "realtek,in2-differential". > > [2] The example in Documentation/devicetree/bindings/sound/pcm3060.txt has: > > ti,out-single-ended = "true"; > > Again, this is an open invitation for replacing "true" by "false". > Fortunately there are no such users (in upstream DTS). > > [3] arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi has: > > gpmc,device-nand = "true"; > > But "gpmc,device-nand" does not exist. Oh, it is under removal: > https://lore.kernel.org/all/20241009-gpmc-omap-dtbx-v2-2-fc68124a090a@kernel.org/ > > > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: (subset) [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb 2024-02-19 15:02 [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Josua Mayer ` (3 preceding siblings ...) 2024-02-19 15:03 ` [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 Josua Mayer @ 2024-02-27 14:09 ` Vignesh Raghavendra 4 siblings, 0 replies; 15+ messages in thread From: Vignesh Raghavendra @ 2024-02-27 14:09 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Josua Mayer Cc: devicetree, Grygorii Strashko, Vignesh Raghavendra, linux-kernel, MD Danish Anwar, Krzysztof Kozlowski, Yazan Shhady, linux-arm-kernel Hi Josua Mayer, On Mon, 19 Feb 2024 16:02:59 +0100, Josua Mayer wrote: > This series adds DT bindings and dts descriptions for SolidRun AM642 > based SoM and Hummingboard EVB. > > Additionally a commit from downstream vendor kernel are included, > enhancing support for pru based ethernet. > I wasn't sure how to properly annotate it in commit description / > signed-off area ...: > > [...] I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/4] dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T commit: d14bae4087c5abf5bd2d56c0cc3c9e849ad2ae44 [3/4] arm64: dts: add description for solidrun am642 som and evaluation board commit: d60483faf914b4d404a9732476278ac13bb33b70 [4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 commit: bbef42084cc170cbfc035bf784f2ff055c939d7e All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git -- Vignesh _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2024-11-12 5:06 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-02-19 15:02 [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Josua Mayer 2024-02-19 15:03 ` [PATCH v7 1/4] dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T Josua Mayer 2024-02-19 15:03 ` [PATCH v7 2/4] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes Josua Mayer 2024-02-27 14:12 ` Vignesh Raghavendra 2024-02-19 15:03 ` [PATCH v7 3/4] arm64: dts: add description for solidrun am642 som and evaluation board Josua Mayer 2024-02-19 15:03 ` [PATCH v7 4/4] arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 Josua Mayer 2024-10-25 13:57 ` Geert Uytterhoeven 2024-10-28 15:31 ` Vignesh Raghavendra 2024-10-28 17:19 ` Josua Mayer 2024-10-28 17:57 ` Geert Uytterhoeven 2024-10-28 18:44 ` Vignesh Raghavendra 2024-10-30 12:18 ` Josua Mayer 2024-11-04 15:56 ` Geert Uytterhoeven 2024-11-12 5:03 ` Josua Mayer 2024-02-27 14:09 ` (subset) [PATCH v7 0/4] arm64: dts: add description for solidrun am642 som and hummingboard evb Vignesh Raghavendra
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