All of lore.kernel.org
 help / color / mirror / Atom feed
From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Roger Pau Monne <roger.pau@citrix.com>, xen-devel@lists.xenproject.org
Cc: Jan Beulich <jbeulich@suse.com>
Subject: Re: [PATCH 9/9] xen/x86: track dirty pCPU caches for a given vCPU
Date: Tue, 6 May 2025 12:16:00 +0100	[thread overview]
Message-ID: <cecf40ed-9cf2-4e86-aa82-e0c33643868d@citrix.com> (raw)
In-Reply-To: <20250506083148.34963-10-roger.pau@citrix.com>

On 06/05/2025 9:31 am, Roger Pau Monne wrote:
> When a guest is allowed access to cache control operations such tracking
> prevents having to issue a system-wide cache flush, and rather just flush
> the pCPUs where the vCPU has been scheduled since the last flush.
>
> Note that domain-wide flushes accumulate the dirty caches from all the
> vCPUs, but clearing the vCPU masks will require pausing all vCPUs, which
> seems overkill.  Instead leave the vCPU dirty masks as-is, worse case it
> will result in redundant flushes in further calls.
>
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>

I'm afraid this doesn't work.

Unlike TLBs, dirty cacheline can move sideways, e.g. by foreign or grant
mapping, but also naturally because of how cache coherency works.

We need to use the guarantees given to us by the architecture to simply
nop out cache flushes when safe to do so.

Everything else is either a shootdown (clflush/opt/clwb, and doesn't
even trap to Xen), or needs to be a global WB{NO,}INVD.  Partial WBINVDs
are of no value.

~Andrew


  reply	other threads:[~2025-05-06 11:16 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06  8:31 [PATCH 0/8] xen: cache control improvements Roger Pau Monne
2025-05-06  8:31 ` [PATCH 1/9] x86/pv: fix MMUEXT_FLUSH_CACHE to flush all pCPU caches Roger Pau Monne
2025-05-12 14:09   ` Jan Beulich
2025-05-12 14:27     ` Roger Pau Monné
2025-05-12 14:11   ` Jan Beulich
2025-05-12 14:24     ` Roger Pau Monné
2025-05-06  8:31 ` [PATCH 2/9] x86/pv: fix emulation of wb{,no}invd " Roger Pau Monne
2025-05-12 14:20   ` Jan Beulich
2025-05-12 14:41     ` Roger Pau Monné
2025-05-06  8:31 ` [PATCH 3/9] xen/gnttab: limit cache flush operation to guests allowed cache control Roger Pau Monne
2025-05-06 10:15   ` Julien Grall
2025-05-06 10:40     ` Roger Pau Monné
2025-05-12 14:23       ` Jan Beulich
2025-05-06  8:31 ` [PATCH 4/9] x86/gnttab: do not implement GNTTABOP_cache_flush Roger Pau Monne
2025-05-12 14:27   ` Jan Beulich
2025-05-06  8:31 ` [PATCH 5/9] x86/mtrr: use memory_type_changed() in hvm_set_mem_pinned_cacheattr() Roger Pau Monne
2025-05-12 15:04   ` Jan Beulich
2025-05-15 10:22     ` Roger Pau Monné
2025-05-16  7:00       ` Jan Beulich
2025-05-16  7:57         ` Roger Pau Monné
2025-05-16  6:58   ` Jan Beulich
2025-05-16  7:48     ` Roger Pau Monné
2025-05-16  8:02       ` Jan Beulich
2025-05-16  8:45         ` Roger Pau Monné
2025-05-06  8:31 ` [PATCH 6/9] x86/p2m: limit cache flush in memory_type_changed() Roger Pau Monne
2025-05-12 15:10   ` Jan Beulich
2025-05-06  8:31 ` [PATCH 7/9] xen/x86: rename cache_flush_permitted() to has_arch_io_resources() Roger Pau Monne
2025-05-12 15:16   ` Jan Beulich
2025-05-15 10:28     ` Roger Pau Monné
2025-05-16  7:07       ` Jan Beulich
2025-05-16  8:02         ` Roger Pau Monné
2025-05-16  8:08           ` Jan Beulich
2025-05-16  8:27             ` Roger Pau Monné
2025-05-16  8:36               ` Jan Beulich
2025-05-16  8:55                 ` Roger Pau Monné
2025-05-06  8:31 ` [PATCH 8/9] xen: introduce flag when a domain requires cache control Roger Pau Monne
2025-05-06 10:20   ` Julien Grall
2025-05-06 10:43     ` Roger Pau Monné
2025-05-12 15:24   ` Jan Beulich
2025-05-15 10:44     ` Roger Pau Monné
2025-05-16  7:16       ` Jan Beulich
2025-05-16  8:05         ` Roger Pau Monné
2025-05-06  8:31 ` [PATCH 9/9] xen/x86: track dirty pCPU caches for a given vCPU Roger Pau Monne
2025-05-06 11:16   ` Andrew Cooper [this message]
2025-05-06 12:55     ` Roger Pau Monné
2025-05-12 15:38       ` Jan Beulich
2025-05-15 10:52         ` Roger Pau Monné
2025-05-16  7:25           ` Jan Beulich
2025-05-12 15:33   ` Jan Beulich
2025-05-06  9:32 ` [PATCH 0/8] xen: cache control improvements Christian Lindig

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=cecf40ed-9cf2-4e86-aa82-e0c33643868d@citrix.com \
    --to=andrew.cooper3@citrix.com \
    --cc=jbeulich@suse.com \
    --cc=roger.pau@citrix.com \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.