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From: Paul Walmsley <pjw@kernel.org>
To: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	 pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	alex@ghiti.fr,  shuah@kernel.org
Subject: Re: [PATCH v4 0/2] riscv: Introduce support for hardware break/watchpoints
Date: Wed, 15 Jul 2026 10:21:09 -0600 (MDT)	[thread overview]
Message-ID: <cf01ccc8-e171-e397-f6e2-a7c05a37022b@kernel.org> (raw)
In-Reply-To: <20260518065920.872131-1-himanshu.chauhan@oss.qualcomm.com>

Hi,

On Mon, 18 May 2026, Himanshu Chauhan wrote:

> This patchset adds support of hardware breakpoints and watchpoints in RISC-V
> architecture. The framework is built on top of perf subsystem and SBI debug
> trigger extension.
> 
> Currently following features are not supported and are in works:
>  - Ptrace support
>  - Single stepping
>  - Virtualization of debug triggers

Thanks for the patches.  Looks like it breaks rv32 builds.  Can you check 
that and update? 

thanks,

- Paul

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WARNING: multiple messages have this Message-ID (diff)
From: Paul Walmsley <pjw@kernel.org>
To: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	 pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	alex@ghiti.fr,  shuah@kernel.org
Subject: Re: [PATCH v4 0/2] riscv: Introduce support for hardware break/watchpoints
Date: Wed, 15 Jul 2026 10:21:09 -0600 (MDT)	[thread overview]
Message-ID: <cf01ccc8-e171-e397-f6e2-a7c05a37022b@kernel.org> (raw)
In-Reply-To: <20260518065920.872131-1-himanshu.chauhan@oss.qualcomm.com>

Hi,

On Mon, 18 May 2026, Himanshu Chauhan wrote:

> This patchset adds support of hardware breakpoints and watchpoints in RISC-V
> architecture. The framework is built on top of perf subsystem and SBI debug
> trigger extension.
> 
> Currently following features are not supported and are in works:
>  - Ptrace support
>  - Single stepping
>  - Virtualization of debug triggers

Thanks for the patches.  Looks like it breaks rv32 builds.  Can you check 
that and update? 

thanks,

- Paul

  parent reply	other threads:[~2026-07-15 16:21 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-18  6:59 [PATCH v4 0/2] riscv: Introduce support for hardware break/watchpoints Himanshu Chauhan
2026-05-18  6:59 ` Himanshu Chauhan
2026-05-18  6:59 ` [PATCH v4 1/2] " Himanshu Chauhan
2026-05-18  6:59   ` Himanshu Chauhan
2026-07-17  7:19   ` Qingfang Deng
2026-07-17  7:19     ` Qingfang Deng
2026-05-18  6:59 ` [PATCH v4 2/2] riscv: Add breakpoint and watchpoint test for riscv Himanshu Chauhan
2026-05-18  6:59   ` Himanshu Chauhan
2026-07-15 16:21 ` Paul Walmsley [this message]
2026-07-15 16:21   ` [PATCH v4 0/2] riscv: Introduce support for hardware break/watchpoints Paul Walmsley

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