From: <Conor.Dooley@microchip.com>
To: <bmeng.cn@gmail.com>, <palmer@dabbelt.com>,
<paul.walmsley@sifive.com>, <atish.patra@wdc.com>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: <bin.meng@windriver.com>
Subject: Re: [PATCH 2/2] riscv: dts: microchip: Fix wrong interrupt numbers of DMA
Date: Tue, 13 Jul 2021 15:29:24 +0000 [thread overview]
Message-ID: <cf738ebe-daea-76d9-b46e-ff4e319e2946@microchip.com> (raw)
In-Reply-To: <20210616060251.398444-2-bmeng.cn@gmail.com>
On 16/06/2021 07:02, Bin Meng wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> From: Bin Meng <bin.meng@windriver.com>
>
> Per chapter 5.2.2, interrupt sources in the PolarFire MSS doc [1],
> the correct interrupt numbers for DMA are <5,6,...,12>.
>
> [1] https://www.microsemi.com/document-portal/doc_download/
> 1245725-polarfire-soc-fpga-mss-technical-reference-manual
>
> Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index ee54878b3f89..a00d9dc560d3 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -182,7 +182,7 @@ dma@3000000 {
> compatible = "sifive,fu540-c000-pdma";
> reg = <0x0 0x3000000 0x0 0x8000>;
> interrupt-parent = <&plic>;
> - interrupts = <23 24 25 26 27 28 29 30>;
> + interrupts = <5 6 7 8 9 10 11 12>;
> #dma-cells = <1>;
> };
>
> --
> 2.25.1
Reviewed-by: conor dooley<conor.dooley@microchip.com>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
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http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <bmeng.cn@gmail.com>, <palmer@dabbelt.com>,
<paul.walmsley@sifive.com>, <atish.patra@wdc.com>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: <bin.meng@windriver.com>
Subject: Re: [PATCH 2/2] riscv: dts: microchip: Fix wrong interrupt numbers of DMA
Date: Tue, 13 Jul 2021 15:29:24 +0000 [thread overview]
Message-ID: <cf738ebe-daea-76d9-b46e-ff4e319e2946@microchip.com> (raw)
In-Reply-To: <20210616060251.398444-2-bmeng.cn@gmail.com>
On 16/06/2021 07:02, Bin Meng wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> From: Bin Meng <bin.meng@windriver.com>
>
> Per chapter 5.2.2, interrupt sources in the PolarFire MSS doc [1],
> the correct interrupt numbers for DMA are <5,6,...,12>.
>
> [1] https://www.microsemi.com/document-portal/doc_download/
> 1245725-polarfire-soc-fpga-mss-technical-reference-manual
>
> Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> ---
>
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index ee54878b3f89..a00d9dc560d3 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -182,7 +182,7 @@ dma@3000000 {
> compatible = "sifive,fu540-c000-pdma";
> reg = <0x0 0x3000000 0x0 0x8000>;
> interrupt-parent = <&plic>;
> - interrupts = <23 24 25 26 27 28 29 30>;
> + interrupts = <5 6 7 8 9 10 11 12>;
> #dma-cells = <1>;
> };
>
> --
> 2.25.1
Reviewed-by: conor dooley<conor.dooley@microchip.com>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-07-13 15:29 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-16 6:02 [PATCH 1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes Bin Meng
2021-06-16 6:02 ` Bin Meng
2021-06-16 6:02 ` [PATCH 2/2] riscv: dts: microchip: Fix wrong interrupt numbers of DMA Bin Meng
2021-06-16 6:02 ` Bin Meng
2021-07-13 15:29 ` Conor.Dooley [this message]
2021-07-13 15:29 ` Conor.Dooley
2021-07-08 13:39 ` [PATCH 1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes Bin Meng
2021-07-08 13:39 ` Bin Meng
2021-07-09 8:42 ` Conor.Dooley
2021-07-09 8:42 ` Conor.Dooley
2021-07-13 15:29 ` Conor.Dooley
2021-07-13 15:29 ` Conor.Dooley
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