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* [Buildroot] [pull request] Pull request for branch xtensa
@ 2012-11-15 13:30 Thomas Petazzoni
  0 siblings, 0 replies; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:30 UTC (permalink / raw)
  To: buildroot

The following changes since commit 53adfc5f4976704d426681a0404c1643db009552:

  lua: refactor without useless define's (2012-11-15 12:39:19 +0100)

are available in the git repository at:

  git://git.free-electrons.com/users/thomas-petazzoni/buildroot.git xtensa

for you to fetch changes up to 7c693cd311e2993cf78952db386b977b21196979:

  xtensa: support configurable processor configurations (2012-11-15 14:30:02 +0100)

----------------------------------------------------------------
Chris Zankel (2):
      xtensa: add support for the Xtensa architecture
      xtensa: support configurable processor configurations

Thomas Petazzoni (3):
      arch: improve definition of gcc mtune, mcpu, etc.
      uClibc: remove useless linuxthreads-errno-fix patch
      uClibc: update uClibc-snapshot.config to recent uClibcs

 arch/Config.in                                     |   70 +++++-
 arch/Config.in.aarch64                             |    5 +
 arch/Config.in.arm                                 |   52 +++++
 arch/Config.in.avr32                               |    5 +
 arch/Config.in.bfin                                |    6 +
 arch/Config.in.common                              |  245 --------------------
 arch/Config.in.m68k                                |   21 ++
 arch/Config.in.microblaze                          |   10 +
 arch/Config.in.mips                                |   25 ++
 arch/Config.in.powerpc                             |   45 ++++
 arch/Config.in.sh                                  |   17 ++
 arch/Config.in.sparc                               |   31 +++
 arch/Config.in.x86                                 |   89 +++++++
 arch/Config.in.xtensa                              |   33 +++
 linux/Config.in                                    |    3 +-
 package/binutils/binutils.mk                       |    9 +
 package/ltrace/Config.in                           |    1 +
 toolchain/Config.in                                |    2 +-
 toolchain/gcc/gcc-uclibc-4.x.mk                    |    4 +
 toolchain/gdb/gdb.mk                               |    4 +
 toolchain/toolchain-buildroot/Config.in.2          |    4 +-
 toolchain/toolchain-common.in                      |    2 +-
 toolchain/uClibc/Config.in                         |    5 +-
 toolchain/uClibc/uClibc-snapshot.config            |    1 +
 .../uClibc.snapshot.linuxthreads-errno-fix.patch   |   68 ------
 toolchain/uClibc/uclibc.mk                         |    1 +
 26 files changed, 435 insertions(+), 323 deletions(-)
 create mode 100644 arch/Config.in.aarch64
 create mode 100644 arch/Config.in.avr32
 delete mode 100644 arch/Config.in.common
 create mode 100644 arch/Config.in.m68k
 create mode 100644 arch/Config.in.microblaze
 create mode 100644 arch/Config.in.xtensa
 delete mode 100644 toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch

Thanks,
-- 
Thomas Petazzoni

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [Buildroot] [pull request] Pull request for branch xtensa
@ 2012-11-15 13:53 Thomas Petazzoni
  2012-11-15 13:53 ` [Buildroot] [PATCH 1/6] arch: improve definition of gcc mtune, mcpu, etc Thomas Petazzoni
                   ` (6 more replies)
  0 siblings, 7 replies; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:53 UTC (permalink / raw)
  To: buildroot

Hello,

This version includes an additional patch that quotes the string
configuration options, as suggested by Yann E. Morin.

Thomas

The following changes since commit 53adfc5f4976704d426681a0404c1643db009552:

  lua: refactor without useless define's (2012-11-15 12:39:19 +0100)

are available in the git repository at:

  git://git.free-electrons.com/users/thomas-petazzoni/buildroot.git xtensa

for you to fetch changes up to 4376ef19f7a7e37034dc1ce844b6a13548e43653:

  arch: Config.in string configuration options must be quoted (2012-11-15 14:52:30 +0100)

----------------------------------------------------------------
Chris Zankel (2):
      xtensa: add support for the Xtensa architecture
      xtensa: support configurable processor configurations

Thomas Petazzoni (4):
      arch: improve definition of gcc mtune, mcpu, etc.
      uClibc: remove useless linuxthreads-errno-fix patch
      uClibc: update uClibc-snapshot.config to recent uClibcs
      arch: Config.in string configuration options must be quoted

 arch/Config.in                                     |   70 +++++-
 arch/Config.in.aarch64                             |    5 +
 arch/Config.in.arm                                 |   52 +++++
 arch/Config.in.avr32                               |    5 +
 arch/Config.in.bfin                                |    6 +
 arch/Config.in.common                              |  245 --------------------
 arch/Config.in.m68k                                |   21 ++
 arch/Config.in.microblaze                          |   10 +
 arch/Config.in.mips                                |   25 ++
 arch/Config.in.powerpc                             |   45 ++++
 arch/Config.in.sh                                  |   17 ++
 arch/Config.in.sparc                               |   31 +++
 arch/Config.in.x86                                 |   89 +++++++
 arch/Config.in.xtensa                              |   33 +++
 linux/Config.in                                    |    3 +-
 package/binutils/binutils.mk                       |    9 +
 package/ltrace/Config.in                           |    1 +
 toolchain/Config.in                                |    2 +-
 toolchain/gcc/gcc-uclibc-4.x.mk                    |    4 +
 toolchain/gdb/gdb.mk                               |    4 +
 toolchain/toolchain-buildroot/Config.in.2          |    4 +-
 toolchain/toolchain-common.in                      |    2 +-
 toolchain/uClibc/Config.in                         |    5 +-
 toolchain/uClibc/uClibc-snapshot.config            |    1 +
 .../uClibc.snapshot.linuxthreads-errno-fix.patch   |   68 ------
 toolchain/uClibc/uclibc.mk                         |    1 +
 26 files changed, 435 insertions(+), 323 deletions(-)
 create mode 100644 arch/Config.in.aarch64
 create mode 100644 arch/Config.in.avr32
 delete mode 100644 arch/Config.in.common
 create mode 100644 arch/Config.in.m68k
 create mode 100644 arch/Config.in.microblaze
 create mode 100644 arch/Config.in.xtensa
 delete mode 100644 toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch

Thanks,
-- 
Thomas Petazzoni

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 1/6] arch: improve definition of gcc mtune, mcpu, etc.
  2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
@ 2012-11-15 13:53 ` Thomas Petazzoni
  2012-11-15 14:41   ` Yann E. MORIN
  2012-11-15 13:53 ` [Buildroot] [PATCH 2/6] uClibc: remove useless linuxthreads-errno-fix patch Thomas Petazzoni
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:53 UTC (permalink / raw)
  To: buildroot

As suggested by Yann E. Morin, there is a better way than our current
big Config.in.common to define the gcc mtune, mcpu, march,
etc. values. We can split the setting of those values in each
architecture file, which makes a lot more sense.

Therefore, the Config.in file now creates empty kconfig variables
BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
variables are set by the individual Config.in.<arch> files. This is
possible because such files are now only conditionally included
depending on the top-level architecture that has been selected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/Config.in            |   59 ++++++++++-
 arch/Config.in.aarch64    |    5 +
 arch/Config.in.arm        |   52 ++++++++++
 arch/Config.in.avr32      |    5 +
 arch/Config.in.bfin       |    6 ++
 arch/Config.in.common     |  245 ---------------------------------------------
 arch/Config.in.m68k       |   21 ++++
 arch/Config.in.microblaze |   10 ++
 arch/Config.in.mips       |   25 +++++
 arch/Config.in.powerpc    |   45 +++++++++
 arch/Config.in.sh         |   17 ++++
 arch/Config.in.sparc      |   31 ++++++
 arch/Config.in.x86        |   89 ++++++++++++++++
 13 files changed, 361 insertions(+), 249 deletions(-)
 create mode 100644 arch/Config.in.aarch64
 create mode 100644 arch/Config.in.avr32
 delete mode 100644 arch/Config.in.common
 create mode 100644 arch/Config.in.m68k
 create mode 100644 arch/Config.in.microblaze

diff --git a/arch/Config.in b/arch/Config.in
index 4d1f81f..b326cb5 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -147,15 +147,66 @@ config BR2_x86_64
 
 endchoice
 
-config BR2_microblaze
-	bool
-	default y if BR2_microblazeel || BR2_microblazebe
+# The following string values are defined by the individual
+# Config.in.$ARCH files
+config BR2_ARCH
+	string
 
+config BR2_ENDIAN
+	string
+
+config BR2_GCC_TARGET_TUNE
+	string
+
+config BR2_GCC_TARGET_ARCH
+	string
+
+config BR2_GCC_TARGET_ABI
+	string
+
+config BR2_GCC_TARGET_CPU
+	string
+
+if BR2_arm || BR2_armeb
 source "arch/Config.in.arm"
+endif
+
+if BR2_aarch64
+source "arch/Config.in.aarch64"
+endif
+
+if BR2_avr32
+source "arch/Config.in.avr32"
+endif
+
+if BR2_bfin
 source "arch/Config.in.bfin"
+endif
+
+if BR2_m68k
+source "arch/Config.in.m68k"
+endif
+
+if BR2_microblazeel || BR2_microblazebe
+source "arch/Config.in.microblaze"
+endif
+
+if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
 source "arch/Config.in.mips"
+endif
+
+if BR2_powerpc
 source "arch/Config.in.powerpc"
+endif
+
+if BR2_sh || BR2_sh64
 source "arch/Config.in.sh"
+endif
+
+if BR2_sparc
 source "arch/Config.in.sparc"
+endif
+
+if BR2_i386 || BR2_x86_64
 source "arch/Config.in.x86"
-source "arch/Config.in.common"
+endif
diff --git a/arch/Config.in.aarch64 b/arch/Config.in.aarch64
new file mode 100644
index 0000000..4c68a37
--- /dev/null
+++ b/arch/Config.in.aarch64
@@ -0,0 +1,5 @@
+config BR2_ARCH
+	default "aarch64"	if BR2_aarch64
+
+config BR2_ENDIAN
+	default "LITTLE"
diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 8d9db3c..2acedc4 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -60,3 +60,55 @@ config BR2_ARM_OABI
 	depends on !BR2_GCC_VERSION_4_7_X
 endchoice
 
+config BR2_ARCH
+	default "arm"	if BR2_arm
+	default "armeb"	if BR2_armeb
+
+config BR2_ENDIAN
+	default "LITTLE" if BR2_arm
+	default "BIG"	 if BR2_armeb
+
+config BR2_GCC_TARGET_TUNE
+	default arm600		if BR2_arm600
+	default arm610		if BR2_arm610
+	default arm620		if BR2_arm620
+	default arm7tdmi	if BR2_arm7tdmi
+	default arm7tdmi	if BR2_arm720t
+	default arm7tdmi	if BR2_arm740t
+	default arm920		if BR2_arm920
+	default arm920t		if BR2_arm920t
+	default arm922t		if BR2_arm922t
+	default arm926ej-s	if BR2_arm926t
+	default arm1136j-s	if BR2_arm1136j_s
+	default arm1136jf-s	if BR2_arm1136jf_s
+	default arm1176jz-s	if BR2_arm1176jz_s
+	default arm1176jzf-s	if BR2_arm1176jzf_s
+	default cortex-a8	if BR2_cortex_a8
+	default cortex-a9	if BR2_cortex_a9
+	default strongarm110	if BR2_sa110
+	default strongarm1100	if BR2_sa1100
+	default xscale		if BR2_xscale
+	default iwmmxt		if BR2_iwmmxt
+
+config BR2_GCC_TARGET_ARCH
+	default armv4t		if BR2_arm7tdmi
+	default armv3		if BR2_arm610
+	default armv3		if BR2_arm710
+	default armv4t		if BR2_arm720t
+	default armv4t		if BR2_arm920t
+	default armv4t		if BR2_arm922t
+	default armv5te		if BR2_arm926t
+	default armv5t		if BR2_arm10t
+	default armv6j		if BR2_arm1136jf_s
+	default armv6zk		if BR2_arm1176jz_s
+	default armv6zk		if BR2_arm1176jzf_s
+	default armv7-a		if BR2_cortex_a8
+	default armv7-a		if BR2_cortex_a9
+	default armv4		if BR2_sa110
+	default armv4		if BR2_sa1100
+	default armv5te		if BR2_xscale
+	default iwmmxt		if BR2_iwmmxt
+
+config BR2_GCC_TARGET_ABI
+	default apcs-gnu	if BR2_ARM_OABI
+	default aapcs-linux	if BR2_ARM_EABI
diff --git a/arch/Config.in.avr32 b/arch/Config.in.avr32
new file mode 100644
index 0000000..ebf8454
--- /dev/null
+++ b/arch/Config.in.avr32
@@ -0,0 +1,5 @@
+config BR2_ARCH
+       default "avr32"
+
+config BR2_ENDIAN
+       default "BIG"
diff --git a/arch/Config.in.bfin b/arch/Config.in.bfin
index 1823bde..0b137ae 100644
--- a/arch/Config.in.bfin
+++ b/arch/Config.in.bfin
@@ -8,3 +8,9 @@ config BR2_BFIN_FLAT
 	bool "FLAT"
 	select BR2_PREFER_STATIC_LIB
 endchoice
+
+config BR2_ARCH
+	default "bfin"
+
+config BR2_ENDIAN
+        default "LITTLE"
diff --git a/arch/Config.in.common b/arch/Config.in.common
deleted file mode 100644
index 1ed9929..0000000
--- a/arch/Config.in.common
+++ /dev/null
@@ -1,245 +0,0 @@
-config BR2_ARCH
-	string
-	default "arm"		if BR2_arm
-	default "armeb"		if BR2_armeb
-	default "aarch64"       if BR2_aarch64
-	default "avr32"		if BR2_avr32
-	default "bfin"		if BR2_bfin
-	default "i386"		if BR2_x86_i386
-	default "i486"		if BR2_x86_i486
-	default "i586"		if BR2_x86_i586
-	default "i586"		if BR2_x86_pentium_mmx
-	default "i586"		if BR2_x86_geode
-	default "i586"		if BR2_x86_c3
-	default "i686"		if BR2_x86_c32
-	default "i586"		if BR2_x86_winchip_c6
-	default "i586"		if BR2_x86_winchip2
-	default "i686"		if BR2_x86_i686
-	default "i686"		if BR2_x86_pentium2
-	default "i686"		if BR2_x86_pentium3
-	default "i686"		if BR2_x86_pentium4
-	default "i686"		if BR2_x86_pentium_m
-	default "i686"		if BR2_x86_pentiumpro
-	default "i686"		if BR2_x86_prescott
-	default "i686"		if BR2_x86_nocona && BR2_i386
-	default "i686"		if BR2_x86_core2 && BR2_i386
-	default "i686"		if BR2_x86_atom && BR2_i386
-	default "i686"		if BR2_x86_opteron && BR2_i386
-	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
-	default "i686"		if BR2_x86_barcelona && BR2_i386
-	default "i686"		if BR2_x86_k6
-	default "i686"		if BR2_x86_k6_2
-	default "i686"		if BR2_x86_athlon
-	default "i686"		if BR2_x86_athlon_4
-	default "x86_64"	if BR2_x86_64
-	default "m68k"		if BR2_m68k
-	default "microblaze"	if BR2_microblaze
-	default "mips"		if BR2_mips
-	default "mipsel"	if BR2_mipsel
-	default "mips64"	if BR2_mips64
-	default "mips64el"	if BR2_mips64el
-	default "powerpc"	if BR2_powerpc
-	default "sh2"		if BR2_sh2
-	default "sh2a"		if BR2_sh2a
-	default "sh3"		if BR2_sh3
-	default "sh3eb"		if BR2_sh3eb
-	default "sh4"		if BR2_sh4
-	default "sh4eb"		if BR2_sh4eb
-	default "sh4a"		if BR2_sh4a
-	default "sh4aeb"	if BR2_sh4aeb
-	default "sh64"		if BR2_sh64
-	default "sparc"		if BR2_sparc
-
-
-config BR2_ENDIAN
-	string
-	default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel || BR2_mips64el || \
-			    BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || BR2_sh64 || \
-			    BR2_microblazeel
-	default "BIG"    if BR2_armeb || BR2_avr32 || BR2_m68k || BR2_mips || BR2_mips64 || \
-			    BR2_powerpc || BR2_sh2 || BR2_sh2a || \
-			    BR2_sh3eb || BR2_sh4eb || BR2_sh4aeb || BR2_sparc || \
-			    BR2_microblazebe
-
-config BR2_GCC_TARGET_TUNE
-	string
-	default i386		if BR2_x86_i386
-	default i486		if BR2_x86_i486
-	default i586		if BR2_x86_i586
-	default pentium-mmx	if BR2_x86_pentium_mmx
-	default i686		if BR2_x86_i686
-	default pentiumpro	if BR2_x86_pentiumpro
-	default pentium-m	if BR2_x86_pentium_m
-	default pentium2	if BR2_x86_pentium2
-	default pentium3	if BR2_x86_pentium3
-	default pentium4	if BR2_x86_pentium4
-	default prescott	if BR2_x86_prescott
-	default nocona		if BR2_x86_nocona
-	default core2		if BR2_x86_core2
-	default atom		if BR2_x86_atom
-	default k8		if BR2_x86_opteron
-	default k8-sse3		if BR2_x86_opteron_sse3
-	default barcelona	if BR2_x86_barcelona
-	default k6		if BR2_x86_k6
-	default k6-2		if BR2_x86_k6_2
-	default athlon		if BR2_x86_athlon
-	default athlon-4	if BR2_x86_athlon_4
-	default winchip-c6	if BR2_x86_winchip_c6
-	default winchip2	if BR2_x86_winchip2
-	default c3		if BR2_x86_c3
-	default c3-2		if BR2_x86_c32
-	default geode		if BR2_x86_geode
-	default generic		if BR2_x86_generic
-	default arm600		if BR2_arm600
-	default arm610		if BR2_arm610
-	default arm620		if BR2_arm620
-	default arm7tdmi	if BR2_arm7tdmi
-	default arm7tdmi	if BR2_arm720t
-	default arm7tdmi	if BR2_arm740t
-	default arm920		if BR2_arm920
-	default arm920t		if BR2_arm920t
-	default arm922t		if BR2_arm922t
-	default arm926ej-s	if BR2_arm926t
-	default arm1136j-s	if BR2_arm1136j_s
-	default arm1136jf-s	if BR2_arm1136jf_s
-	default arm1176jz-s	if BR2_arm1176jz_s
-	default arm1176jzf-s	if BR2_arm1176jzf_s
-	default cortex-a8	if BR2_cortex_a8
-	default cortex-a9	if BR2_cortex_a9
-	default strongarm110	if BR2_sa110
-	default strongarm1100	if BR2_sa1100
-	default xscale		if BR2_xscale
-	default iwmmxt		if BR2_iwmmxt
-	default 68000		if BR2_m68k_68000
-	default 68010		if BR2_m68k_68010
-	default 68020		if BR2_m68k_68020
-	default 68030		if BR2_m68k_68030
-	default 68040		if BR2_m68k_68040
-	default 68060		if BR2_m68k_68060
-	default mips1		if BR2_mips_1
-	default mips2		if BR2_mips_2
-	default mips3		if BR2_mips_3
-	default mips4		if BR2_mips_4
-	default mips32		if BR2_mips_32
-	default mips32r2	if BR2_mips_32r2
-	default mips64		if BR2_mips_64
-	default mips64r2	if BR2_mips_64r2
-	default 401		if BR2_powerpc_401
-	default 403		if BR2_powerpc_403
-	default 405		if BR2_powerpc_405
-	default 405fp		if BR2_powerpc_405fp
-	default 440		if BR2_powerpc_440
-	default 440fp		if BR2_powerpc_440fp
-	default 505		if BR2_powerpc_505
-	default 601		if BR2_powerpc_601
-	default 602		if BR2_powerpc_602
-	default 603		if BR2_powerpc_603
-	default 603e		if BR2_powerpc_603e
-	default 604		if BR2_powerpc_604
-	default 604e		if BR2_powerpc_604e
-	default 620		if BR2_powerpc_620
-	default 630		if BR2_powerpc_630
-	default 740		if BR2_powerpc_740
-	default 7400		if BR2_powerpc_7400
-	default 7450		if BR2_powerpc_7450
-	default 750		if BR2_powerpc_750
-	default 801		if BR2_powerpc_801
-	default 821		if BR2_powerpc_821
-	default 823		if BR2_powerpc_823
-	default 860		if BR2_powerpc_860
-	default 970		if BR2_powerpc_970
-	default 8540		if BR2_powerpc_8540
-	default	8548		if BR2_powerpc_8548
-	default e300c2		if BR2_powerpc_e300c2
-	default e300c3		if BR2_powerpc_e300c3
-	default e500mc		if BR2_powerpc_e500mc
-	default v7		if BR2_sparc_v7
-	default cypress		if BR2_sparc_cypress
-	default v8		if BR2_sparc_v8
-	default supersparc	if BR2_sparc_supersparc
-	default hypersparc	if BR2_sparc_hypersparc
-	default sparclite	if BR2_sparc_sparclite
-	default f930		if BR2_sparc_f930
-	default f934		if BR2_sparc_f934
-	default sparclite86x	if BR2_sparc_sparclite86x
-	default sparclet	if BR2_sparc_sparclet
-	default tsc701		if BR2_sparc_tsc701
-	default v9		if BR2_sparc_v9
-	default v9		if BR2_sparc_v9a
-	default v9		if BR2_sparc_v9b
-	default ultrasparc	if BR2_sparc_ultrasparc
-	default ultrasparc3	if BR2_sparc_ultrasparc3
-	default niagara		if BR2_sparc_niagara
-
-config BR2_GCC_TARGET_ARCH
-	string
-	default i386		if BR2_x86_i386
-	default i486		if BR2_x86_i486
-	default i586		if BR2_x86_i586
-	default pentium-mmx	if BR2_x86_pentium_mmx
-	default i686		if BR2_x86_i686
-	default pentiumpro	if BR2_x86_pentiumpro
-	default pentium-m	if BR2_x86_pentium_m
-	default pentium2	if BR2_x86_pentium2
-	default pentium3	if BR2_x86_pentium3
-	default pentium4	if BR2_x86_pentium4
-	default prescott	if BR2_x86_prescott
-	default nocona		if BR2_x86_nocona
-	default core2		if BR2_x86_core2
-	default atom		if BR2_x86_atom
-	default k8		if BR2_x86_opteron
-	default k8-sse3		if BR2_x86_opteron_sse3
-	default barcelona	if BR2_x86_barcelona
-	default k6		if BR2_x86_k6
-	default k6-2		if BR2_x86_k6_2
-	default athlon		if BR2_x86_athlon
-	default athlon-4	if BR2_x86_athlon_4
-	default winchip-c6	if BR2_x86_winchip_c6
-	default winchip2	if BR2_x86_winchip2
-	default c3		if BR2_x86_c3
-	default c3-2		if BR2_x86_c32
-	default geode		if BR2_x86_geode
-	default armv4t		if BR2_arm7tdmi
-	default armv3		if BR2_arm610
-	default armv3		if BR2_arm710
-	default armv4t		if BR2_arm720t
-	default armv4t		if BR2_arm920t
-	default armv4t		if BR2_arm922t
-	default armv5te		if BR2_arm926t
-	default armv5t		if BR2_arm10t
-	default armv6j		if BR2_arm1136jf_s
-	default armv6zk		if BR2_arm1176jz_s
-	default armv6zk		if BR2_arm1176jzf_s
-	default armv7-a		if BR2_cortex_a8
-	default armv7-a		if BR2_cortex_a9
-	default armv4		if BR2_sa110
-	default armv4		if BR2_sa1100
-	default armv5te		if BR2_xscale
-	default iwmmxt		if BR2_iwmmxt
-	default 68000		if BR2_m68k_68000
-	default 68010		if BR2_m68k_68010
-	default 68020		if BR2_m68k_68020
-	default 68030		if BR2_m68k_68030
-	default 68040		if BR2_m68k_68040
-	default 68060		if BR2_m68k_68060
-
-config BR2_GCC_TARGET_ABI
-	string
-	default apcs-gnu	if BR2_ARM_OABI
-	default aapcs-linux	if BR2_ARM_EABI
-	default 32		if BR2_MIPS_OABI32
-	default n32		if BR2_MIPS_NABI32
-	default 64		if BR2_MIPS_NABI64
-	default altivec		if BR2_powerpc && BR2_PPC_ABI_altivec
-	default no-altivec	if BR2_powerpc && BR2_PPC_ABI_no-altivec
-	default spe		if BR2_powerpc && BR2_PPC_ABI_spe
-	default no-spe		if BR2_powerpc && BR2_PPC_ABI_no-spe
-	default ibmlongdouble	if BR2_powerpc && BR2_PPC_ABI_ibmlongdouble
-	default ieeelongdouble	if BR2_powerpc && BR2_PPC_ABI_ieeelongdouble
-
-config BR2_GCC_TARGET_CPU
-	string
-	default sparchfleon	if BR2_sparc_sparchfleon
-	default sparchfleonv8	if BR2_sparc_sparchfleonv8
-	default sparcsfleon	if BR2_sparc_sparcsfleon
-	default sparcsfleonv8	if BR2_sparc_sparcsfleonv8
diff --git a/arch/Config.in.m68k b/arch/Config.in.m68k
new file mode 100644
index 0000000..b3d95b7
--- /dev/null
+++ b/arch/Config.in.m68k
@@ -0,0 +1,21 @@
+config BR2_ARCH
+	default "m68k"		if BR2_m68k
+
+config BR2_ENDIAN
+	default "BIG"
+
+config BR2_GCC_TARGET_TUNE
+	default 68000		if BR2_m68k_68000
+	default 68010		if BR2_m68k_68010
+	default 68020		if BR2_m68k_68020
+	default 68030		if BR2_m68k_68030
+	default 68040		if BR2_m68k_68040
+	default 68060		if BR2_m68k_68060
+
+config BR2_GCC_TARGET_ARCH
+	default 68000		if BR2_m68k_68000
+	default 68010		if BR2_m68k_68010
+	default 68020		if BR2_m68k_68020
+	default 68030		if BR2_m68k_68030
+	default 68040		if BR2_m68k_68040
+	default 68060		if BR2_m68k_68060
diff --git a/arch/Config.in.microblaze b/arch/Config.in.microblaze
new file mode 100644
index 0000000..dbdd99a
--- /dev/null
+++ b/arch/Config.in.microblaze
@@ -0,0 +1,10 @@
+config BR2_ARCH
+	default "microblaze"
+
+config BR2_ENDIAN
+	default "LITTLE" if BR2_microblazeel
+	default "BIG"	 if BR2_microblazebe
+
+config BR2_microblaze
+	bool
+	default y if BR2_microblazeel || BR2_microblazebe
diff --git a/arch/Config.in.mips b/arch/Config.in.mips
index 93a21bf..c71c3f4 100644
--- a/arch/Config.in.mips
+++ b/arch/Config.in.mips
@@ -51,3 +51,28 @@ config BR2_MIPS_NABI64
 	bool "n64"
 	depends on BR2_ARCH_IS_64
 endchoice
+
+config BR2_ARCH
+	default "mips"		if BR2_mips
+	default "mipsel"	if BR2_mipsel
+	default "mips64"	if BR2_mips64
+	default "mips64el"	if BR2_mips64el
+
+config BR2_ENDIAN
+	default "LITTLE"	if BR2_mipsel || BR2_mips64el
+	default "BIG" 	    	if BR2_mips || BR2_mips64
+
+config BR2_GCC_TARGET_TUNE
+	default mips1		if BR2_mips_1
+	default mips2		if BR2_mips_2
+	default mips3		if BR2_mips_3
+	default mips4		if BR2_mips_4
+	default mips32		if BR2_mips_32
+	default mips32r2	if BR2_mips_32r2
+	default mips64		if BR2_mips_64
+	default mips64r2	if BR2_mips_64r2
+
+config BR2_GCC_TARGET_ABI
+	default 32		if BR2_MIPS_OABI32
+	default n32		if BR2_MIPS_NABI32
+	default 64		if BR2_MIPS_NABI64
diff --git a/arch/Config.in.powerpc b/arch/Config.in.powerpc
index 20b0b06..55c1651 100644
--- a/arch/Config.in.powerpc
+++ b/arch/Config.in.powerpc
@@ -81,3 +81,48 @@ config BR2_powerpc_SPE
 	bool "SPE"
 	depends on BR2_powerpc_8540 || BR2_powerpc_8548
 endchoice
+
+config BR2_ARCH
+	default "powerpc"	if BR2_powerpc
+
+config BR2_ENDIAN
+	default "BIG"
+
+config BR2_GCC_TARGET_TUNE
+	default 401		if BR2_powerpc_401
+	default 403		if BR2_powerpc_403
+	default 405		if BR2_powerpc_405
+	default 405fp		if BR2_powerpc_405fp
+	default 440		if BR2_powerpc_440
+	default 440fp		if BR2_powerpc_440fp
+	default 505		if BR2_powerpc_505
+	default 601		if BR2_powerpc_601
+	default 602		if BR2_powerpc_602
+	default 603		if BR2_powerpc_603
+	default 603e		if BR2_powerpc_603e
+	default 604		if BR2_powerpc_604
+	default 604e		if BR2_powerpc_604e
+	default 620		if BR2_powerpc_620
+	default 630		if BR2_powerpc_630
+	default 740		if BR2_powerpc_740
+	default 7400		if BR2_powerpc_7400
+	default 7450		if BR2_powerpc_7450
+	default 750		if BR2_powerpc_750
+	default 801		if BR2_powerpc_801
+	default 821		if BR2_powerpc_821
+	default 823		if BR2_powerpc_823
+	default 860		if BR2_powerpc_860
+	default 970		if BR2_powerpc_970
+	default 8540		if BR2_powerpc_8540
+	default	8548		if BR2_powerpc_8548
+	default e300c2		if BR2_powerpc_e300c2
+	default e300c3		if BR2_powerpc_e300c3
+	default e500mc		if BR2_powerpc_e500mc
+
+config BR2_GCC_TARGET_ABI
+	default altivec		if BR2_PPC_ABI_altivec
+	default no-altivec	if BR2_PPC_ABI_no-altivec
+	default spe		if BR2_PPC_ABI_spe
+	default no-spe		if BR2_PPC_ABI_no-spe
+	default ibmlongdouble	if BR2_PPC_ABI_ibmlongdouble
+	default ieeelongdouble	if BR2_PPC_ABI_ieeelongdouble
diff --git a/arch/Config.in.sh b/arch/Config.in.sh
index 314c55a..cf70fd5 100644
--- a/arch/Config.in.sh
+++ b/arch/Config.in.sh
@@ -22,3 +22,20 @@ config BR2_sh4a
 config BR2_sh4aeb
 	bool "sh4aeb (SH4A big endian)"
 endchoice
+
+config BR2_ARCH
+	default "sh2"		if BR2_sh2
+	default "sh2a"		if BR2_sh2a
+	default "sh3"		if BR2_sh3
+	default "sh3eb"		if BR2_sh3eb
+	default "sh4"		if BR2_sh4
+	default "sh4eb"		if BR2_sh4eb
+	default "sh4a"		if BR2_sh4a
+	default "sh4aeb"	if BR2_sh4aeb
+	default "sh64"		if BR2_sh64
+
+config BR2_ENDIAN
+	default "LITTLE"	if BR2_sh3 || BR2_sh4 || BR2_sh4a || \
+				   BR2_x86_64 || BR2_sh64
+	default "BIG"		if BR2_sh2 || BR2_sh2a || BR2_sh3eb || \
+				   BR2_sh4eb || BR2_sh4aeb
diff --git a/arch/Config.in.sparc b/arch/Config.in.sparc
index 85e0833..d810b75 100644
--- a/arch/Config.in.sparc
+++ b/arch/Config.in.sparc
@@ -36,3 +36,34 @@ config BR2_sparc_sparclet
 config BR2_sparc_tsc701
 	bool "tsc701"
 endchoice
+
+config BR2_ARCH
+	default "sparc"	if BR2_sparc
+
+config BR2_ENDIAN
+	default "BIG"
+
+config BR2_GCC_TARGET_TUNE
+	default v7		if BR2_sparc_v7
+	default cypress		if BR2_sparc_cypress
+	default v8		if BR2_sparc_v8
+	default supersparc	if BR2_sparc_supersparc
+	default hypersparc	if BR2_sparc_hypersparc
+	default sparclite	if BR2_sparc_sparclite
+	default f930		if BR2_sparc_f930
+	default f934		if BR2_sparc_f934
+	default sparclite86x	if BR2_sparc_sparclite86x
+	default sparclet	if BR2_sparc_sparclet
+	default tsc701		if BR2_sparc_tsc701
+	default v9		if BR2_sparc_v9
+	default v9		if BR2_sparc_v9a
+	default v9		if BR2_sparc_v9b
+	default ultrasparc	if BR2_sparc_ultrasparc
+	default ultrasparc3	if BR2_sparc_ultrasparc3
+	default niagara		if BR2_sparc_niagara
+
+config BR2_GCC_TARGET_CPU
+	default sparchfleon	if BR2_sparc_sparchfleon
+	default sparchfleonv8	if BR2_sparc_sparchfleonv8
+	default sparcsfleon	if BR2_sparc_sparcsfleon
+	default sparcsfleonv8	if BR2_sparc_sparcsfleonv8
diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
index 4f32d74..ef29a71 100644
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -144,3 +144,92 @@ config BR2_x86_winchip2
 	select BR2_X86_CPU_HAS_MMX
 	depends on !BR2_x86_64
 endchoice
+
+config BR2_ARCH
+	default "i386"		if BR2_x86_i386
+	default "i486"		if BR2_x86_i486
+	default "i586"		if BR2_x86_i586
+	default "i586"		if BR2_x86_pentium_mmx
+	default "i586"		if BR2_x86_geode
+	default "i586"		if BR2_x86_c3
+	default "i686"		if BR2_x86_c32
+	default "i586"		if BR2_x86_winchip_c6
+	default "i586"		if BR2_x86_winchip2
+	default "i686"		if BR2_x86_i686
+	default "i686"		if BR2_x86_pentium2
+	default "i686"		if BR2_x86_pentium3
+	default "i686"		if BR2_x86_pentium4
+	default "i686"		if BR2_x86_pentium_m
+	default "i686"		if BR2_x86_pentiumpro
+	default "i686"		if BR2_x86_prescott
+	default "i686"		if BR2_x86_nocona && BR2_i386
+	default "i686"		if BR2_x86_core2 && BR2_i386
+	default "i686"		if BR2_x86_atom && BR2_i386
+	default "i686"		if BR2_x86_opteron && BR2_i386
+	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
+	default "i686"		if BR2_x86_barcelona && BR2_i386
+	default "i686"		if BR2_x86_k6
+	default "i686"		if BR2_x86_k6_2
+	default "i686"		if BR2_x86_athlon
+	default "i686"		if BR2_x86_athlon_4
+	default "x86_64"	if BR2_x86_64
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_GCC_TARGET_TUNE
+	default i386		if BR2_x86_i386
+	default i486		if BR2_x86_i486
+	default i586		if BR2_x86_i586
+	default pentium-mmx	if BR2_x86_pentium_mmx
+	default i686		if BR2_x86_i686
+	default pentiumpro	if BR2_x86_pentiumpro
+	default pentium-m	if BR2_x86_pentium_m
+	default pentium2	if BR2_x86_pentium2
+	default pentium3	if BR2_x86_pentium3
+	default pentium4	if BR2_x86_pentium4
+	default prescott	if BR2_x86_prescott
+	default nocona		if BR2_x86_nocona
+	default core2		if BR2_x86_core2
+	default atom		if BR2_x86_atom
+	default k8		if BR2_x86_opteron
+	default k8-sse3		if BR2_x86_opteron_sse3
+	default barcelona	if BR2_x86_barcelona
+	default k6		if BR2_x86_k6
+	default k6-2		if BR2_x86_k6_2
+	default athlon		if BR2_x86_athlon
+	default athlon-4	if BR2_x86_athlon_4
+	default winchip-c6	if BR2_x86_winchip_c6
+	default winchip2	if BR2_x86_winchip2
+	default c3		if BR2_x86_c3
+	default c3-2		if BR2_x86_c32
+	default geode		if BR2_x86_geode
+	default generic		if BR2_x86_generic
+
+config BR2_GCC_TARGET_ARCH
+	default i386		if BR2_x86_i386
+	default i486		if BR2_x86_i486
+	default i586		if BR2_x86_i586
+	default pentium-mmx	if BR2_x86_pentium_mmx
+	default i686		if BR2_x86_i686
+	default pentiumpro	if BR2_x86_pentiumpro
+	default pentium-m	if BR2_x86_pentium_m
+	default pentium2	if BR2_x86_pentium2
+	default pentium3	if BR2_x86_pentium3
+	default pentium4	if BR2_x86_pentium4
+	default prescott	if BR2_x86_prescott
+	default nocona		if BR2_x86_nocona
+	default core2		if BR2_x86_core2
+	default atom		if BR2_x86_atom
+	default k8		if BR2_x86_opteron
+	default k8-sse3		if BR2_x86_opteron_sse3
+	default barcelona	if BR2_x86_barcelona
+	default k6		if BR2_x86_k6
+	default k6-2		if BR2_x86_k6_2
+	default athlon		if BR2_x86_athlon
+	default athlon-4	if BR2_x86_athlon_4
+	default winchip-c6	if BR2_x86_winchip_c6
+	default winchip2	if BR2_x86_winchip2
+	default c3		if BR2_x86_c3
+	default c3-2		if BR2_x86_c32
+	default geode		if BR2_x86_geode
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 2/6] uClibc: remove useless linuxthreads-errno-fix patch
  2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
  2012-11-15 13:53 ` [Buildroot] [PATCH 1/6] arch: improve definition of gcc mtune, mcpu, etc Thomas Petazzoni
@ 2012-11-15 13:53 ` Thomas Petazzoni
  2012-11-15 15:40   ` Peter Korsgaard
  2012-11-15 13:53 ` [Buildroot] [PATCH 3/6] uClibc: update uClibc-snapshot.config to recent uClibcs Thomas Petazzoni
                   ` (4 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:53 UTC (permalink / raw)
  To: buildroot

This patch has since a long time been merged upstream in uClibc, so it
cannot apply on any of the recent uClibc snapshots.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 .../uClibc.snapshot.linuxthreads-errno-fix.patch   |   68 --------------------
 1 file changed, 68 deletions(-)
 delete mode 100644 toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch

diff --git a/toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch b/toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch
deleted file mode 100644
index c4d0d00..0000000
--- a/toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From af8b2d71ce37b9d4d24ddbc755cdea68de02949a Mon Sep 17 00:00:00 2001
-From: Peter Korsgaard <jacmet@sunsite.dk>
-Date: Mon, 5 Jul 2010 14:08:17 +0200
-Subject: [PATCH] don't make __errno_location / __h_errno_location hidden
-
-Closes #2089 (https://bugs.busybox.net/show_bug.cgi?id=2089)
-
-__errno_location / __h_errno_location access has to go through the PLT
-like malloc/free, so the linuxthread variants gets used instead when
-compiling with -pthread.
-
-Based on http://github.com/mat-c/uClibc/commit/328d392c54aa5dc2b8e7f398a419087de497de2b
-
-Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
----
- include/netdb.h                               |    1 -
- libc/misc/internals/__errno_location.c        |    3 ---
- libc/misc/internals/__h_errno_location.c      |    1 -
- libc/sysdeps/linux/common/bits/errno.h        |    1 -
- 6 files changed, 0 insertions(+), 11 deletions(-)
-
-diff --git a/include/netdb.h b/include/netdb.h
-index 9d3807d..ac411ab 100644
---- a/include/netdb.h
-+++ b/include/netdb.h
-@@ -59,7 +59,6 @@ __BEGIN_DECLS
- 
- /* Function to get address of global `h_errno' variable.  */
- extern int *__h_errno_location (void) __THROW __attribute__ ((__const__));
--libc_hidden_proto(__h_errno_location)
- 
- /* Macros for accessing h_errno from inside libc.  */
- #ifdef _LIBC
-diff --git a/libc/misc/internals/__errno_location.c b/libc/misc/internals/__errno_location.c
-index 487a9c2..0620860 100644
---- a/libc/misc/internals/__errno_location.c
-+++ b/libc/misc/internals/__errno_location.c
-@@ -15,6 +15,3 @@ int * weak_const_function __errno_location (void)
- {
-     return &errno;
- }
--#ifdef IS_IN_libc /* not really need, only to keep in sync w/ libc_hidden_proto */
--libc_hidden_weak(__errno_location)
--#endif
-diff --git a/libc/misc/internals/__h_errno_location.c b/libc/misc/internals/__h_errno_location.c
-index 213d398..235df4e 100644
---- a/libc/misc/internals/__h_errno_location.c
-+++ b/libc/misc/internals/__h_errno_location.c
-@@ -10,4 +10,3 @@ int * weak_const_function __h_errno_location (void)
- {
-     return &h_errno;
- }
--libc_hidden_weak(__h_errno_location)
-diff --git a/libc/misc/internals/__uClibc_main.c b/libc/misc/internals/__uClibc_main.c
-index 6e520fa..f4a9ebb 100644
---- a/libc/sysdeps/linux/common/bits/errno.h
-+++ b/libc/sysdeps/linux/common/bits/errno.h
-@@ -43,7 +43,6 @@
- # ifndef __ASSEMBLER__
- /* Function to get address of global `errno' variable.  */
- extern int *__errno_location (void) __THROW __attribute__ ((__const__));
--libc_hidden_proto(__errno_location)
- 
- #  ifdef __UCLIBC_HAS_THREADS__
- /* When using threads, errno is a per-thread value.  */
--- 
-1.7.1
-
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 3/6] uClibc: update uClibc-snapshot.config to recent uClibcs
  2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
  2012-11-15 13:53 ` [Buildroot] [PATCH 1/6] arch: improve definition of gcc mtune, mcpu, etc Thomas Petazzoni
  2012-11-15 13:53 ` [Buildroot] [PATCH 2/6] uClibc: remove useless linuxthreads-errno-fix patch Thomas Petazzoni
@ 2012-11-15 13:53 ` Thomas Petazzoni
  2012-11-15 13:53 ` [Buildroot] [PATCH 4/6] xtensa: add support for the Xtensa architecture Thomas Petazzoni
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:53 UTC (permalink / raw)
  To: buildroot

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 toolchain/uClibc/uClibc-snapshot.config |    1 +
 1 file changed, 1 insertion(+)

diff --git a/toolchain/uClibc/uClibc-snapshot.config b/toolchain/uClibc/uClibc-snapshot.config
index eb39df6..71fa472 100644
--- a/toolchain/uClibc/uClibc-snapshot.config
+++ b/toolchain/uClibc/uClibc-snapshot.config
@@ -93,6 +93,7 @@ LDSO_PRELOAD_ENV_SUPPORT=y
 # LDSO_PRELINK_SUPPORT is not set
 # UCLIBC_STATIC_LDCONFIG is not set
 LDSO_RUNPATH=y
+LDSO_SAFE_RUNPATH=y
 LDSO_SEARCH_INTERP_PATH=y
 LDSO_LD_LIBRARY_PATH=y
 # LDSO_NO_CLEANUP is not set
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 4/6] xtensa: add support for the Xtensa architecture
  2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
                   ` (2 preceding siblings ...)
  2012-11-15 13:53 ` [Buildroot] [PATCH 3/6] uClibc: update uClibc-snapshot.config to recent uClibcs Thomas Petazzoni
@ 2012-11-15 13:53 ` Thomas Petazzoni
  2012-11-15 13:53 ` [Buildroot] [PATCH 5/6] xtensa: support configurable processor configurations Thomas Petazzoni
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:53 UTC (permalink / raw)
  To: buildroot

From: Chris Zankel <chris@zankel.net>

The Xtensa architecture had been removed because it required special
handling and depended on additional directories and files that became
obsolete over time. This change is more aligned to other architectures.

[Thomas: rebased on top of the "arch: improve definition of gcc mtune,
mcpu, etc." patch].

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/Config.in                            |   11 +++++++++++
 arch/Config.in.xtensa                     |    2 ++
 linux/Config.in                           |    3 ++-
 package/ltrace/Config.in                  |    1 +
 toolchain/Config.in                       |    2 +-
 toolchain/toolchain-buildroot/Config.in.2 |    4 +++-
 toolchain/toolchain-common.in             |    2 +-
 toolchain/uClibc/Config.in                |    5 +++--
 toolchain/uClibc/uclibc.mk                |    1 +
 9 files changed, 25 insertions(+), 6 deletions(-)
 create mode 100644 arch/Config.in.xtensa

diff --git a/arch/Config.in b/arch/Config.in
index b326cb5..472b10c 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -145,6 +145,13 @@ config BR2_x86_64
 	  architecture compatible microprocessor).
 	  http://en.wikipedia.org/wiki/X86_64
 
+config BR2_xtensa
+	bool "Xtensa"
+	help
+	  Xtensa is a Tensilica processor IP architecture.
+	  http://en.wikipedia.org/wiki/Xtensa
+	  http://www.tensilica.com/
+
 endchoice
 
 # The following string values are defined by the individual
@@ -210,3 +217,7 @@ endif
 if BR2_i386 || BR2_x86_64
 source "arch/Config.in.x86"
 endif
+
+if BR2_xtensa
+source "arch/Config.in.xtensa"
+endif
diff --git a/arch/Config.in.xtensa b/arch/Config.in.xtensa
new file mode 100644
index 0000000..66749ee
--- /dev/null
+++ b/arch/Config.in.xtensa
@@ -0,0 +1,2 @@
+config BR2_ARCH
+	default "xtensa"	if BR2_xtensa
diff --git a/linux/Config.in b/linux/Config.in
index 277ef0e..29a2110 100644
--- a/linux/Config.in
+++ b/linux/Config.in
@@ -152,7 +152,8 @@ config BR2_LINUX_KERNEL_BZIMAGE
 
 config BR2_LINUX_KERNEL_ZIMAGE
 	bool "zImage"
-	depends on BR2_arm || BR2_armeb || BR2_powerpc || BR2_sparc || BR2_sh || BR2_sh64
+	depends on BR2_arm || BR2_armeb || BR2_powerpc || BR2_sparc || \
+		   BR2_sh || BR2_sh64 || BR2_xtensa
 
 config BR2_LINUX_KERNEL_APPENDED_ZIMAGE
 	bool "zImage with appended DT"
diff --git a/package/ltrace/Config.in b/package/ltrace/Config.in
index a65ca48..4cce767 100644
--- a/package/ltrace/Config.in
+++ b/package/ltrace/Config.in
@@ -1,6 +1,7 @@
 config BR2_PACKAGE_LTRACE
 	bool "ltrace"
 	depends on !(BR2_avr32 || BR2_mips || BR2_mipsel || BR2_sh || BR2_sh64)
+	depends on !BR2_xtensa
 	select BR2_PACKAGE_LIBELF
 	help
 	  Debugging program which runs a specified command until it exits.
diff --git a/toolchain/Config.in b/toolchain/Config.in
index 29ed2f0..7edf82b 100644
--- a/toolchain/Config.in
+++ b/toolchain/Config.in
@@ -23,7 +23,7 @@ config BR2_TOOLCHAIN_EXTERNAL
 
 config BR2_TOOLCHAIN_CTNG
 	bool "Crosstool-NG toolchain"
-	depends on !BR2_microblaze && !BR2_aarch64
+	depends on !BR2_microblaze && !BR2_aarch64 && !BR2_xtensa
 	select BR2_TOOLCHAIN_HAS_SHADOW_PASSWORDS
 	select BR2_TOOLCHAIN_HAS_THREADS_DEBUG_IF_NEEDED
 	help
diff --git a/toolchain/toolchain-buildroot/Config.in.2 b/toolchain/toolchain-buildroot/Config.in.2
index 956ec2f..d27c9f3 100644
--- a/toolchain/toolchain-buildroot/Config.in.2
+++ b/toolchain/toolchain-buildroot/Config.in.2
@@ -68,7 +68,7 @@ config BR2_TOOLCHAIN_BUILDROOT_USE_SSP
 
 choice
 	prompt "Thread library implementation"
-	default BR2_PTHREADS_NATIVE if (!BR2_UCLIBC_VERSION_0_9_31) && !BR2_ARM_OABI
+	default BR2_PTHREADS_NATIVE if (!BR2_UCLIBC_VERSION_0_9_31) && !BR2_ARM_OABI && !BR2_xtensa
 	default BR2_PTHREADS_OLD
 	help
 	  Use this option to select the thread library implementation
@@ -82,6 +82,7 @@ choice
 
 	config BR2_PTHREADS
 		bool "linuxthreads"
+		depends on !BR2_xtensa
 	        select BR2_TOOLCHAIN_HAS_THREADS
 
 	config BR2_PTHREADS_OLD
@@ -94,6 +95,7 @@ choice
 		depends on !BR2_UCLIBC_VERSION_0_9_31
 		depends on !BR2_ARM_OABI
 		depends on !BR2_x86_i386
+		depends on !BR2_xtensa
 endchoice
 
 source "toolchain/elf2flt/Config.in"
diff --git a/toolchain/toolchain-common.in b/toolchain/toolchain-common.in
index 4c2a28b..9f11a39 100644
--- a/toolchain/toolchain-common.in
+++ b/toolchain/toolchain-common.in
@@ -93,7 +93,7 @@ config BR2_NEEDS_GETTEXT_IF_LOCALE
 	default y if (BR2_NEEDS_GETTEXT && BR2_ENABLE_LOCALE)
 
 config BR2_USE_MMU
-	bool "Enable MMU support" if BR2_arm || BR2_armeb || BR2_mips || BR2_mipsel || BR2_sh
+	bool "Enable MMU support" if BR2_arm || BR2_armeb || BR2_mips || BR2_mipsel || BR2_sh || BR2_xtensa
 	default y if !BR2_bfin
 	help
 	  If your target has a MMU, you should say Y here.  If you
diff --git a/toolchain/uClibc/Config.in b/toolchain/uClibc/Config.in
index f46a415..e47bc9b 100644
--- a/toolchain/uClibc/Config.in
+++ b/toolchain/uClibc/Config.in
@@ -12,14 +12,15 @@ choice
 
 	config BR2_UCLIBC_VERSION_0_9_31
 		bool "uClibc 0.9.31.x"
+		depends on !BR2_xtensa
 
 	config BR2_UCLIBC_VERSION_0_9_32
 		bool "uClibc 0.9.32.x"
-		depends on !(BR2_avr32 || BR2_sh)
+		depends on !(BR2_avr32 || BR2_sh || BR2_xtensa)
 
 	config BR2_UCLIBC_VERSION_0_9_33
 		bool "uClibc 0.9.33.x"
-		depends on !BR2_avr32
+		depends on !(BR2_avr32 || BR2_xtensa)
 
 	config BR2_UCLIBC_VERSION_SNAPSHOT
 		bool "daily snapshot"
diff --git a/toolchain/uClibc/uclibc.mk b/toolchain/uClibc/uclibc.mk
index 8cf59bc..055267c 100644
--- a/toolchain/uClibc/uclibc.mk
+++ b/toolchain/uClibc/uclibc.mk
@@ -38,6 +38,7 @@ UCLIBC_TARGET_ARCH:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
 		-e 's/sh[234].*/sh/' \
 		-e 's/mips.*/mips/' \
 		-e 's/cris.*/cris/' \
+		-e 's/xtensa.*/xtensa/' \
 ")
 
 UCLIBC_TARGET_ENDIAN:=$(call qstrip,$(BR2_ENDIAN))
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 5/6] xtensa: support configurable processor configurations
  2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
                   ` (3 preceding siblings ...)
  2012-11-15 13:53 ` [Buildroot] [PATCH 4/6] xtensa: add support for the Xtensa architecture Thomas Petazzoni
@ 2012-11-15 13:53 ` Thomas Petazzoni
  2012-11-15 13:53 ` [Buildroot] [PATCH 6/6] arch: Config.in string configuration options must be quoted Thomas Petazzoni
  2012-11-15 15:40 ` [Buildroot] [pull request] Pull request for branch xtensa Peter Korsgaard
  6 siblings, 0 replies; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:53 UTC (permalink / raw)
  To: buildroot

From: Chris Zankel <chris@zankel.net>

Xtensa is a configurable processor architecture, which allows to define
additional instructions and registers. The required variant specific
information for the toolchain is delivered in an 'overlay' file, which
needs to be 'untarred' to the corresponding directories after the
source is installed and patched.
This patch provides support for binutils, gcc, and gdb with a very
limited changes to the build scripts. These additions are only executed
for the Xtensa architecture and have no effect on other architectures.

[Thomas: rebased on top of the 'arch: improve definition of gcc mtune,
mcpu, etc.' patch, and changed 'Target ABI' to 'Target Architecture
Variant'].

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/Config.in.xtensa           |   31 +++++++++++++++++++++++++++++++
 package/binutils/binutils.mk    |    9 +++++++++
 toolchain/gcc/gcc-uclibc-4.x.mk |    4 ++++
 toolchain/gdb/gdb.mk            |    4 ++++
 4 files changed, 48 insertions(+)

diff --git a/arch/Config.in.xtensa b/arch/Config.in.xtensa
index 66749ee..af66125 100644
--- a/arch/Config.in.xtensa
+++ b/arch/Config.in.xtensa
@@ -1,2 +1,33 @@
+choice
+	prompt "Target Architecture Variant"
+	depends on BR2_xtensa
+	default BR2_xtensa_fsf
+config BR2_xtensa_custom
+	bool "Custom Xtensa processor configuration"
+config BR2_xtensa_fsf
+	bool "fsf - Default configuration"
+endchoice
+
+config BR2_xtensa_custom_name
+	string "Custom Xtensa processor configuration anme"
+	depends on BR2_xtensa_custom
+	default ""
+	help
+	  Name given to a custom Xtensa processor configuration.
+
+config BR2_xtensa_core_name
+	string
+	default BR2_xtensa_custom_name	if BR2_xtensa_custom
+	default ""			if BR2_xtensa_fsf
+
+config BR2_xtensa_overlay_dir
+	string "Overlay directory for custom configuration"
+	depends on BR2_xtensa_custom
+	default ""
+	help
+	  Provide a directory path that contains the overlay files
+	  for the custom configuration. The path is based on the
+	  buildroot top directory.
+
 config BR2_ARCH
 	default "xtensa"	if BR2_xtensa
diff --git a/package/binutils/binutils.mk b/package/binutils/binutils.mk
index 6c51fc7..82f8fd2 100644
--- a/package/binutils/binutils.mk
+++ b/package/binutils/binutils.mk
@@ -68,5 +68,14 @@ define BINUTILS_INSTALL_TARGET_CMDS
 endef
 endif
 
+XTENSA_CORE_NAME = $(call qstrip, $(BR2_xtensa_core_name))
+ifneq ($(XTENSA_CORE_NAME),)
+define BINUTILS_XTENSA_PRE_PATCH
+	tar xf $(BR2_xtensa_overlay_dir)/xtensa_$(XTENSA_CORE_NAME).tar \
+		-C $(@D) bfd include ld
+endef
+HOST_BINUTILS_PRE_PATCH_HOOKS += BINUTILS_XTENSA_PRE_PATCH
+endif
+
 $(eval $(autotools-package))
 $(eval $(host-autotools-package))
diff --git a/toolchain/gcc/gcc-uclibc-4.x.mk b/toolchain/gcc/gcc-uclibc-4.x.mk
index 1a075cc..1710070 100644
--- a/toolchain/gcc/gcc-uclibc-4.x.mk
+++ b/toolchain/gcc/gcc-uclibc-4.x.mk
@@ -251,6 +251,10 @@ $(GCC_DIR)/.unpacked: $(DL_DIR)/$(GCC_SOURCE)
 	rm -rf $(GCC_DIR)
 	$(GCC_CAT) $(DL_DIR)/$(GCC_SOURCE) | tar -C $(TOOLCHAIN_DIR) $(TAR_OPTIONS) -
 	$(call CONFIG_UPDATE,$(@D))
+ifneq ($(call qstrip, $(BR2_xtensa_core_name)),)
+	tar xf $(BR2_xtensa_overlay_dir)/xtensa_$(call qstrip,\
+		$(BR2_xtensa_core_name)).tar -C $(@D) include
+endif
 	touch $@
 
 gcc-patched: $(GCC_DIR)/.patched
diff --git a/toolchain/gdb/gdb.mk b/toolchain/gdb/gdb.mk
index 6b029a8..dc305a6 100644
--- a/toolchain/gdb/gdb.mk
+++ b/toolchain/gdb/gdb.mk
@@ -25,6 +25,10 @@ gdb-unpacked: $(GDB_DIR)/.unpacked
 $(GDB_DIR)/.unpacked: $(DL_DIR)/$(GDB_SOURCE)
 	mkdir -p $(GDB_DIR)
 	$(GDB_CAT) $(DL_DIR)/$(GDB_SOURCE) | tar -C $(GDB_DIR) $(TAR_STRIP_COMPONENTS)=1 $(TAR_OPTIONS) -
+ifneq ($(call qstrip, $(BR2_xtensa_core_name)),)
+	tar xf $(BR2_xtensa_overlay_dir)/xtensa_$(call qstrip, \
+		$(BR2_xtensa_core_name)).tar -C $(@D) bfd include gdb
+endif
 ifneq ($(wildcard $(GDB_PATCH_DIR)),)
 	support/scripts/apply-patches.sh $(GDB_DIR) $(GDB_PATCH_DIR) \*.patch
 endif
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 6/6] arch: Config.in string configuration options must be quoted
  2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
                   ` (4 preceding siblings ...)
  2012-11-15 13:53 ` [Buildroot] [PATCH 5/6] xtensa: support configurable processor configurations Thomas Petazzoni
@ 2012-11-15 13:53 ` Thomas Petazzoni
  2012-11-15 14:45   ` Yann E. MORIN
  2012-11-15 15:40 ` [Buildroot] [pull request] Pull request for branch xtensa Peter Korsgaard
  6 siblings, 1 reply; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 13:53 UTC (permalink / raw)
  To: buildroot

Suggested by Yann E. Morin.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/Config.in.arm     |   78 +++++++++++++++++------------------
 arch/Config.in.m68k    |   24 +++++------
 arch/Config.in.mips    |   22 +++++-----
 arch/Config.in.powerpc |   70 ++++++++++++++++----------------
 arch/Config.in.sparc   |   42 +++++++++----------
 arch/Config.in.x86     |  106 ++++++++++++++++++++++++------------------------
 6 files changed, 171 insertions(+), 171 deletions(-)

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 2acedc4..6e5d258 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -69,46 +69,46 @@ config BR2_ENDIAN
 	default "BIG"	 if BR2_armeb
 
 config BR2_GCC_TARGET_TUNE
-	default arm600		if BR2_arm600
-	default arm610		if BR2_arm610
-	default arm620		if BR2_arm620
-	default arm7tdmi	if BR2_arm7tdmi
-	default arm7tdmi	if BR2_arm720t
-	default arm7tdmi	if BR2_arm740t
-	default arm920		if BR2_arm920
-	default arm920t		if BR2_arm920t
-	default arm922t		if BR2_arm922t
-	default arm926ej-s	if BR2_arm926t
-	default arm1136j-s	if BR2_arm1136j_s
-	default arm1136jf-s	if BR2_arm1136jf_s
-	default arm1176jz-s	if BR2_arm1176jz_s
-	default arm1176jzf-s	if BR2_arm1176jzf_s
-	default cortex-a8	if BR2_cortex_a8
-	default cortex-a9	if BR2_cortex_a9
-	default strongarm110	if BR2_sa110
-	default strongarm1100	if BR2_sa1100
-	default xscale		if BR2_xscale
-	default iwmmxt		if BR2_iwmmxt
+	default "arm600"	if BR2_arm600
+	default "arm610"	if BR2_arm610
+	default "arm620"	if BR2_arm620
+	default "arm7tdmi"	if BR2_arm7tdmi
+	default "arm7tdmi"	if BR2_arm720t
+	default "arm7tdmi"	if BR2_arm740t
+	default "arm920"	if BR2_arm920
+	default "arm920t"	if BR2_arm920t
+	default "arm922t"	if BR2_arm922t
+	default "arm926ej-s"	if BR2_arm926t
+	default "arm1136j-s"	if BR2_arm1136j_s
+	default "arm1136jf-s"	if BR2_arm1136jf_s
+	default "arm1176jz-s"	if BR2_arm1176jz_s
+	default "arm1176jzf-s"	if BR2_arm1176jzf_s
+	default "cortex-a8"	if BR2_cortex_a8
+	default "cortex-a9"	if BR2_cortex_a9
+	default "strongarm110"	if BR2_sa110
+	default "strongarm1100"	if BR2_sa1100
+	default "xscale"	if BR2_xscale
+	default "iwmmxt"	if BR2_iwmmxt
 
 config BR2_GCC_TARGET_ARCH
-	default armv4t		if BR2_arm7tdmi
-	default armv3		if BR2_arm610
-	default armv3		if BR2_arm710
-	default armv4t		if BR2_arm720t
-	default armv4t		if BR2_arm920t
-	default armv4t		if BR2_arm922t
-	default armv5te		if BR2_arm926t
-	default armv5t		if BR2_arm10t
-	default armv6j		if BR2_arm1136jf_s
-	default armv6zk		if BR2_arm1176jz_s
-	default armv6zk		if BR2_arm1176jzf_s
-	default armv7-a		if BR2_cortex_a8
-	default armv7-a		if BR2_cortex_a9
-	default armv4		if BR2_sa110
-	default armv4		if BR2_sa1100
-	default armv5te		if BR2_xscale
-	default iwmmxt		if BR2_iwmmxt
+	default "armv4t"	if BR2_arm7tdmi
+	default "armv3"		if BR2_arm610
+	default "armv3"		if BR2_arm710
+	default "armv4t"	if BR2_arm720t
+	default "armv4t"	if BR2_arm920t
+	default "armv4t"	if BR2_arm922t
+	default "armv5te"	if BR2_arm926t
+	default "armv5t"	if BR2_arm10t
+	default "armv6j"	if BR2_arm1136jf_s
+	default "armv6zk"	if BR2_arm1176jz_s
+	default "armv6zk"	if BR2_arm1176jzf_s
+	default "armv7-a"	if BR2_cortex_a8
+	default "armv7-a"	if BR2_cortex_a9
+	default "armv4"		if BR2_sa110
+	default "armv4"		if BR2_sa1100
+	default "armv5te"	if BR2_xscale
+	default "iwmmxt"	if BR2_iwmmxt
 
 config BR2_GCC_TARGET_ABI
-	default apcs-gnu	if BR2_ARM_OABI
-	default aapcs-linux	if BR2_ARM_EABI
+	default "apcs-gnu"	if BR2_ARM_OABI
+	default "aapcs-linux"	if BR2_ARM_EABI
diff --git a/arch/Config.in.m68k b/arch/Config.in.m68k
index b3d95b7..ba6cedf 100644
--- a/arch/Config.in.m68k
+++ b/arch/Config.in.m68k
@@ -5,17 +5,17 @@ config BR2_ENDIAN
 	default "BIG"
 
 config BR2_GCC_TARGET_TUNE
-	default 68000		if BR2_m68k_68000
-	default 68010		if BR2_m68k_68010
-	default 68020		if BR2_m68k_68020
-	default 68030		if BR2_m68k_68030
-	default 68040		if BR2_m68k_68040
-	default 68060		if BR2_m68k_68060
+	default "68000"		if BR2_m68k_68000
+	default "68010"		if BR2_m68k_68010
+	default "68020"		if BR2_m68k_68020
+	default "68030"		if BR2_m68k_68030
+	default "68040"		if BR2_m68k_68040
+	default "68060"		if BR2_m68k_68060
 
 config BR2_GCC_TARGET_ARCH
-	default 68000		if BR2_m68k_68000
-	default 68010		if BR2_m68k_68010
-	default 68020		if BR2_m68k_68020
-	default 68030		if BR2_m68k_68030
-	default 68040		if BR2_m68k_68040
-	default 68060		if BR2_m68k_68060
+	default "68000"		if BR2_m68k_68000
+	default "68010"		if BR2_m68k_68010
+	default "68020"		if BR2_m68k_68020
+	default "68030"		if BR2_m68k_68030
+	default "68040"		if BR2_m68k_68040
+	default "68060"		if BR2_m68k_68060
diff --git a/arch/Config.in.mips b/arch/Config.in.mips
index c71c3f4..1454fb4 100644
--- a/arch/Config.in.mips
+++ b/arch/Config.in.mips
@@ -63,16 +63,16 @@ config BR2_ENDIAN
 	default "BIG" 	    	if BR2_mips || BR2_mips64
 
 config BR2_GCC_TARGET_TUNE
-	default mips1		if BR2_mips_1
-	default mips2		if BR2_mips_2
-	default mips3		if BR2_mips_3
-	default mips4		if BR2_mips_4
-	default mips32		if BR2_mips_32
-	default mips32r2	if BR2_mips_32r2
-	default mips64		if BR2_mips_64
-	default mips64r2	if BR2_mips_64r2
+	default "mips1"		if BR2_mips_1
+	default "mips2"		if BR2_mips_2
+	default "mips3"		if BR2_mips_3
+	default "mips4"		if BR2_mips_4
+	default "mips32"	if BR2_mips_32
+	default "mips32r2"	if BR2_mips_32r2
+	default "mips64"	if BR2_mips_64
+	default "mips64r2"	if BR2_mips_64r2
 
 config BR2_GCC_TARGET_ABI
-	default 32		if BR2_MIPS_OABI32
-	default n32		if BR2_MIPS_NABI32
-	default 64		if BR2_MIPS_NABI64
+	default "32"		if BR2_MIPS_OABI32
+	default "n32"		if BR2_MIPS_NABI32
+	default "64"		if BR2_MIPS_NABI64
diff --git a/arch/Config.in.powerpc b/arch/Config.in.powerpc
index 55c1651..693246b 100644
--- a/arch/Config.in.powerpc
+++ b/arch/Config.in.powerpc
@@ -89,40 +89,40 @@ config BR2_ENDIAN
 	default "BIG"
 
 config BR2_GCC_TARGET_TUNE
-	default 401		if BR2_powerpc_401
-	default 403		if BR2_powerpc_403
-	default 405		if BR2_powerpc_405
-	default 405fp		if BR2_powerpc_405fp
-	default 440		if BR2_powerpc_440
-	default 440fp		if BR2_powerpc_440fp
-	default 505		if BR2_powerpc_505
-	default 601		if BR2_powerpc_601
-	default 602		if BR2_powerpc_602
-	default 603		if BR2_powerpc_603
-	default 603e		if BR2_powerpc_603e
-	default 604		if BR2_powerpc_604
-	default 604e		if BR2_powerpc_604e
-	default 620		if BR2_powerpc_620
-	default 630		if BR2_powerpc_630
-	default 740		if BR2_powerpc_740
-	default 7400		if BR2_powerpc_7400
-	default 7450		if BR2_powerpc_7450
-	default 750		if BR2_powerpc_750
-	default 801		if BR2_powerpc_801
-	default 821		if BR2_powerpc_821
-	default 823		if BR2_powerpc_823
-	default 860		if BR2_powerpc_860
-	default 970		if BR2_powerpc_970
-	default 8540		if BR2_powerpc_8540
-	default	8548		if BR2_powerpc_8548
-	default e300c2		if BR2_powerpc_e300c2
-	default e300c3		if BR2_powerpc_e300c3
-	default e500mc		if BR2_powerpc_e500mc
+	default "401"		if BR2_powerpc_401
+	default "403"		if BR2_powerpc_403
+	default "405"		if BR2_powerpc_405
+	default "405fp"		if BR2_powerpc_405fp
+	default "440"		if BR2_powerpc_440
+	default "440fp"		if BR2_powerpc_440fp
+	default "505"		if BR2_powerpc_505
+	default "601"		if BR2_powerpc_601
+	default "602"		if BR2_powerpc_602
+	default "603"		if BR2_powerpc_603
+	default "603e"		if BR2_powerpc_603e
+	default "604"		if BR2_powerpc_604
+	default "604e"		if BR2_powerpc_604e
+	default "620"		if BR2_powerpc_620
+	default "630"		if BR2_powerpc_630
+	default "740"		if BR2_powerpc_740
+	default "7400"		if BR2_powerpc_7400
+	default "7450"		if BR2_powerpc_7450
+	default "750"		if BR2_powerpc_750
+	default "801"		if BR2_powerpc_801
+	default "821"		if BR2_powerpc_821
+	default "823"		if BR2_powerpc_823
+	default "860"		if BR2_powerpc_860
+	default "970"		if BR2_powerpc_970
+	default "8540"		if BR2_powerpc_8540
+	default	"8548"		if BR2_powerpc_8548
+	default "e300c2"	if BR2_powerpc_e300c2
+	default "e300c3"	if BR2_powerpc_e300c3
+	default "e500mc"	if BR2_powerpc_e500mc
 
 config BR2_GCC_TARGET_ABI
-	default altivec		if BR2_PPC_ABI_altivec
-	default no-altivec	if BR2_PPC_ABI_no-altivec
-	default spe		if BR2_PPC_ABI_spe
-	default no-spe		if BR2_PPC_ABI_no-spe
-	default ibmlongdouble	if BR2_PPC_ABI_ibmlongdouble
-	default ieeelongdouble	if BR2_PPC_ABI_ieeelongdouble
+	default "altivec"		if BR2_PPC_ABI_altivec
+	default "no-altivec"		if BR2_PPC_ABI_no-altivec
+	default "spe"			if BR2_PPC_ABI_spe
+	default "no-spe"		if BR2_PPC_ABI_no-spe
+	default "ibmlongdouble"		if BR2_PPC_ABI_ibmlongdouble
+	default "ieeelongdouble"	if BR2_PPC_ABI_ieeelongdouble
diff --git a/arch/Config.in.sparc b/arch/Config.in.sparc
index d810b75..e1f72cc 100644
--- a/arch/Config.in.sparc
+++ b/arch/Config.in.sparc
@@ -44,26 +44,26 @@ config BR2_ENDIAN
 	default "BIG"
 
 config BR2_GCC_TARGET_TUNE
-	default v7		if BR2_sparc_v7
-	default cypress		if BR2_sparc_cypress
-	default v8		if BR2_sparc_v8
-	default supersparc	if BR2_sparc_supersparc
-	default hypersparc	if BR2_sparc_hypersparc
-	default sparclite	if BR2_sparc_sparclite
-	default f930		if BR2_sparc_f930
-	default f934		if BR2_sparc_f934
-	default sparclite86x	if BR2_sparc_sparclite86x
-	default sparclet	if BR2_sparc_sparclet
-	default tsc701		if BR2_sparc_tsc701
-	default v9		if BR2_sparc_v9
-	default v9		if BR2_sparc_v9a
-	default v9		if BR2_sparc_v9b
-	default ultrasparc	if BR2_sparc_ultrasparc
-	default ultrasparc3	if BR2_sparc_ultrasparc3
-	default niagara		if BR2_sparc_niagara
+	default "v7"		if BR2_sparc_v7
+	default "cypress"	if BR2_sparc_cypress
+	default "v8"		if BR2_sparc_v8
+	default "supersparc"	if BR2_sparc_supersparc
+	default "hypersparc"	if BR2_sparc_hypersparc
+	default "sparclite"	if BR2_sparc_sparclite
+	default "f930"		if BR2_sparc_f930
+	default "f934"		if BR2_sparc_f934
+	default "sparclite86x"	if BR2_sparc_sparclite86x
+	default "sparclet"	if BR2_sparc_sparclet
+	default "tsc701"	if BR2_sparc_tsc701
+	default "v9"		if BR2_sparc_v9
+	default "v9"		if BR2_sparc_v9a
+	default "v9"		if BR2_sparc_v9b
+	default "ultrasparc"	if BR2_sparc_ultrasparc
+	default "ultrasparc3"	if BR2_sparc_ultrasparc3
+	default "niagara"	if BR2_sparc_niagara
 
 config BR2_GCC_TARGET_CPU
-	default sparchfleon	if BR2_sparc_sparchfleon
-	default sparchfleonv8	if BR2_sparc_sparchfleonv8
-	default sparcsfleon	if BR2_sparc_sparcsfleon
-	default sparcsfleonv8	if BR2_sparc_sparcsfleonv8
+	default "sparchfleon"	if BR2_sparc_sparchfleon
+	default "sparchfleonv8"	if BR2_sparc_sparchfleonv8
+	default "sparcsfleon"	if BR2_sparc_sparcsfleon
+	default "sparcsfleonv8"	if BR2_sparc_sparcsfleonv8
diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
index ef29a71..d2e0807 100644
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -178,58 +178,58 @@ config BR2_ENDIAN
 	default "LITTLE"
 
 config BR2_GCC_TARGET_TUNE
-	default i386		if BR2_x86_i386
-	default i486		if BR2_x86_i486
-	default i586		if BR2_x86_i586
-	default pentium-mmx	if BR2_x86_pentium_mmx
-	default i686		if BR2_x86_i686
-	default pentiumpro	if BR2_x86_pentiumpro
-	default pentium-m	if BR2_x86_pentium_m
-	default pentium2	if BR2_x86_pentium2
-	default pentium3	if BR2_x86_pentium3
-	default pentium4	if BR2_x86_pentium4
-	default prescott	if BR2_x86_prescott
-	default nocona		if BR2_x86_nocona
-	default core2		if BR2_x86_core2
-	default atom		if BR2_x86_atom
-	default k8		if BR2_x86_opteron
-	default k8-sse3		if BR2_x86_opteron_sse3
-	default barcelona	if BR2_x86_barcelona
-	default k6		if BR2_x86_k6
-	default k6-2		if BR2_x86_k6_2
-	default athlon		if BR2_x86_athlon
-	default athlon-4	if BR2_x86_athlon_4
-	default winchip-c6	if BR2_x86_winchip_c6
-	default winchip2	if BR2_x86_winchip2
-	default c3		if BR2_x86_c3
-	default c3-2		if BR2_x86_c32
-	default geode		if BR2_x86_geode
-	default generic		if BR2_x86_generic
+	default "i386"		if BR2_x86_i386
+	default "i486"		if BR2_x86_i486
+	default "i586"		if BR2_x86_i586
+	default "pentium-mmx"	if BR2_x86_pentium_mmx
+	default "i686"		if BR2_x86_i686
+	default "pentiumpro"	if BR2_x86_pentiumpro
+	default "pentium-m"	if BR2_x86_pentium_m
+	default "pentium2"	if BR2_x86_pentium2
+	default "pentium3"	if BR2_x86_pentium3
+	default "pentium4"	if BR2_x86_pentium4
+	default "prescott"	if BR2_x86_prescott
+	default "nocona"	if BR2_x86_nocona
+	default "core2"		if BR2_x86_core2
+	default "atom"		if BR2_x86_atom
+	default "k8"		if BR2_x86_opteron
+	default "k8-sse3"	if BR2_x86_opteron_sse3
+	default "barcelona"	if BR2_x86_barcelona
+	default "k6"		if BR2_x86_k6
+	default "k6-2"		if BR2_x86_k6_2
+	default "athlon"	if BR2_x86_athlon
+	default "athlon-4"	if BR2_x86_athlon_4
+	default "winchip-c6"	if BR2_x86_winchip_c6
+	default "winchip2"	if BR2_x86_winchip2
+	default "c3"		if BR2_x86_c3
+	default "c3-2"		if BR2_x86_c32
+	default "geode"		if BR2_x86_geode
+	default "generic"	if BR2_x86_generic
 
 config BR2_GCC_TARGET_ARCH
-	default i386		if BR2_x86_i386
-	default i486		if BR2_x86_i486
-	default i586		if BR2_x86_i586
-	default pentium-mmx	if BR2_x86_pentium_mmx
-	default i686		if BR2_x86_i686
-	default pentiumpro	if BR2_x86_pentiumpro
-	default pentium-m	if BR2_x86_pentium_m
-	default pentium2	if BR2_x86_pentium2
-	default pentium3	if BR2_x86_pentium3
-	default pentium4	if BR2_x86_pentium4
-	default prescott	if BR2_x86_prescott
-	default nocona		if BR2_x86_nocona
-	default core2		if BR2_x86_core2
-	default atom		if BR2_x86_atom
-	default k8		if BR2_x86_opteron
-	default k8-sse3		if BR2_x86_opteron_sse3
-	default barcelona	if BR2_x86_barcelona
-	default k6		if BR2_x86_k6
-	default k6-2		if BR2_x86_k6_2
-	default athlon		if BR2_x86_athlon
-	default athlon-4	if BR2_x86_athlon_4
-	default winchip-c6	if BR2_x86_winchip_c6
-	default winchip2	if BR2_x86_winchip2
-	default c3		if BR2_x86_c3
-	default c3-2		if BR2_x86_c32
-	default geode		if BR2_x86_geode
+	default "i386"		if BR2_x86_i386
+	default "i486"		if BR2_x86_i486
+	default "i586"		if BR2_x86_i586
+	default "pentium-mmx"	if BR2_x86_pentium_mmx
+	default "i686"		if BR2_x86_i686
+	default "pentiumpro"	if BR2_x86_pentiumpro
+	default "pentium-m"	if BR2_x86_pentium_m
+	default "pentium2"	if BR2_x86_pentium2
+	default "pentium3"	if BR2_x86_pentium3
+	default "pentium4"	if BR2_x86_pentium4
+	default "prescott"	if BR2_x86_prescott
+	default "nocona"	if BR2_x86_nocona
+	default "core2"		if BR2_x86_core2
+	default "atom"		if BR2_x86_atom
+	default "k8"		if BR2_x86_opteron
+	default "k8-sse3"	if BR2_x86_opteron_sse3
+	default "barcelona"	if BR2_x86_barcelona
+	default "k6"		if BR2_x86_k6
+	default "k6-2"		if BR2_x86_k6_2
+	default "athlon"	if BR2_x86_athlon
+	default "athlon-4"	if BR2_x86_athlon_4
+	default "winchip-c6"	if BR2_x86_winchip_c6
+	default "winchip2"	if BR2_x86_winchip2
+	default "c3"		if BR2_x86_c3
+	default "c3-2"		if BR2_x86_c32
+	default "geode"		if BR2_x86_geode
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 1/6] arch: improve definition of gcc mtune, mcpu, etc.
  2012-11-15 13:53 ` [Buildroot] [PATCH 1/6] arch: improve definition of gcc mtune, mcpu, etc Thomas Petazzoni
@ 2012-11-15 14:41   ` Yann E. MORIN
  0 siblings, 0 replies; 13+ messages in thread
From: Yann E. MORIN @ 2012-11-15 14:41 UTC (permalink / raw)
  To: buildroot

Thomas, All,

On Thursday 15 November 2012 14:53:48 Thomas Petazzoni wrote:
> As suggested by Yann E. Morin, there is a better way than our current
> big Config.in.common to define the gcc mtune, mcpu, march,
> etc. values. We can split the setting of those values in each
> architecture file, which makes a lot more sense.
> 
> Therefore, the Config.in file now creates empty kconfig variables
> BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH,
> BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those
> variables are set by the individual Config.in.<arch> files. This is
> possible because such files are now only conditionally included
> depending on the top-level architecture that has been selected.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

You already had it, but here it is again:
Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>

Regards,
Yann E. MORIN.

-- 
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +0/33 662376056 | Software  Designer | \ / CAMPAIGN     |   ^                |
| --==< O_o >==-- '------------.-------:  X  AGAINST      |  /e\  There is no  |
| http://ymorin.is-a-geek.org/ | (*_*) | / \ HTML MAIL    |  """  conspiracy.  |
'------------------------------'-------'------------------'--------------------'

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 6/6] arch: Config.in string configuration options must be quoted
  2012-11-15 13:53 ` [Buildroot] [PATCH 6/6] arch: Config.in string configuration options must be quoted Thomas Petazzoni
@ 2012-11-15 14:45   ` Yann E. MORIN
  0 siblings, 0 replies; 13+ messages in thread
From: Yann E. MORIN @ 2012-11-15 14:45 UTC (permalink / raw)
  To: buildroot

On Thursday 15 November 2012 14:53:53 Thomas Petazzoni wrote:
> Suggested by Yann E. Morin.

In kernel-land, that would be written thus:
Reported-by: "Yann E. MORIN" <yann.morin.1998@free.fr>

;-)

> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>

Regards,
Yann E. MORIN.

-- 
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +0/33 662376056 | Software  Designer | \ / CAMPAIGN     |   ^                |
| --==< O_o >==-- '------------.-------:  X  AGAINST      |  /e\  There is no  |
| http://ymorin.is-a-geek.org/ | (*_*) | / \ HTML MAIL    |  """  conspiracy.  |
'------------------------------'-------'------------------'--------------------'

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [Buildroot] [pull request] Pull request for branch xtensa
  2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
                   ` (5 preceding siblings ...)
  2012-11-15 13:53 ` [Buildroot] [PATCH 6/6] arch: Config.in string configuration options must be quoted Thomas Petazzoni
@ 2012-11-15 15:40 ` Peter Korsgaard
  6 siblings, 0 replies; 13+ messages in thread
From: Peter Korsgaard @ 2012-11-15 15:40 UTC (permalink / raw)
  To: buildroot

>>>>> "Thomas" == Thomas Petazzoni <thomas.petazzoni@free-electrons.com> writes:

 Thomas> Hello,
 Thomas> This version includes an additional patch that quotes the string
 Thomas> configuration options, as suggested by Yann E. Morin.

Committed series, thanks.

-- 
Bye, Peter Korsgaard

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 2/6] uClibc: remove useless linuxthreads-errno-fix patch
  2012-11-15 13:53 ` [Buildroot] [PATCH 2/6] uClibc: remove useless linuxthreads-errno-fix patch Thomas Petazzoni
@ 2012-11-15 15:40   ` Peter Korsgaard
  2012-11-15 16:02     ` Thomas Petazzoni
  0 siblings, 1 reply; 13+ messages in thread
From: Peter Korsgaard @ 2012-11-15 15:40 UTC (permalink / raw)
  To: buildroot

>>>>> "Thomas" == Thomas Petazzoni <thomas.petazzoni@free-electrons.com> writes:

 Thomas> This patch has since a long time been merged upstream in uClibc, so it
 Thomas> cannot apply on any of the recent uClibc snapshots.

I like it how you call my patches useless :P

 Thomas> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 Thomas> ---
 Thomas>  .../uClibc.snapshot.linuxthreads-errno-fix.patch   |   68 --------------------
 Thomas>  1 file changed, 68 deletions(-)
 Thomas>  delete mode 100644 toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch

 Thomas> diff --git a/toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch b/toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch
 Thomas> deleted file mode 100644
 Thomas> index c4d0d00..0000000
 Thomas> --- a/toolchain/uClibc/uClibc.snapshot.linuxthreads-errno-fix.patch
 Thomas> +++ /dev/null
 Thomas> @@ -1,68 +0,0 @@
 Thomas> -From af8b2d71ce37b9d4d24ddbc755cdea68de02949a Mon Sep 17 00:00:00 2001
 Thomas> -From: Peter Korsgaard <jacmet@sunsite.dk>
 Thomas> -Date: Mon, 5 Jul 2010 14:08:17 +0200
 Thomas> -Subject: [PATCH] don't make __errno_location / __h_errno_location hidden

-- 
Bye, Peter Korsgaard

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [Buildroot] [PATCH 2/6] uClibc: remove useless linuxthreads-errno-fix patch
  2012-11-15 15:40   ` Peter Korsgaard
@ 2012-11-15 16:02     ` Thomas Petazzoni
  0 siblings, 0 replies; 13+ messages in thread
From: Thomas Petazzoni @ 2012-11-15 16:02 UTC (permalink / raw)
  To: buildroot


On Thu, 15 Nov 2012 16:40:52 +0100, Peter Korsgaard wrote:
> >>>>> "Thomas" == Thomas Petazzoni <thomas.petazzoni@free-electrons.com> writes:
> 
>  Thomas> This patch has since a long time been merged upstream in uClibc, so it
>  Thomas> cannot apply on any of the recent uClibc snapshots.
> 
> I like it how you call my patches useless :P

Sorry if the wording sounded rude. The patch has been merged upstream
since quite some time, so it has become useless as a separate patch in
Buildroot, but it certainly was useful since it got merged upstream.

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 13+ messages in thread
end of thread, other threads:[~2012-11-15 16:02 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-11-15 13:53 [Buildroot] [pull request] Pull request for branch xtensa Thomas Petazzoni
2012-11-15 13:53 ` [Buildroot] [PATCH 1/6] arch: improve definition of gcc mtune, mcpu, etc Thomas Petazzoni
2012-11-15 14:41   ` Yann E. MORIN
2012-11-15 13:53 ` [Buildroot] [PATCH 2/6] uClibc: remove useless linuxthreads-errno-fix patch Thomas Petazzoni
2012-11-15 15:40   ` Peter Korsgaard
2012-11-15 16:02     ` Thomas Petazzoni
2012-11-15 13:53 ` [Buildroot] [PATCH 3/6] uClibc: update uClibc-snapshot.config to recent uClibcs Thomas Petazzoni
2012-11-15 13:53 ` [Buildroot] [PATCH 4/6] xtensa: add support for the Xtensa architecture Thomas Petazzoni
2012-11-15 13:53 ` [Buildroot] [PATCH 5/6] xtensa: support configurable processor configurations Thomas Petazzoni
2012-11-15 13:53 ` [Buildroot] [PATCH 6/6] arch: Config.in string configuration options must be quoted Thomas Petazzoni
2012-11-15 14:45   ` Yann E. MORIN
2012-11-15 15:40 ` [Buildroot] [pull request] Pull request for branch xtensa Peter Korsgaard
  -- strict thread matches above, loose matches on Subject: below --
2012-11-15 13:30 Thomas Petazzoni

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