From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Leo Yan <leo.yan@linaro.org>, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: Rajendra Nayak <rnayak@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
Sibi Sankar <sibis@codeaurora.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Subject: [PATCHv2 0/2] coresight: Do not default to CPU0 for missing CPU phandle
Date: Fri, 21 Jun 2019 00:01:50 +0530 [thread overview]
Message-ID: <cover.1561054498.git.saiprakash.ranjan@codeaurora.org> (raw)
In case of missing CPU phandle, the affinity is set default to
CPU0 which is not a correct assumption. Fix this in coresight
platform to set affinity to invalid and abort the probe in drivers.
Also update the dt-bindings accordingly.
Patch 2 allows the probe of coresight etm and cpu-debug to abort
earlier in case cpus are not available.
v2:
* Addressed review comments from Suzuki and Mathieu.
* Allows the probe of etm and cpu-debug to abort earlier
in case of unavailability of respective cpus.
Sai Prakash Ranjan (2):
coresight: Do not default to CPU0 for missing CPU phandle
coresight: Abort probe if cpus are not available
Documentation/devicetree/bindings/arm/coresight.txt | 2 +-
drivers/hwtracing/coresight/coresight-cpu-debug.c | 3 +++
drivers/hwtracing/coresight/coresight-etm3x.c | 3 +++
drivers/hwtracing/coresight/coresight-etm4x.c | 3 +++
drivers/hwtracing/coresight/coresight-platform.c | 13 ++++++++-----
5 files changed, 18 insertions(+), 6 deletions(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Leo Yan <leo.yan@linaro.org>, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
Sibi Sankar <sibis@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 0/2] coresight: Do not default to CPU0 for missing CPU phandle
Date: Fri, 21 Jun 2019 00:01:50 +0530 [thread overview]
Message-ID: <cover.1561054498.git.saiprakash.ranjan@codeaurora.org> (raw)
In case of missing CPU phandle, the affinity is set default to
CPU0 which is not a correct assumption. Fix this in coresight
platform to set affinity to invalid and abort the probe in drivers.
Also update the dt-bindings accordingly.
Patch 2 allows the probe of coresight etm and cpu-debug to abort
earlier in case cpus are not available.
v2:
* Addressed review comments from Suzuki and Mathieu.
* Allows the probe of etm and cpu-debug to abort earlier
in case of unavailability of respective cpus.
Sai Prakash Ranjan (2):
coresight: Do not default to CPU0 for missing CPU phandle
coresight: Abort probe if cpus are not available
Documentation/devicetree/bindings/arm/coresight.txt | 2 +-
drivers/hwtracing/coresight/coresight-cpu-debug.c | 3 +++
drivers/hwtracing/coresight/coresight-etm3x.c | 3 +++
drivers/hwtracing/coresight/coresight-etm4x.c | 3 +++
drivers/hwtracing/coresight/coresight-platform.c | 13 ++++++++-----
5 files changed, 18 insertions(+), 6 deletions(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Leo Yan <leo.yan@linaro.org>, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
Sibi Sankar <sibis@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 0/2] coresight: Do not default to CPU0 for missing CPU phandle
Date: Fri, 21 Jun 2019 00:01:50 +0530 [thread overview]
Message-ID: <cover.1561054498.git.saiprakash.ranjan@codeaurora.org> (raw)
In case of missing CPU phandle, the affinity is set default to
CPU0 which is not a correct assumption. Fix this in coresight
platform to set affinity to invalid and abort the probe in drivers.
Also update the dt-bindings accordingly.
Patch 2 allows the probe of coresight etm and cpu-debug to abort
earlier in case cpus are not available.
v2:
* Addressed review comments from Suzuki and Mathieu.
* Allows the probe of etm and cpu-debug to abort earlier
in case of unavailability of respective cpus.
Sai Prakash Ranjan (2):
coresight: Do not default to CPU0 for missing CPU phandle
coresight: Abort probe if cpus are not available
Documentation/devicetree/bindings/arm/coresight.txt | 2 +-
drivers/hwtracing/coresight/coresight-cpu-debug.c | 3 +++
drivers/hwtracing/coresight/coresight-etm3x.c | 3 +++
drivers/hwtracing/coresight/coresight-etm4x.c | 3 +++
drivers/hwtracing/coresight/coresight-platform.c | 13 ++++++++-----
5 files changed, 18 insertions(+), 6 deletions(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next reply other threads:[~2019-06-20 18:32 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-20 18:31 Sai Prakash Ranjan [this message]
2019-06-20 18:31 ` [PATCHv2 0/2] coresight: Do not default to CPU0 for missing CPU phandle Sai Prakash Ranjan
2019-06-20 18:31 ` Sai Prakash Ranjan
2019-06-20 18:31 ` [PATCHv2 1/2] " Sai Prakash Ranjan
2019-06-20 18:31 ` Sai Prakash Ranjan
2019-06-21 9:48 ` Suzuki K Poulose
2019-06-21 9:48 ` Suzuki K Poulose
2019-06-21 10:33 ` Sai Prakash Ranjan
2019-06-21 10:33 ` Sai Prakash Ranjan
2019-06-20 18:31 ` [PATCHv2 2/2] coresight: Abort probe if cpus are not available Sai Prakash Ranjan
2019-06-20 18:31 ` Sai Prakash Ranjan
2019-06-21 9:40 ` Suzuki K Poulose
2019-06-21 9:40 ` Suzuki K Poulose
2019-06-21 10:31 ` Sai Prakash Ranjan
2019-06-21 10:31 ` Sai Prakash Ranjan
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