* [PATCH v2 0/2] arm64: dts: imx8mq: Add DT node for the Mixel MIPI D-PHY @ 2019-07-15 10:43 ` Guido Günther 0 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-15 10:43 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Guido Günther, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Now that the driver is in linux-next as of 20190624 let's have a DT node for the i.MX8MQ and enable it on the Librem 5 devkit. Changes from v1: - Add Acked-by: form Angus, thanks! Guido Günther (2): arm64: dts: imx8mq: Add MIPI D-PHY arm64: dts: imx8mq-librem5: Enable MIPI D-PHY .../boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ 2 files changed, 17 insertions(+) -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2 0/2] arm64: dts: imx8mq: Add DT node for the Mixel MIPI D-PHY @ 2019-07-15 10:43 ` Guido Günther 0 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-15 10:43 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Guido Günther, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Now that the driver is in linux-next as of 20190624 let's have a DT node for the i.MX8MQ and enable it on the Librem 5 devkit. Changes from v1: - Add Acked-by: form Angus, thanks! Guido Günther (2): arm64: dts: imx8mq: Add MIPI D-PHY arm64: dts: imx8mq-librem5: Enable MIPI D-PHY .../boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ 2 files changed, 17 insertions(+) -- 2.20.1 ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY 2019-07-15 10:43 ` Guido Günther @ 2019-07-15 10:43 ` Guido Günther -1 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-15 10:43 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Guido Günther, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Add a node for the Mixel MIPI D-PHY, "disabled" by default. Signed-off-by: Guido Günther <agx@sigxcpu.org> Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index d09b808eff87..891ee7578c2d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -728,6 +728,19 @@ status = "disabled"; }; + dphy: dphy@30a00300 { + compatible = "fsl,imx8mq-mipi-dphy"; + reg = <0x30a00300 0x100>; + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + clock-names = "phy_ref"; + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; + assigned-clock-rates = <24000000>; + #phy-cells = <0>; + power-domains = <&pgc_mipi>; + status = "disabled"; + }; + i2c1: i2c@30a20000 { compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; reg = <0x30a20000 0x10000>; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY @ 2019-07-15 10:43 ` Guido Günther 0 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-15 10:43 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Guido Günther, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Add a node for the Mixel MIPI D-PHY, "disabled" by default. Signed-off-by: Guido Günther <agx@sigxcpu.org> Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index d09b808eff87..891ee7578c2d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -728,6 +728,19 @@ status = "disabled"; }; + dphy: dphy@30a00300 { + compatible = "fsl,imx8mq-mipi-dphy"; + reg = <0x30a00300 0x100>; + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + clock-names = "phy_ref"; + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; + assigned-clock-rates = <24000000>; + #phy-cells = <0>; + power-domains = <&pgc_mipi>; + status = "disabled"; + }; + i2c1: i2c@30a20000 { compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; reg = <0x30a20000 0x10000>; -- 2.20.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY 2019-07-15 10:43 ` Guido Günther @ 2019-07-15 10:55 ` Lucas Stach -1 siblings, 0 replies; 17+ messages in thread From: Lucas Stach @ 2019-07-15 10:55 UTC (permalink / raw) To: Guido Günther, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Angus Ainslie (Purism), Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Am Montag, den 15.07.2019, 12:43 +0200 schrieb Guido Günther: > Add a node for the Mixel MIPI D-PHY, "disabled" by default. > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index d09b808eff87..891ee7578c2d 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -728,6 +728,19 @@ > status = "disabled"; > }; > > + dphy: dphy@30a00300 { > + compatible = "fsl,imx8mq-mipi-dphy"; > + reg = <0x30a00300 0x100>; > + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + clock-names = "phy_ref"; > + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; > + assigned-clock-rates = <24000000>; > + #phy-cells = <0>; > + power-domains = <&pgc_mipi>; > + status = "disabled"; > + }; > + > i2c1: i2c@30a20000 { > compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; > reg = <0x30a20000 0x10000>; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY @ 2019-07-15 10:55 ` Lucas Stach 0 siblings, 0 replies; 17+ messages in thread From: Lucas Stach @ 2019-07-15 10:55 UTC (permalink / raw) To: Guido Günther, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Angus Ainslie (Purism), Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Am Montag, den 15.07.2019, 12:43 +0200 schrieb Guido Günther: > Add a node for the Mixel MIPI D-PHY, "disabled" by default. > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index d09b808eff87..891ee7578c2d 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -728,6 +728,19 @@ > status = "disabled"; > }; > > + dphy: dphy@30a00300 { > + compatible = "fsl,imx8mq-mipi-dphy"; > + reg = <0x30a00300 0x100>; > + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + clock-names = "phy_ref"; > + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; > + assigned-clock-rates = <24000000>; > + #phy-cells = <0>; > + power-domains = <&pgc_mipi>; > + status = "disabled"; > + }; > + > i2c1: i2c@30a20000 { > compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; > reg = <0x30a20000 0x10000>; ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY 2019-07-15 10:43 ` Guido Günther @ 2019-07-15 11:10 ` Abel Vesa -1 siblings, 0 replies; 17+ messages in thread From: Abel Vesa @ 2019-07-15 11:10 UTC (permalink / raw) To: Guido Günther Cc: Mark Rutland, devicetree@vger.kernel.org, Pavel Machek, Anson Huang, Carlo Caione, Andrey Smirnov, Shawn Guo, Sascha Hauer, Angus Ainslie (Purism), linux-kernel@vger.kernel.org, Rob Herring, dl-linux-imx, Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel@lists.infradead.org, Lucas Stach On 19-07-15 12:43:05, Guido Günther wrote: > Add a node for the Mixel MIPI D-PHY, "disabled" by default. > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index d09b808eff87..891ee7578c2d 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -728,6 +728,19 @@ > status = "disabled"; > }; > > + dphy: dphy@30a00300 { > + compatible = "fsl,imx8mq-mipi-dphy"; > + reg = <0x30a00300 0x100>; > + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + clock-names = "phy_ref"; > + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; > + assigned-clock-rates = <24000000>; We have the following in the clk-imx8mq in the vendor tree: clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_BYPASS], clks[IMX8MQ_VIDEO_PLL1]); This unbypasses the video pll 1. And then we also have this: /* config video_pll1 clock */ clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_REF_SEL], clks[IMX8MQ_CLK_27M]); clk_set_rate(clks[IMX8MQ_VIDEO_PLL1], 593999999); But none of that is acceptable upstream since the clock provider should not use clock consumer API. So please update the assigned-clock* properties to something like this: assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, <&clk IMX8MQ_VIDEO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_DSI_PHY_REF>, <&clk IMX8MQ_VIDEO_PLL1>; assigned-clock-parents = <&clk IMX8MQ_CLK_27M>, <&clk IMX8MQ_VIDEO_PLL1>, <&clk IMX8MQ_VIDEO_PLL1_OUT> <0>; assigned-clock-rates = <0>, <0>, <24000000>, <593999999>; I've written this without testing, so please do test it on your setup. > + #phy-cells = <0>; > + power-domains = <&pgc_mipi>; > + status = "disabled"; > + }; > + > i2c1: i2c@30a20000 { > compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; > reg = <0x30a20000 0x10000>; > -- > 2.20.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY @ 2019-07-15 11:10 ` Abel Vesa 0 siblings, 0 replies; 17+ messages in thread From: Abel Vesa @ 2019-07-15 11:10 UTC (permalink / raw) To: Guido Günther Cc: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, dl-linux-imx, Pavel Machek, Angus Ainslie (Purism), Lucas Stach, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org On 19-07-15 12:43:05, Guido Günther wrote: > Add a node for the Mixel MIPI D-PHY, "disabled" by default. > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> > --- > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index d09b808eff87..891ee7578c2d 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -728,6 +728,19 @@ > status = "disabled"; > }; > > + dphy: dphy@30a00300 { > + compatible = "fsl,imx8mq-mipi-dphy"; > + reg = <0x30a00300 0x100>; > + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + clock-names = "phy_ref"; > + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; > + assigned-clock-rates = <24000000>; We have the following in the clk-imx8mq in the vendor tree: clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_BYPASS], clks[IMX8MQ_VIDEO_PLL1]); This unbypasses the video pll 1. And then we also have this: /* config video_pll1 clock */ clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_REF_SEL], clks[IMX8MQ_CLK_27M]); clk_set_rate(clks[IMX8MQ_VIDEO_PLL1], 593999999); But none of that is acceptable upstream since the clock provider should not use clock consumer API. So please update the assigned-clock* properties to something like this: assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, <&clk IMX8MQ_VIDEO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_DSI_PHY_REF>, <&clk IMX8MQ_VIDEO_PLL1>; assigned-clock-parents = <&clk IMX8MQ_CLK_27M>, <&clk IMX8MQ_VIDEO_PLL1>, <&clk IMX8MQ_VIDEO_PLL1_OUT> <0>; assigned-clock-rates = <0>, <0>, <24000000>, <593999999>; I've written this without testing, so please do test it on your setup. > + #phy-cells = <0>; > + power-domains = <&pgc_mipi>; > + status = "disabled"; > + }; > + > i2c1: i2c@30a20000 { > compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; > reg = <0x30a20000 0x10000>; > -- > 2.20.1 > ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY 2019-07-15 11:10 ` Abel Vesa @ 2019-07-21 11:47 ` Guido Günther -1 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-21 11:47 UTC (permalink / raw) To: Abel Vesa Cc: Mark Rutland, devicetree@vger.kernel.org, Pavel Machek, Anson Huang, Carlo Caione, Andrey Smirnov, Shawn Guo, Sascha Hauer, Angus Ainslie (Purism), linux-kernel@vger.kernel.org, Rob Herring, dl-linux-imx, Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel@lists.infradead.org, Lucas Stach Hi Abel, On Mon, Jul 15, 2019 at 11:10:27AM +0000, Abel Vesa wrote: > On 19-07-15 12:43:05, Guido Günther wrote: > > Add a node for the Mixel MIPI D-PHY, "disabled" by default. > > > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> > > --- > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > index d09b808eff87..891ee7578c2d 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > @@ -728,6 +728,19 @@ > > status = "disabled"; > > }; > > > > + dphy: dphy@30a00300 { > > + compatible = "fsl,imx8mq-mipi-dphy"; > > + reg = <0x30a00300 0x100>; > > + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > > + clock-names = "phy_ref"; > > + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > > + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; > > + assigned-clock-rates = <24000000>; > > We have the following in the clk-imx8mq in the vendor tree: > > clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_BYPASS], clks[IMX8MQ_VIDEO_PLL1]); > > This unbypasses the video pll 1. And then we also have this: > > /* config video_pll1 clock */ > clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_REF_SEL], clks[IMX8MQ_CLK_27M]); > clk_set_rate(clks[IMX8MQ_VIDEO_PLL1], 593999999); We don't have anything like this in our tree. This is our current clock tree in that area which is setup by either the lcdif or dcss DT: osc_25m 10 12 0 25000000 0 0 50000 video_pll1_ref_sel 1 1 0 25000000 0 0 50000 video_pll1_ref_div 1 1 0 5000000 0 0 50000 video_pll1 1 1 0 593999998 0 0 50000 video_pll1_bypass 1 1 0 593999998 0 0 50000 video_pll1_out 2 2 0 593999998 0 0 50000 dsi_phy_ref 1 1 0 23760000 0 0 50000 e.g. for lcdif we have: lcdif: lcdif@30320000 { ... clock-names = "pix"; assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, <&clk IMX8MQ_VIDEO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_LCDIF_PIXEL>, <&clk IMX8MQ_VIDEO_PLL1>; assigned-clock-parents = <&clk IMX8MQ_CLK_25M>, <&clk IMX8MQ_VIDEO_PLL1>, <&clk IMX8MQ_VIDEO_PLL1_OUT>; assigned-clock-rates = <0>, <0>, <0>, <594000000>; ... }; Do we want to add this add for dphy and lcdif? Cheers, -- Guido > But none of that is acceptable upstream since the clock provider should not > use clock consumer API. > > So please update the assigned-clock* properties to something like this: > assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, > <&clk IMX8MQ_VIDEO_PLL1_BYPASS>, > <&clk IMX8MQ_CLK_DSI_PHY_REF>, > <&clk IMX8MQ_VIDEO_PLL1>; > assigned-clock-parents = <&clk IMX8MQ_CLK_27M>, > <&clk IMX8MQ_VIDEO_PLL1>, > <&clk IMX8MQ_VIDEO_PLL1_OUT> > <0>; > assigned-clock-rates = <0>, > <0>, > <24000000>, > <593999999>; > > I've written this without testing, so please do test it on your setup. > > > + #phy-cells = <0>; > > + power-domains = <&pgc_mipi>; > > + status = "disabled"; > > + }; > > + > > i2c1: i2c@30a20000 { > > compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; > > reg = <0x30a20000 0x10000>; > > -- > > 2.20.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: imx8mq: Add MIPI D-PHY @ 2019-07-21 11:47 ` Guido Günther 0 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-21 11:47 UTC (permalink / raw) To: Abel Vesa Cc: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, dl-linux-imx, Pavel Machek, Angus Ainslie (Purism), Lucas Stach, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Hi Abel, On Mon, Jul 15, 2019 at 11:10:27AM +0000, Abel Vesa wrote: > On 19-07-15 12:43:05, Guido Günther wrote: > > Add a node for the Mixel MIPI D-PHY, "disabled" by default. > > > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> > > --- > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > index d09b808eff87..891ee7578c2d 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > > @@ -728,6 +728,19 @@ > > status = "disabled"; > > }; > > > > + dphy: dphy@30a00300 { > > + compatible = "fsl,imx8mq-mipi-dphy"; > > + reg = <0x30a00300 0x100>; > > + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > > + clock-names = "phy_ref"; > > + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; > > + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; > > + assigned-clock-rates = <24000000>; > > We have the following in the clk-imx8mq in the vendor tree: > > clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_BYPASS], clks[IMX8MQ_VIDEO_PLL1]); > > This unbypasses the video pll 1. And then we also have this: > > /* config video_pll1 clock */ > clk_set_parent(clks[IMX8MQ_VIDEO_PLL1_REF_SEL], clks[IMX8MQ_CLK_27M]); > clk_set_rate(clks[IMX8MQ_VIDEO_PLL1], 593999999); We don't have anything like this in our tree. This is our current clock tree in that area which is setup by either the lcdif or dcss DT: osc_25m 10 12 0 25000000 0 0 50000 video_pll1_ref_sel 1 1 0 25000000 0 0 50000 video_pll1_ref_div 1 1 0 5000000 0 0 50000 video_pll1 1 1 0 593999998 0 0 50000 video_pll1_bypass 1 1 0 593999998 0 0 50000 video_pll1_out 2 2 0 593999998 0 0 50000 dsi_phy_ref 1 1 0 23760000 0 0 50000 e.g. for lcdif we have: lcdif: lcdif@30320000 { ... clock-names = "pix"; assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, <&clk IMX8MQ_VIDEO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_LCDIF_PIXEL>, <&clk IMX8MQ_VIDEO_PLL1>; assigned-clock-parents = <&clk IMX8MQ_CLK_25M>, <&clk IMX8MQ_VIDEO_PLL1>, <&clk IMX8MQ_VIDEO_PLL1_OUT>; assigned-clock-rates = <0>, <0>, <0>, <594000000>; ... }; Do we want to add this add for dphy and lcdif? Cheers, -- Guido > But none of that is acceptable upstream since the clock provider should not > use clock consumer API. > > So please update the assigned-clock* properties to something like this: > assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, > <&clk IMX8MQ_VIDEO_PLL1_BYPASS>, > <&clk IMX8MQ_CLK_DSI_PHY_REF>, > <&clk IMX8MQ_VIDEO_PLL1>; > assigned-clock-parents = <&clk IMX8MQ_CLK_27M>, > <&clk IMX8MQ_VIDEO_PLL1>, > <&clk IMX8MQ_VIDEO_PLL1_OUT> > <0>; > assigned-clock-rates = <0>, > <0>, > <24000000>, > <593999999>; > > I've written this without testing, so please do test it on your setup. > > > + #phy-cells = <0>; > > + power-domains = <&pgc_mipi>; > > + status = "disabled"; > > + }; > > + > > i2c1: i2c@30a20000 { > > compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; > > reg = <0x30a20000 0x10000>; > > -- > > 2.20.1 > > ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2 2/2] arm64: dts: imx8mq-librem5: Enable MIPI D-PHY 2019-07-15 10:43 ` Guido Günther @ 2019-07-15 10:43 ` Guido Günther -1 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-15 10:43 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Guido Günther, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel This enables the Mixel MIPI D-PHY on the Librem 5 devkit Signed-off-by: Guido Günther <agx@sigxcpu.org> Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> --- arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts index 5179e22f5126..683a11035643 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts @@ -174,6 +174,10 @@ assigned-clock-rates = <786432000>, <722534400>; }; +&dphy { + status = "okay"; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v2 2/2] arm64: dts: imx8mq-librem5: Enable MIPI D-PHY @ 2019-07-15 10:43 ` Guido Günther 0 siblings, 0 replies; 17+ messages in thread From: Guido Günther @ 2019-07-15 10:43 UTC (permalink / raw) To: Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Guido Günther, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel This enables the Mixel MIPI D-PHY on the Librem 5 devkit Signed-off-by: Guido Günther <agx@sigxcpu.org> Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> --- arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts index 5179e22f5126..683a11035643 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts @@ -174,6 +174,10 @@ assigned-clock-rates = <786432000>, <722534400>; }; +&dphy { + status = "okay"; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; -- 2.20.1 ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: imx8mq-librem5: Enable MIPI D-PHY 2019-07-15 10:43 ` Guido Günther @ 2019-07-15 10:55 ` Lucas Stach -1 siblings, 0 replies; 17+ messages in thread From: Lucas Stach @ 2019-07-15 10:55 UTC (permalink / raw) To: Guido Günther, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Angus Ainslie (Purism), Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Am Montag, den 15.07.2019, 12:43 +0200 schrieb Guido Günther: > This enables the Mixel MIPI D-PHY on the Librem 5 devkit > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > index 5179e22f5126..683a11035643 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > @@ -174,6 +174,10 @@ > assigned-clock-rates = <786432000>, <722534400>; > }; > > +&dphy { > + status = "okay"; > +}; > + > &fec1 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_fec1>; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: imx8mq-librem5: Enable MIPI D-PHY @ 2019-07-15 10:55 ` Lucas Stach 0 siblings, 0 replies; 17+ messages in thread From: Lucas Stach @ 2019-07-15 10:55 UTC (permalink / raw) To: Guido Günther, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Angus Ainslie (Purism), Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel Am Montag, den 15.07.2019, 12:43 +0200 schrieb Guido Günther: > This enables the Mixel MIPI D-PHY on the Librem 5 devkit > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Acked-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > index 5179e22f5126..683a11035643 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts > @@ -174,6 +174,10 @@ > assigned-clock-rates = <786432000>, <722534400>; > }; > > +&dphy { > + status = "okay"; > +}; > + > &fec1 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_fec1>; ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 0/2] arm64: dts: imx8mq: Add DT node for the Mixel MIPI D-PHY 2019-07-15 10:43 ` Guido Günther (?) @ 2019-07-23 6:32 ` Shawn Guo -1 siblings, 0 replies; 17+ messages in thread From: Shawn Guo @ 2019-07-23 6:32 UTC (permalink / raw) To: Guido Günther Cc: Mark Rutland, devicetree, Pavel Machek, Anson Huang, Carlo Caione, Andrey Smirnov, Sascha Hauer, Angus Ainslie (Purism), linux-kernel, Abel Vesa, Rob Herring, NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel, Lucas Stach On Mon, Jul 15, 2019 at 12:43:04PM +0200, Guido Günther wrote: > Now that the driver is in linux-next as of 20190624 let's have a DT node > for the i.MX8MQ and enable it on the Librem 5 devkit. > > Changes from v1: > - Add Acked-by: form Angus, thanks! You do not need to send a new version for just collecting ack/review tags. I did that when applying v1. Shawn > > Guido Günther (2): > arm64: dts: imx8mq: Add MIPI D-PHY > arm64: dts: imx8mq-librem5: Enable MIPI D-PHY > > .../boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > 2 files changed, 17 insertions(+) > > -- > 2.20.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 0/2] arm64: dts: imx8mq: Add DT node for the Mixel MIPI D-PHY @ 2019-07-23 6:32 ` Shawn Guo 0 siblings, 0 replies; 17+ messages in thread From: Shawn Guo @ 2019-07-23 6:32 UTC (permalink / raw) To: Guido Günther Cc: Rob Herring, Mark Rutland, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel On Mon, Jul 15, 2019 at 12:43:04PM +0200, Guido Günther wrote: > Now that the driver is in linux-next as of 20190624 let's have a DT node > for the i.MX8MQ and enable it on the Librem 5 devkit. > > Changes from v1: > - Add Acked-by: form Angus, thanks! You do not need to send a new version for just collecting ack/review tags. I did that when applying v1. Shawn > > Guido Günther (2): > arm64: dts: imx8mq: Add MIPI D-PHY > arm64: dts: imx8mq-librem5: Enable MIPI D-PHY > > .../boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > 2 files changed, 17 insertions(+) > > -- > 2.20.1 > ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v2 0/2] arm64: dts: imx8mq: Add DT node for the Mixel MIPI D-PHY @ 2019-07-23 6:32 ` Shawn Guo 0 siblings, 0 replies; 17+ messages in thread From: Shawn Guo @ 2019-07-23 6:32 UTC (permalink / raw) To: Guido Günther Cc: Rob Herring, Mark Rutland, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Pavel Machek, Angus Ainslie (Purism), Lucas Stach, Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov, devicetree, linux-arm-kernel, linux-kernel On Mon, Jul 15, 2019 at 12:43:04PM +0200, Guido G�nther wrote: > Now that the driver is in linux-next as of 20190624 let's have a DT node > for the i.MX8MQ and enable it on the Librem 5 devkit. > > Changes from v1: > - Add Acked-by: form Angus, thanks! You do not need to send a new version for just collecting ack/review tags. I did that when applying v1. Shawn > > Guido G�nther (2): > arm64: dts: imx8mq: Add MIPI D-PHY > arm64: dts: imx8mq-librem5: Enable MIPI D-PHY > > .../boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++ > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +++++++++++++ > 2 files changed, 17 insertions(+) > > -- > 2.20.1 > ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2019-07-23 6:33 UTC | newest] Thread overview: 17+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-07-15 10:43 [PATCH v2 0/2] arm64: dts: imx8mq: Add DT node for the Mixel MIPI D-PHY Guido Günther 2019-07-15 10:43 ` Guido Günther 2019-07-15 10:43 ` [PATCH v2 1/2] arm64: dts: imx8mq: Add " Guido Günther 2019-07-15 10:43 ` Guido Günther 2019-07-15 10:55 ` Lucas Stach 2019-07-15 10:55 ` Lucas Stach 2019-07-15 11:10 ` Abel Vesa 2019-07-15 11:10 ` Abel Vesa 2019-07-21 11:47 ` Guido Günther 2019-07-21 11:47 ` Guido Günther 2019-07-15 10:43 ` [PATCH v2 2/2] arm64: dts: imx8mq-librem5: Enable " Guido Günther 2019-07-15 10:43 ` Guido Günther 2019-07-15 10:55 ` Lucas Stach 2019-07-15 10:55 ` Lucas Stach 2019-07-23 6:32 ` [PATCH v2 0/2] arm64: dts: imx8mq: Add DT node for the Mixel " Shawn Guo 2019-07-23 6:32 ` Shawn Guo 2019-07-23 6:32 ` Shawn Guo
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