From: Dilip Kota <eswara.kota@linux.intel.com>
To: gustavo.pimentel@synopsys.com, lorenzo.pieralisi@arm.com,
andrew.murray@arm.com, helgaas@kernel.org, jingoohan1@gmail.com,
robh@kernel.org, martin.blumenstingl@googlemail.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
andriy.shevchenko@intel.com
Cc: linux-kernel@vger.kernel.org, cheol.yong.kim@intel.com,
chuanhua.lei@linux.intel.com, qi-ming.wu@intel.com,
Dilip Kota <eswara.kota@linux.intel.com>
Subject: [PATCH v8 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file
Date: Wed, 20 Nov 2019 15:42:59 +0800 [thread overview]
Message-ID: <cover.1574158309.git.eswara.kota@linux.intel.com> (raw)
In-Reply-To: <cover.1574158309.git.eswara.kota@linux.intel.com>
Intel PCIe is Synopsys based controller. Intel PCIe driver uses
DesignWare PCIe framework for host initialization and register
configurations.
Dilip Kota (3):
dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
dwc: PCI: intel: PCIe RC controller driver
PCI: artpec6: Configure FTS with dwc helper function
.../devicetree/bindings/pci/intel-gw-pcie.yaml | 138 ++++++
drivers/pci/controller/dwc/Kconfig | 10 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-artpec6.c | 8 +-
drivers/pci/controller/dwc/pcie-designware.c | 57 +++
drivers/pci/controller/dwc/pcie-designware.h | 12 +
drivers/pci/controller/dwc/pcie-intel-gw.c | 545 +++++++++++++++++++++
include/uapi/linux/pci_regs.h | 1 +
8 files changed, 765 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
--
2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Dilip Kota <eswara.kota@linux.intel.com>
To: gustavo.pimentel@synopsys.com, lorenzo.pieralisi@arm.com,
andrew.murray@arm.com, helgaas@kernel.org, jingoohan1@gmail.com,
robh@kernel.org, martin.blumenstingl@googlemail.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
andriy.shevchenko@intel.com
Cc: linux-kernel@vger.kernel.org, cheol.yong.kim@intel.com,
chuanhua.lei@linux.intel.com, qi-ming.wu@intel.com,
Dilip Kota <eswara.kota@linux.intel.com>
Subject: [PATCH v8 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file
Date: Wed, 20 Nov 2019 15:42:58 +0800 [thread overview]
Message-ID: <cover.1574158309.git.eswara.kota@linux.intel.com> (raw)
Message-ID: <20191120074258.04FEPZjCPvYAvCsZzrPY_PaTX9P3Xb3xa_8V0ujWQb0@z> (raw)
Intel PCIe is Synopsys based controller. Intel PCIe driver uses
DesignWare PCIe framework for host initialization and register
configurations.
Dilip Kota (3):
dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
dwc: PCI: intel: PCIe RC controller driver
PCI: artpec6: Configure FTS with dwc helper function
.../devicetree/bindings/pci/intel-gw-pcie.yaml | 138 ++++++
drivers/pci/controller/dwc/Kconfig | 10 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-artpec6.c | 8 +-
drivers/pci/controller/dwc/pcie-designware.c | 57 +++
drivers/pci/controller/dwc/pcie-designware.h | 12 +
drivers/pci/controller/dwc/pcie-intel-gw.c | 545 +++++++++++++++++++++
include/uapi/linux/pci_regs.h | 1 +
8 files changed, 765 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
--
2.11.0
next parent reply other threads:[~2019-11-20 7:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-20 7:42 Dilip Kota [this message]
2019-11-20 7:42 ` [PATCH v8 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Dilip Kota
2019-11-20 7:42 ` Dilip Kota
2019-11-20 7:43 ` [PATCH v8 1/3] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller Dilip Kota
2019-11-20 7:43 ` [PATCH v8 2/3] dwc: PCI: intel: PCIe RC controller driver Dilip Kota
2019-11-20 13:08 ` Andy Shevchenko
2019-11-21 8:52 ` Dilip Kota
2019-11-20 7:43 ` [PATCH v8 3/3] PCI: artpec6: Configure FTS with dwc helper function Dilip Kota
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