[PATCH 0/2] Mac Old World ROM experiment

[PATCH 0/2] Mac Old World ROM experiment

[BALATON Zoltan]

Based on https://github.com/dingusdev/dingusppc this series allows
experimenting with binary ROM image from a G3 beige machine. It does
not get very far though. Running with

-bios 78F57389.rom -d unimp,guest_errors -trace enable="pci*" | uniq -c

I get the logs below and hangs reading the last reg. It seems to
expect macio to be mapped at 0xf3000000 (also confirmed by comments in
https://github.com/dingusdev/dingusppc/blob/master/devices/macio.h and
some logs I've found on-line) but I don't see where it would set this
up so maybe this needs to be mapped by default there?

Regards,
BALATON Zoltan

      1 pci_cfg_read grackle 00:0 @0x0 -> 0x21057
      1 pci_cfg_read grackle 00:0 @0xa8 -> 0x0
      1 pci_cfg_write grackle 00:0 @0xa8 <- 0x40e0c
      1 pci_cfg_read grackle 00:0 @0xac -> 0x0
      1 pci_cfg_write grackle 00:0 @0xac <- 0x12000000
      1 pci_cfg_read grackle 00:0 @0xac -> 0x12000000
      1 pci_cfg_write grackle 00:0 @0xac <- 0x2000000
      1 pci_cfg_read grackle 00:0 @0x70 -> 0x0
      1 pci_cfg_write grackle 00:0 @0x70 <- 0x11000000
      1 machine_id_read(0, 2)
      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x0
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
      1 Unassigned mem write 00000000f3000024 = 0x80000000
      1 Unassigned mem write 00000000f3000028 = 0xffffffff
      1 Unassigned mem write 00000000f3000038 = 0x33eff3a
      1 Unassigned mem write 00000000f3000038 = 0x1befffa
      1 machine_id_read(0, 2)
      1 Unassigned mem read 00000000f3000038
      1 Unassigned mem write 00000000f3000038 = 0xc000010
      1 Unassigned mem write 00000000f3017e00 = 0x10
      1 Unassigned mem write 00000000f3016600 = 0x58
      1 Unassigned mem write 00000000f3016000 = 0x38
      1 Unassigned mem write 00000000f3016400 = 0x30
      1 Unassigned mem write 00000000f3017800 = 0x0
      1 Unassigned mem write 00000000f3017600 = 0x1c
      1 Unassigned mem write 00000000f3017c00 = 0x7f
      1 Unassigned mem read 00000000f3017600
      1 Unassigned mem write 00000000f3017600 = 0x0
      1 Unassigned mem write 00000000f3017c00 = 0x84
      1 Unassigned mem read 00000000f3016000
      1 Unassigned mem write 00000000f3016000 = 0x30
   3138 Unassigned mem read 00000000f3016000
   6627 Unassigned mem read 00000000f3017a00
      1 Unassigned mem read 00000000f3016000
      1 Unassigned mem write 00000000f3016000 = 0x10
   6681 Unassigned mem read 00000000f3016000
   6710 Unassigned mem read 00000000f3017a00
   6710 Unassigned mem read 00000000f3016000
   6600 Unassigned mem read 00000000f3017a00
   5543 Unassigned mem read 00000000f3016000
      1 Unassigned mem read 00000000f3000034
      1 Unassigned mem read 00000000f3016000
      1 Unassigned mem write 00000000f3016000 = 0x30
   1234 Unassigned mem read 00000000f3016000
   1195 Unassigned mem read 00000000f3017a00
      1 Unassigned mem read 00000000f3017400
      1 Unassigned mem read 00000000f3016000
      1 Unassigned mem write 00000000f3016000 = 0x0
      1 Unassigned mem read 00000000f3016000
   5441 Unassigned mem read 00000000f3017a00
   6820 Unassigned mem read 00000000f3016000
   6710 Unassigned mem read 00000000f3017a00
   5439 Unassigned mem read 00000000f3016000
      1 pci_cfg_write grackle 00:0 @0x80 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x88 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x90 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x98 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x84 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x8c <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x94 <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0x9c <- 0xffffffff
      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x0
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
      1 machine_id_read(0, 2)
      1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
      1 pci_cfg_write grackle 00:0 @0xf4 <- 0x40010fe4
      1 pci_cfg_write grackle 00:0 @0xf8 <- 0x7302293
      1 pci_cfg_write grackle 00:0 @0xfc <- 0x25302220
      1 pci_cfg_read grackle 00:0 @0xa0 -> 0x0
      1 pci_cfg_write grackle 00:0 @0xa0 <- 0x67000000
      1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12940000
      1 pci_cfg_write grackle 00:0 @0xf0 <- 0x129c0000
 545701 Unassigned mem read 00000000f3014020
      1 Unassigned mem write 00000000f30723f0 = 0x1c
      1 Unassigned mem write 00000000f30723e0 = 0x42
      1 Unassigned mem write 00000000f30723d0 = 0xf0
      1 Unassigned mem write 00000000f30723c0 = 0xff
      1 Unassigned mem write 00000000f3013020 = 0x9
      1 Unassigned mem write 00000000f3013020 = 0xc0
      1 Unassigned mem write 00000000f3013020 = 0xd
      1 Unassigned mem write 00000000f3013020 = 0x0
      1 Unassigned mem write 00000000f3013020 = 0xc
      1 Unassigned mem write 00000000f3013020 = 0xa
      1 Unassigned mem write 00000000f3013020 = 0xe
      1 Unassigned mem write 00000000f3013020 = 0x1
      1 Unassigned mem write 00000000f3013020 = 0xb
      1 Unassigned mem write 00000000f3013020 = 0x50
      1 Unassigned mem write 00000000f3013020 = 0x5
      1 Unassigned mem write 00000000f3013020 = 0xea
      1 Unassigned mem write 00000000f3013020 = 0x4
      1 Unassigned mem write 00000000f3013020 = 0x44
      1 Unassigned mem write 00000000f3013020 = 0x3
      1 Unassigned mem write 00000000f3013020 = 0xc1
 806156 Unassigned mem read 00000000f3013020


BALATON Zoltan (2):
  mac_oldworld: Allow loading binary ROM image
  mac_oldworld: Add machine ID register

 hw/ppc/mac_oldworld.c | 38 +++++++++++++++++++++++++++++---------
 1 file changed, 29 insertions(+), 9 deletions(-)

-- 
2.21.3

[PATCH 2/2] mac_oldworld: Add machine ID register

[BALATON Zoltan]

The G3 beige machine has a machine ID register that is accessed by the
firmware to deternine the board config. Add basic emulation of it.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 hw/ppc/mac_oldworld.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 3812adc441..4dd872c1a3 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -80,6 +80,15 @@ static void ppc_heathrow_reset(void *opaque)
     cpu_reset(CPU(cpu));
 }
 
+static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size)
+{
+    return (addr == 0 && size == 2 ? 0x3d8c : 0);
+}
+
+const MemoryRegionOps machine_id_reg_ops = {
+    .read = machine_id_read,
+};
+
 static void ppc_heathrow_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
@@ -93,6 +102,7 @@ static void ppc_heathrow_init(MachineState *machine)
     char *filename;
     int linux_boot, i;
     MemoryRegion *bios = g_new(MemoryRegion, 1);
+    MemoryRegion *machine_id = g_new(MemoryRegion, 1);
     uint32_t kernel_base, initrd_base, cmdline_base = 0;
     int32_t kernel_size, initrd_size;
     PCIBus *pci_bus;
@@ -227,6 +237,10 @@ static void ppc_heathrow_init(MachineState *machine)
         }
     }
 
+    memory_region_init_io(machine_id, OBJECT(machine), &machine_id_reg_ops,
+                          NULL, "machine_id", 2);
+    memory_region_add_subregion(get_system_memory(), 0xff000004, machine_id);
+
     /* XXX: we register only 1 output pin for heathrow PIC */
     pic_dev = qdev_create(NULL, TYPE_HEATHROW);
     qdev_init_nofail(pic_dev);
-- 
2.21.3

[PATCH 1/2] mac_oldworld: Allow loading binary ROM image

[BALATON Zoltan]

The G3 beige machine has a 4MB firmware ROM. Fix the size of the rom
region and allow loading a binary image with -bios. This makes it
possible to test emulation with a ROM image from real hardware.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 hw/ppc/mac_oldworld.c | 24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 0b4c1c6373..3812adc441 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -59,6 +59,8 @@
 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
 
 #define GRACKLE_BASE 0xfec00000
+#define PROM_BASE 0xffc00000
+#define PROM_SIZE (4 * MiB)
 
 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
                             Error **errp)
@@ -127,24 +129,28 @@ static void ppc_heathrow_init(MachineState *machine)
 
     memory_region_add_subregion(sysmem, 0, machine->ram);
 
-    /* allocate and load BIOS */
-    memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
+    /* allocate and load firmware ROM */
+    memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE,
                            &error_fatal);
+    memory_region_add_subregion(sysmem, PROM_BASE, bios);
 
-    if (bios_name == NULL)
+    if (!bios_name) {
         bios_name = PROM_FILENAME;
+    }
     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
-    memory_region_add_subregion(sysmem, PROM_ADDR, bios);
-
-    /* Load OpenBIOS (ELF) */
     if (filename) {
-        bios_size = load_elf(filename, NULL, 0, NULL, NULL, NULL, NULL, NULL,
-                             1, PPC_ELF_MACHINE, 0, 0);
+        /* Load OpenBIOS (ELF) */
+        bios_size = load_elf(filename, NULL, NULL, NULL, NULL, NULL, NULL,
+                             NULL, 1, PPC_ELF_MACHINE, 0, 0);
+        if (bios_size <= 0) {
+            /* or load binary ROM image */
+            bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
+        }
         g_free(filename);
     } else {
         bios_size = -1;
     }
-    if (bios_size < 0 || bios_size > BIOS_SIZE) {
+    if (bios_size < 0 || bios_size > PROM_SIZE) {
         error_report("could not load PowerPC bios '%s'", bios_name);
         exit(1);
     }
-- 
2.21.3