From: Michal Simek <michal.simek@xilinx.com>
To: linux-kernel@vger.kernel.org, monstr@monstr.eu,
michal.simek@xilinx.com, git@xilinx.com,
bharat.kumar.gogada@xilinx.com, kw@linux.com
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Marc Zyngier <maz@kernel.org>,
Ravi Kiran Gummaluri <rgummal@xilinx.com>,
Rob Herring <robh+dt@kernel.org>, Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org
Subject: [PATCH v3 0/2] PCI: xilinx-nwl: Add clock handling
Date: Fri, 25 Jun 2021 12:48:21 +0200 [thread overview]
Message-ID: <cover.1624618100.git.michal.simek@xilinx.com> (raw)
Hi,
this small series add support for enabling PCIe reference clock by driver.
Thanks,
Michal
Changes in v3:
- use PCIe instead of pcie
- add stable cc
- update commit message - reported by Krzysztof
Changes in v2:
- new patch in this series because I found that it has never been sent
- Update commit message - reported by Krzysztof
- Check return value from clk_prepare_enable() - reported by Krzysztof
Hyun Kwon (1):
PCI: xilinx-nwl: Enable the clock through CCF
Michal Simek (1):
dt-bindings: pci: xilinx-nwl: Document optional clock property
.../devicetree/bindings/pci/xilinx-nwl-pcie.txt | 1 +
drivers/pci/controller/pcie-xilinx-nwl.c | 12 ++++++++++++
2 files changed, 13 insertions(+)
--
2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <michal.simek@xilinx.com>
To: linux-kernel@vger.kernel.org, monstr@monstr.eu,
michal.simek@xilinx.com, git@xilinx.com,
bharat.kumar.gogada@xilinx.com, kw@linux.com
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Marc Zyngier <maz@kernel.org>,
Ravi Kiran Gummaluri <rgummal@xilinx.com>,
Rob Herring <robh+dt@kernel.org>, Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org
Subject: [PATCH v3 0/2] PCI: xilinx-nwl: Add clock handling
Date: Fri, 25 Jun 2021 12:48:21 +0200 [thread overview]
Message-ID: <cover.1624618100.git.michal.simek@xilinx.com> (raw)
Hi,
this small series add support for enabling PCIe reference clock by driver.
Thanks,
Michal
Changes in v3:
- use PCIe instead of pcie
- add stable cc
- update commit message - reported by Krzysztof
Changes in v2:
- new patch in this series because I found that it has never been sent
- Update commit message - reported by Krzysztof
- Check return value from clk_prepare_enable() - reported by Krzysztof
Hyun Kwon (1):
PCI: xilinx-nwl: Enable the clock through CCF
Michal Simek (1):
dt-bindings: pci: xilinx-nwl: Document optional clock property
.../devicetree/bindings/pci/xilinx-nwl-pcie.txt | 1 +
drivers/pci/controller/pcie-xilinx-nwl.c | 12 ++++++++++++
2 files changed, 13 insertions(+)
--
2.32.0
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next reply other threads:[~2021-06-25 10:48 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-25 10:48 Michal Simek [this message]
2021-06-25 10:48 ` [PATCH v3 0/2] PCI: xilinx-nwl: Add clock handling Michal Simek
2021-06-25 10:48 ` [PATCH v3 1/2] dt-bindings: pci: xilinx-nwl: Document optional clock property Michal Simek
2021-06-25 10:48 ` Michal Simek
2021-07-14 19:47 ` Rob Herring
2021-07-14 19:47 ` Rob Herring
2021-06-25 10:48 ` [PATCH v3 2/2] PCI: xilinx-nwl: Enable the clock through CCF Michal Simek
2021-06-25 10:48 ` Michal Simek
2021-08-06 10:28 ` [PATCH v3 0/2] PCI: xilinx-nwl: Add clock handling Michal Simek
2021-08-06 10:28 ` Michal Simek
2021-08-13 14:40 ` Lorenzo Pieralisi
2021-08-13 14:40 ` Lorenzo Pieralisi
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