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From: Haibo Xu <haibo1.xu@intel.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 0/4] RISCV: Add kvm Sstc timer selftest
Date: Thu, 27 Jul 2023 15:20:04 +0800	[thread overview]
Message-ID: <cover.1690364259.git.haibo1.xu@intel.com> (raw)

The sstc_timer selftest is used to validate Sstc timer functionality
in a guest, which sets up periodic timer interrupts and check the
basic interrupt status upon its receipt.

This KVM selftest was ported from aarch64 arch_timer and tested
with Linux v6.5-rc3 on a Qemu riscv64 virt machine.

Haibo Xu (4):
  tools: riscv: Add header file csr.h
  KVM: riscv: selftests: Add exception handling support
  KVM: riscv: selftests: Add guest helper to get vcpu id
  KVM: riscv: selftests: Add sstc_timer test

 tools/arch/riscv/include/asm/csr.h            | 127 ++++++
 tools/testing/selftests/kvm/Makefile          |   2 +
 .../selftests/kvm/include/riscv/processor.h   |  76 ++++
 .../selftests/kvm/include/riscv/sstc_timer.h  |  70 ++++
 .../selftests/kvm/lib/riscv/handlers.S        | 101 +++++
 .../selftests/kvm/lib/riscv/processor.c       |  74 ++++
 .../testing/selftests/kvm/riscv/sstc_timer.c  | 382 ++++++++++++++++++
 7 files changed, 832 insertions(+)
 create mode 100644 tools/arch/riscv/include/asm/csr.h
 create mode 100644 tools/testing/selftests/kvm/include/riscv/sstc_timer.h
 create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
 create mode 100644 tools/testing/selftests/kvm/riscv/sstc_timer.c

-- 
2.34.1



WARNING: multiple messages have this Message-ID (diff)
From: Haibo Xu <haibo1.xu@intel.com>
To: unlisted-recipients:; (no To-header on input)
Cc: xiaobo55x@gmail.com, haibo1.xu@intel.com,
	ajones@ventanamicro.com, Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Shuah Khan <shuah@kernel.org>, Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Sean Christopherson <seanjc@google.com>,
	Vipin Sharma <vipinsh@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	Marc Zyngier <maz@kernel.org>,
	Andrew Jones <andrew.jones@linux.dev>,
	Vishal Annapurve <vannapurve@google.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
	kvm-riscv@lists.infradead.org
Subject: [PATCH 0/4] RISCV: Add kvm Sstc timer selftest
Date: Thu, 27 Jul 2023 15:20:04 +0800	[thread overview]
Message-ID: <cover.1690364259.git.haibo1.xu@intel.com> (raw)

The sstc_timer selftest is used to validate Sstc timer functionality
in a guest, which sets up periodic timer interrupts and check the
basic interrupt status upon its receipt.

This KVM selftest was ported from aarch64 arch_timer and tested
with Linux v6.5-rc3 on a Qemu riscv64 virt machine.

Haibo Xu (4):
  tools: riscv: Add header file csr.h
  KVM: riscv: selftests: Add exception handling support
  KVM: riscv: selftests: Add guest helper to get vcpu id
  KVM: riscv: selftests: Add sstc_timer test

 tools/arch/riscv/include/asm/csr.h            | 127 ++++++
 tools/testing/selftests/kvm/Makefile          |   2 +
 .../selftests/kvm/include/riscv/processor.h   |  76 ++++
 .../selftests/kvm/include/riscv/sstc_timer.h  |  70 ++++
 .../selftests/kvm/lib/riscv/handlers.S        | 101 +++++
 .../selftests/kvm/lib/riscv/processor.c       |  74 ++++
 .../testing/selftests/kvm/riscv/sstc_timer.c  | 382 ++++++++++++++++++
 7 files changed, 832 insertions(+)
 create mode 100644 tools/arch/riscv/include/asm/csr.h
 create mode 100644 tools/testing/selftests/kvm/include/riscv/sstc_timer.h
 create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
 create mode 100644 tools/testing/selftests/kvm/riscv/sstc_timer.c

-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Haibo Xu <haibo1.xu@intel.com>
Cc: xiaobo55x@gmail.com, haibo1.xu@intel.com,
	ajones@ventanamicro.com, Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Shuah Khan <shuah@kernel.org>, Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Sean Christopherson <seanjc@google.com>,
	Vipin Sharma <vipinsh@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	Marc Zyngier <maz@kernel.org>,
	Andrew Jones <andrew.jones@linux.dev>,
	Vishal Annapurve <vannapurve@google.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
	kvm-riscv@lists.infradead.org
Subject: [PATCH 0/4] RISCV: Add kvm Sstc timer selftest
Date: Thu, 27 Jul 2023 15:20:04 +0800	[thread overview]
Message-ID: <cover.1690364259.git.haibo1.xu@intel.com> (raw)

The sstc_timer selftest is used to validate Sstc timer functionality
in a guest, which sets up periodic timer interrupts and check the
basic interrupt status upon its receipt.

This KVM selftest was ported from aarch64 arch_timer and tested
with Linux v6.5-rc3 on a Qemu riscv64 virt machine.

Haibo Xu (4):
  tools: riscv: Add header file csr.h
  KVM: riscv: selftests: Add exception handling support
  KVM: riscv: selftests: Add guest helper to get vcpu id
  KVM: riscv: selftests: Add sstc_timer test

 tools/arch/riscv/include/asm/csr.h            | 127 ++++++
 tools/testing/selftests/kvm/Makefile          |   2 +
 .../selftests/kvm/include/riscv/processor.h   |  76 ++++
 .../selftests/kvm/include/riscv/sstc_timer.h  |  70 ++++
 .../selftests/kvm/lib/riscv/handlers.S        | 101 +++++
 .../selftests/kvm/lib/riscv/processor.c       |  74 ++++
 .../testing/selftests/kvm/riscv/sstc_timer.c  | 382 ++++++++++++++++++
 7 files changed, 832 insertions(+)
 create mode 100644 tools/arch/riscv/include/asm/csr.h
 create mode 100644 tools/testing/selftests/kvm/include/riscv/sstc_timer.h
 create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
 create mode 100644 tools/testing/selftests/kvm/riscv/sstc_timer.c

-- 
2.34.1


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linux-riscv mailing list
linux-riscv@lists.infradead.org
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             reply	other threads:[~2023-07-27  7:20 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-27  7:20 Haibo Xu [this message]
2023-07-27  7:20 ` [PATCH 0/4] RISCV: Add kvm Sstc timer selftest Haibo Xu
2023-07-27  7:20 ` Haibo Xu
2023-07-27  7:20 ` [PATCH 1/4] tools: riscv: Add header file csr.h Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-28  9:43   ` Andrew Jones
2023-07-28  9:43     ` Andrew Jones
2023-07-28  9:43     ` Andrew Jones
2023-08-02  2:05     ` Haibo Xu
2023-08-02  2:05       ` Haibo Xu
2023-08-02  2:05       ` Haibo Xu
2023-08-03  3:13       ` Guo Ren
2023-08-03  3:13         ` Guo Ren
2023-08-03  3:13         ` Guo Ren
2023-08-03  7:44         ` Andrew Jones
2023-08-03  7:44           ` Andrew Jones
2023-08-03  7:44           ` Andrew Jones
2023-08-05  1:31           ` Guo Ren
2023-08-05  1:31             ` Guo Ren
2023-08-05  1:31             ` Guo Ren
2023-07-27  7:20 ` [PATCH 2/4] KVM: riscv: selftests: Add exception handling support Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-28  9:37   ` Andrew Jones
2023-07-28  9:37     ` Andrew Jones
2023-07-28  9:37     ` Andrew Jones
2023-07-28 15:53     ` Sean Christopherson
2023-07-28 15:53       ` Sean Christopherson
2023-07-28 15:53       ` Sean Christopherson
2023-08-02  1:49       ` Haibo Xu
2023-08-02  1:49         ` Haibo Xu
2023-08-02  1:49         ` Haibo Xu
2023-08-02  1:46     ` Haibo Xu
2023-08-02  1:46       ` Haibo Xu
2023-08-02  1:46       ` Haibo Xu
2023-07-27  7:20 ` [PATCH 3/4] KVM: riscv: selftests: Add guest helper to get vcpu id Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-28  9:49   ` Andrew Jones
2023-07-28  9:49     ` Andrew Jones
2023-07-28  9:49     ` Andrew Jones
2023-08-02  2:02     ` Haibo Xu
2023-08-02  2:02       ` Haibo Xu
2023-08-02  2:02       ` Haibo Xu
2023-07-27  7:20 ` [PATCH 4/4] KVM: riscv: selftests: Add sstc_timer test Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-27  7:20   ` Haibo Xu
2023-07-27 15:14 ` [PATCH 0/4] RISCV: Add kvm Sstc timer selftest Sean Christopherson
2023-07-27 15:14   ` Sean Christopherson
2023-07-27 15:14   ` Sean Christopherson
2023-07-28  1:37   ` Haibo Xu
2023-07-28  1:37     ` Haibo Xu
2023-07-28  1:37     ` Haibo Xu
2023-07-28  9:57     ` Andrew Jones
2023-07-28  9:57       ` Andrew Jones
2023-07-28  9:57       ` Andrew Jones
2023-08-02  2:01       ` Haibo Xu
2023-08-02  2:01         ` Haibo Xu
2023-08-02  2:01         ` Haibo Xu
2023-08-02 22:16 ` Sean Christopherson
2023-08-02 22:16   ` Sean Christopherson
2023-08-02 22:16   ` Sean Christopherson
2023-08-03  0:26   ` Haibo Xu
2023-08-03  0:26     ` Haibo Xu
2023-08-03  0:26     ` Haibo Xu
2023-08-27  8:59   ` Haibo Xu
2023-08-27  8:59     ` Haibo Xu
2023-08-27  8:59     ` Haibo Xu
2023-08-28 14:08     ` Sean Christopherson
2023-08-28 14:08       ` Sean Christopherson
2023-08-28 14:08       ` Sean Christopherson
2023-08-29  5:04       ` Haibo Xu
2023-08-29  5:04         ` Haibo Xu
2023-08-29  5:04         ` Haibo Xu

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