From: Bo Gan <ganboing@gmail.com>
To: zong.li@sifive.com, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Pragnesh.patel@sifive.com, aou@eecs.berkeley.edu,
erik.danie@sifive.com, hes@sifive.com, mturquette@baylibre.com,
palmer@dabbelt.com, palmerdabbelt@google.com,
paul.walmsley@sifive.com, pragnesh.patel@openfive.com,
sboyd@kernel.org, schwab@linux-m68k.org, yash.shah@sifive.com
Subject: [PATCH 0/3] clk: sifive: Fix chip hang when booting linux directly
Date: Tue, 27 Aug 2024 23:55:17 -0700 [thread overview]
Message-ID: <cover.1724827635.git.ganboing@gmail.com> (raw)
This patch adds the release_reset hook interface to __prci_wrpll_data.
For gemgxlpll/cltxpll clocks in fu540/fu740, the reset pins also have to
be relased for the device to function properly. This was missing in Linux.
The board (Sifive Unmatched/Unleashed) happened to work because previous
boot stage (u-boot) usually already enables the clocks when trying to boot
from PXE/network, and the release_reset logic is present in u-boot. When
booting directly from firmware (OpenSBI) or when u-boot isn't configured
with networking enabled, the board will hang when cadence/macb driver
starts initializing the device.
Fix that by taking the same logic in u-boot and apply to linux.
Bo Gan (3):
dt-bindings: reset: sifive: add fu540/fu740 reset indexes
riscv: dts: sifive: fu740: Use reset index from header
clk: sifive: prci: Add release_reset hooks for gemgxlpll/cltxpll
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 3 +-
drivers/clk/sifive/fu540-prci.h | 16 ++++++++++
drivers/clk/sifive/fu740-prci.h | 31 +++++++++++++++++++
drivers/clk/sifive/sifive-prci.c | 23 ++++++++++++++
drivers/clk/sifive/sifive-prci.h | 8 +++++
include/dt-bindings/reset/sifive-fu540-prci.h | 19 ++++++++++++
include/dt-bindings/reset/sifive-fu740-prci.h | 19 ++++++++++++
7 files changed, 118 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/reset/sifive-fu540-prci.h
create mode 100644 include/dt-bindings/reset/sifive-fu740-prci.h
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Bo Gan <ganboing@gmail.com>
To: zong.li@sifive.com, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Pragnesh.patel@sifive.com, aou@eecs.berkeley.edu,
erik.danie@sifive.com, hes@sifive.com, mturquette@baylibre.com,
palmer@dabbelt.com, palmerdabbelt@google.com,
paul.walmsley@sifive.com, pragnesh.patel@openfive.com,
sboyd@kernel.org, schwab@linux-m68k.org, yash.shah@sifive.com
Subject: [PATCH 0/3] clk: sifive: Fix chip hang when booting linux directly
Date: Tue, 27 Aug 2024 23:55:17 -0700 [thread overview]
Message-ID: <cover.1724827635.git.ganboing@gmail.com> (raw)
This patch adds the release_reset hook interface to __prci_wrpll_data.
For gemgxlpll/cltxpll clocks in fu540/fu740, the reset pins also have to
be relased for the device to function properly. This was missing in Linux.
The board (Sifive Unmatched/Unleashed) happened to work because previous
boot stage (u-boot) usually already enables the clocks when trying to boot
from PXE/network, and the release_reset logic is present in u-boot. When
booting directly from firmware (OpenSBI) or when u-boot isn't configured
with networking enabled, the board will hang when cadence/macb driver
starts initializing the device.
Fix that by taking the same logic in u-boot and apply to linux.
Bo Gan (3):
dt-bindings: reset: sifive: add fu540/fu740 reset indexes
riscv: dts: sifive: fu740: Use reset index from header
clk: sifive: prci: Add release_reset hooks for gemgxlpll/cltxpll
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 3 +-
drivers/clk/sifive/fu540-prci.h | 16 ++++++++++
drivers/clk/sifive/fu740-prci.h | 31 +++++++++++++++++++
drivers/clk/sifive/sifive-prci.c | 23 ++++++++++++++
drivers/clk/sifive/sifive-prci.h | 8 +++++
include/dt-bindings/reset/sifive-fu540-prci.h | 19 ++++++++++++
include/dt-bindings/reset/sifive-fu740-prci.h | 19 ++++++++++++
7 files changed, 118 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/reset/sifive-fu540-prci.h
create mode 100644 include/dt-bindings/reset/sifive-fu740-prci.h
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2024-08-28 6:55 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-28 6:55 Bo Gan [this message]
2024-08-28 6:55 ` [PATCH 0/3] clk: sifive: Fix chip hang when booting linux directly Bo Gan
2024-08-28 6:55 ` [PATCH 1/3] dt-bindings: reset: sifive: add fu540/fu740 reset indexes Bo Gan
2024-08-28 6:55 ` Bo Gan
2024-08-29 5:56 ` Krzysztof Kozlowski
2024-08-29 5:56 ` Krzysztof Kozlowski
2024-08-28 6:55 ` [PATCH 2/3] riscv: dts: sifive: fu740: Use reset index from header Bo Gan
2024-08-28 6:55 ` Bo Gan
2024-08-28 6:55 ` [PATCH 3/3] clk: sifive: prci: Add release_reset hooks for gemgxlpll/cltxpll Bo Gan
2024-08-28 6:55 ` Bo Gan
2024-08-28 7:58 ` Conor Dooley
2024-08-28 7:58 ` Conor Dooley
2024-08-28 8:14 ` Bo Gan
2024-08-28 8:14 ` Bo Gan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1724827635.git.ganboing@gmail.com \
--to=ganboing@gmail.com \
--cc=Pragnesh.patel@sifive.com \
--cc=aou@eecs.berkeley.edu \
--cc=erik.danie@sifive.com \
--cc=hes@sifive.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=palmer@dabbelt.com \
--cc=palmerdabbelt@google.com \
--cc=paul.walmsley@sifive.com \
--cc=pragnesh.patel@openfive.com \
--cc=sboyd@kernel.org \
--cc=schwab@linux-m68k.org \
--cc=yash.shah@sifive.com \
--cc=zong.li@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.