From: Chen Wang <unicornxw@gmail.com>
To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu,
arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org,
guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org,
palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org,
tglx@linutronix.de, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
chao.wei@sophgo.com, xiaoguang.xing@sophgo.com,
fengchun.li@sophgo.com
Subject: [PATCH 0/3] irqchip: Add Sophgo SG2042 MSI controller
Date: Mon, 11 Nov 2024 12:01:13 +0800 [thread overview]
Message-ID: <cover.1731296803.git.unicorn_wang@outlook.com> (raw)
From: Chen Wang <unicorn_wang@outlook.com>
This controller is on the Sophgo SG2042 SoC to transform interrupts from
PCIe MSI to PLIC interrupts.
Chen Wang (3):
dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI
irqchip: Add the Sophgo SG2042 MSI interrupt controller
riscv: sophgo: dts: add msi controller for SG2042
.../sophgo,sg2042-msi.yaml | 78 ++++++
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 13 +
drivers/irqchip/Kconfig | 8 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-sg2042-msi.c | 255 ++++++++++++++++++
5 files changed, 355 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml
create mode 100644 drivers/irqchip/irq-sg2042-msi.c
base-commit: 2d5404caa8c7bb5c4e0435f94b28834ae5456623
--
2.34.1
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WARNING: multiple messages have this Message-ID (diff)
From: Chen Wang <unicornxw@gmail.com>
To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu,
arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org,
guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org,
palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org,
tglx@linutronix.de, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
chao.wei@sophgo.com, xiaoguang.xing@sophgo.com,
fengchun.li@sophgo.com
Subject: [PATCH 0/3] irqchip: Add Sophgo SG2042 MSI controller
Date: Mon, 11 Nov 2024 12:01:13 +0800 [thread overview]
Message-ID: <cover.1731296803.git.unicorn_wang@outlook.com> (raw)
From: Chen Wang <unicorn_wang@outlook.com>
This controller is on the Sophgo SG2042 SoC to transform interrupts from
PCIe MSI to PLIC interrupts.
Chen Wang (3):
dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI
irqchip: Add the Sophgo SG2042 MSI interrupt controller
riscv: sophgo: dts: add msi controller for SG2042
.../sophgo,sg2042-msi.yaml | 78 ++++++
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 13 +
drivers/irqchip/Kconfig | 8 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-sg2042-msi.c | 255 ++++++++++++++++++
5 files changed, 355 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml
create mode 100644 drivers/irqchip/irq-sg2042-msi.c
base-commit: 2d5404caa8c7bb5c4e0435f94b28834ae5456623
--
2.34.1
next reply other threads:[~2024-11-11 4:01 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-11 4:01 Chen Wang [this message]
2024-11-11 4:01 ` [PATCH 0/3] irqchip: Add Sophgo SG2042 MSI controller Chen Wang
2024-11-11 4:01 ` [PATCH 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI Chen Wang
2024-11-11 4:01 ` Chen Wang
2024-11-12 15:52 ` Rob Herring
2024-11-12 15:52 ` Rob Herring
2024-11-13 7:16 ` Chen Wang
2024-11-13 7:16 ` Chen Wang
2024-11-11 4:01 ` [PATCH 2/3] irqchip: Add the Sophgo SG2042 MSI interrupt controller Chen Wang
2024-11-11 4:01 ` Chen Wang
2024-11-13 6:14 ` Thomas Gleixner
2024-11-13 6:14 ` Thomas Gleixner
2024-11-13 6:43 ` Chen Wang
2024-11-13 6:43 ` Chen Wang
2024-11-13 15:31 ` Thomas Gleixner
2024-11-13 15:31 ` Thomas Gleixner
2024-11-14 0:20 ` Chen Wang
2024-11-14 0:20 ` Chen Wang
2024-11-11 4:02 ` [PATCH 3/3] riscv: sophgo: dts: add msi controller for SG2042 Chen Wang
2024-11-11 4:02 ` Chen Wang
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