* [PATCH v1 0/1] Fix the VSTART register was not checked correctly in the vext_vv_rm_2 function
@ 2024-12-17 8:43 Chao Liu
0 siblings, 0 replies; only message in thread
From: Chao Liu @ 2024-12-17 8:43 UTC (permalink / raw)
To: bmeng.cn, liwei1518, palmer, alistair.francis, dbarboza,
zhiwei_liu
Cc: qemu-riscv, qemu-devel, zqz00548, Chao Liu
Hi, all:
Recently, when I was writing a RISCV test, I found that when VL is set to 0, the
instruction should be nop, but when I tested it, I found that QEMU will treat
all elements as tail elements, and in the case of VTA=1, write all elements
to 1.
After troubleshooting, it was found that the vext_vx_rm_1 function was called in
the vext_vx_rm_2, and then the vext_set_elems_1s function was called to process
the tail element, but only VSTART >= vl was checked in the vext_vx_rm_1
function, which caused the tail element to still be processed even if it was
returned in advance.
So I've made the following change:
put VSTART_CHECK_EARLY_EXIT(env) at the beginning of the vext_vx_rm_2 function,
so that the VSTART register is checked correctly.
Regards,
Chao
Chao Liu (1):
target/riscv: Fix handling of NOP for vstart >= vl in vext_vx_rm_2()
target/riscv/vector_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--
2.47.1
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2024-12-17 8:44 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-12-17 8:43 [PATCH v1 0/1] Fix the VSTART register was not checked correctly in the vext_vv_rm_2 function Chao Liu
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.