From: Chen Wang <unicornxw@gmail.com>
To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, unicorn_wang@outlook.com, conor+dt@kernel.org,
rabenda.cn@gmail.com, inochiama@gmail.com, krzk+dt@kernel.org,
mani@kernel.org, liujingqi@lanxincomputing.com,
palmer@dabbelt.com, pjw@kernel.org, robh@kernel.org,
tglx@linutronix.de, sycamoremoon376@gmail.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, sophgo@lists.linux.dev,
chao.wei@sophgo.com, xiaoguang.xing@sophgo.com,
fengchun.li@sophgo.com
Subject: [PATCH 0/4] Add PCIe support in DTS for Sophgo SG2042 SoC
Date: Mon, 20 Oct 2025 11:32:55 +0800 [thread overview]
Message-ID: <cover.1760929111.git.unicorn_wang@outlook.com> (raw)
From: Chen Wang <unicorn_wang@outlook.com>
This new patch set is a continuation of the previous patchset
"[PATCH v3 0/7] Add PCIe support to Sophgo SG2042 SoC" [1].
The drivers and bindings have already been merged into the kernel
mainline, and this patchset will focus on submitting the remaining
DTS changes into the mainline.
This patchset is based on v6.18-rc1 and the only changes since v3
is a fix to address the comments from Manivannan Sadhasivam to make
sure PCI address of the I/O port to start from 0.
Link: https://lore.kernel.org/linux-riscv/cover.1757643388.git.unicorn_wang@outlook.com/ [1]
Chen Wang (4):
riscv: sophgo: dts: add PCIe controllers for SG2042
riscv: sophgo: dts: enable PCIe for PioneerBox
riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0
arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts | 12 +++
arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 12 +++
.../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 12 +++
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 88 +++++++++++++++++++
4 files changed, 124 insertions(+)
base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787
--
2.34.1
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WARNING: multiple messages have this Message-ID (diff)
From: Chen Wang <unicornxw@gmail.com>
To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, unicorn_wang@outlook.com, conor+dt@kernel.org,
rabenda.cn@gmail.com, inochiama@gmail.com, krzk+dt@kernel.org,
mani@kernel.org, liujingqi@lanxincomputing.com,
palmer@dabbelt.com, pjw@kernel.org, robh@kernel.org,
tglx@linutronix.de, sycamoremoon376@gmail.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, sophgo@lists.linux.dev,
chao.wei@sophgo.com, xiaoguang.xing@sophgo.com,
fengchun.li@sophgo.com
Subject: [PATCH 0/4] Add PCIe support in DTS for Sophgo SG2042 SoC
Date: Mon, 20 Oct 2025 11:32:55 +0800 [thread overview]
Message-ID: <cover.1760929111.git.unicorn_wang@outlook.com> (raw)
From: Chen Wang <unicorn_wang@outlook.com>
This new patch set is a continuation of the previous patchset
"[PATCH v3 0/7] Add PCIe support to Sophgo SG2042 SoC" [1].
The drivers and bindings have already been merged into the kernel
mainline, and this patchset will focus on submitting the remaining
DTS changes into the mainline.
This patchset is based on v6.18-rc1 and the only changes since v3
is a fix to address the comments from Manivannan Sadhasivam to make
sure PCI address of the I/O port to start from 0.
Link: https://lore.kernel.org/linux-riscv/cover.1757643388.git.unicorn_wang@outlook.com/ [1]
Chen Wang (4):
riscv: sophgo: dts: add PCIe controllers for SG2042
riscv: sophgo: dts: enable PCIe for PioneerBox
riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0
arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts | 12 +++
arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 12 +++
.../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 12 +++
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 88 +++++++++++++++++++
4 files changed, 124 insertions(+)
base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787
--
2.34.1
next reply other threads:[~2025-10-20 3:33 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 3:32 Chen Wang [this message]
2025-10-20 3:32 ` [PATCH 0/4] Add PCIe support in DTS for Sophgo SG2042 SoC Chen Wang
2025-10-20 3:33 ` [PATCH 1/4] riscv: sophgo: dts: add PCIe controllers for SG2042 Chen Wang
2025-10-20 3:33 ` Chen Wang
2025-10-20 3:34 ` [PATCH 2/4] riscv: sophgo: dts: enable PCIe for PioneerBox Chen Wang
2025-10-20 3:34 ` Chen Wang
2025-10-20 3:39 ` [PATCH 3/4] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X Chen Wang
2025-10-20 3:39 ` Chen Wang
2025-10-20 3:40 ` [PATCH 4/4] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0 Chen Wang
2025-10-20 3:40 ` Chen Wang
2025-10-20 3:48 ` [PATCH 0/4] Add PCIe support in DTS for Sophgo SG2042 SoC Chen Wang
2025-10-20 3:48 ` Chen Wang
2025-10-25 11:58 ` Han Gao
2025-10-25 11:58 ` Han Gao
2025-10-26 0:31 ` Chen Wang
2025-10-26 0:31 ` Chen Wang
2025-10-29 1:00 ` Inochi Amaoto
2025-10-29 1:00 ` Inochi Amaoto
2025-11-01 23:44 ` Inochi Amaoto
2025-11-01 23:44 ` Inochi Amaoto
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