From: Yunhui Cui <cuiyunhui@bytedance.com>
To: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, dennis@kernel.org, tj@kernel.org, cl@gentwo.org,
ast@kernel.org, daniel@iogearbox.net, andrii@kernel.org,
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thuth@redhat.com, ajones@ventanamicro.com,
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linux-arch@vger.kernel.org, llvm@lists.linux.dev
Subject: [PATCH v5 0/3] riscv: improve percpu helpers and PIO mapping
Date: Wed, 1 Jul 2026 12:20:38 +0800 [thread overview]
Message-ID: <cover.1782877663.git.cuiyunhui@bytedance.com> (raw)
Changes in v5:
- Keep the PIO helper fix local to RISC-V: drop the generic
HAS_IOPORT_MAP dependency change and the generic ioport_map() change
from v4.
- Add the missing linux/bits.h include for GENMASK and BITS_PER_BYTE.
- Fix the 8/16-bit LR/SC fallback to mask subword results before writing
them back.
- Use early-clobber constraints in the 8/16-bit add_return LR/SC fallback.
- Fix this_cpu_and_4/8 to pass the intended operand to RISC-V amoand.
- Initialize the secondary idle task pcpu_offset before starting the CPU.
Yunhui Cui (3):
riscv: io: avoid null-pointer arithmetic in PIO helpers
riscv: introduce percpu.h into include/asm
riscv: store percpu offset into thread_info
arch/riscv/include/asm/asm.h | 6 +-
arch/riscv/include/asm/io.h | 26 ++-
arch/riscv/include/asm/percpu.h | 287 +++++++++++++++++++++++++++
arch/riscv/include/asm/switch_to.h | 8 +
arch/riscv/include/asm/thread_info.h | 3 +-
arch/riscv/kernel/asm-offsets.c | 1 +
arch/riscv/kernel/smpboot.c | 8 +
arch/riscv/net/bpf_jit_comp64.c | 9 +-
8 files changed, 326 insertions(+), 22 deletions(-)
create mode 100644 arch/riscv/include/asm/percpu.h
--
2.39.5
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linux-riscv@lists.infradead.org
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WARNING: multiple messages have this Message-ID (diff)
From: Yunhui Cui <cuiyunhui@bytedance.com>
To: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, dennis@kernel.org, tj@kernel.org, cl@gentwo.org,
ast@kernel.org, daniel@iogearbox.net, andrii@kernel.org,
martin.lau@linux.dev, eddyz87@gmail.com, memxor@gmail.com,
song@kernel.org, yonghong.song@linux.dev, jolsa@kernel.org,
bjorn@kernel.org, pulehui@huawei.com, puranjay@kernel.org,
thuth@redhat.com, ajones@ventanamicro.com,
ben.dooks@codethink.co.uk, rkrcmar@ventanamicro.com,
cuiyunhui@bytedance.com, samuel.holland@sifive.com,
zong.li@sifive.com, conor.dooley@microchip.com, tglx@kernel.org,
debug@rivosinc.com, seanwascoding@gmail.com, andybnac@gmail.com,
menglong8.dong@gmail.com, cyrilbur@tenstorrent.com,
wangruikang@iscas.ac.cn, atishp@rivosinc.com,
apatel@ventanamicro.com, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mm@kvack.org,
bpf@vger.kernel.org, arnd@arndb.de, nathan@kernel.org,
nick.desaulniers+lkml@gmail.com, morbo@google.com,
justinstitt@google.com, qingfang.deng@siflower.com.cn,
linux-arch@vger.kernel.org, llvm@lists.linux.dev
Subject: [PATCH v5 0/3] riscv: improve percpu helpers and PIO mapping
Date: Wed, 1 Jul 2026 12:20:38 +0800 [thread overview]
Message-ID: <cover.1782877663.git.cuiyunhui@bytedance.com> (raw)
Changes in v5:
- Keep the PIO helper fix local to RISC-V: drop the generic
HAS_IOPORT_MAP dependency change and the generic ioport_map() change
from v4.
- Add the missing linux/bits.h include for GENMASK and BITS_PER_BYTE.
- Fix the 8/16-bit LR/SC fallback to mask subword results before writing
them back.
- Use early-clobber constraints in the 8/16-bit add_return LR/SC fallback.
- Fix this_cpu_and_4/8 to pass the intended operand to RISC-V amoand.
- Initialize the secondary idle task pcpu_offset before starting the CPU.
Yunhui Cui (3):
riscv: io: avoid null-pointer arithmetic in PIO helpers
riscv: introduce percpu.h into include/asm
riscv: store percpu offset into thread_info
arch/riscv/include/asm/asm.h | 6 +-
arch/riscv/include/asm/io.h | 26 ++-
arch/riscv/include/asm/percpu.h | 287 +++++++++++++++++++++++++++
arch/riscv/include/asm/switch_to.h | 8 +
arch/riscv/include/asm/thread_info.h | 3 +-
arch/riscv/kernel/asm-offsets.c | 1 +
arch/riscv/kernel/smpboot.c | 8 +
arch/riscv/net/bpf_jit_comp64.c | 9 +-
8 files changed, 326 insertions(+), 22 deletions(-)
create mode 100644 arch/riscv/include/asm/percpu.h
--
2.39.5
next reply other threads:[~2026-07-01 4:21 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 4:20 Yunhui Cui [this message]
2026-07-01 4:20 ` [PATCH v5 0/3] riscv: improve percpu helpers and PIO mapping Yunhui Cui
2026-07-01 4:20 ` [PATCH v5 1/3] riscv: io: avoid null-pointer arithmetic in PIO helpers Yunhui Cui
2026-07-01 4:20 ` Yunhui Cui
2026-07-01 6:24 ` Arnd Bergmann
2026-07-01 6:24 ` Arnd Bergmann
2026-07-01 11:57 ` [External] " yunhui cui
2026-07-01 11:57 ` yunhui cui
2026-07-01 4:20 ` [PATCH v5 2/3] riscv: introduce percpu.h into include/asm Yunhui Cui
2026-07-01 4:20 ` Yunhui Cui
2026-07-01 4:38 ` sashiko-bot
2026-07-01 11:55 ` [External] " yunhui cui
2026-07-01 5:05 ` bot+bpf-ci
2026-07-01 5:05 ` bot+bpf-ci
2026-07-01 5:05 ` bot+bpf-ci
2026-07-01 11:34 ` [External] " yunhui cui
2026-07-01 11:34 ` yunhui cui
2026-07-01 4:20 ` [PATCH v5 3/3] riscv: store percpu offset into thread_info Yunhui Cui
2026-07-01 4:20 ` Yunhui Cui
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