From: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: brian.cain@oss.qualcomm.com, pierrick.bouvier@oss.qualcomm.com,
marco.liebel@oss.qualcomm.com, philmd@oss.qualcomm.com,
ale@rev.ng, anjo@rev.ng
Subject: [PATCH v3 00/13] hexagon: add semihosting support
Date: Mon, 20 Jul 2026 10:40:56 -0700 [thread overview]
Message-ID: <cover.1784568922.git.matheus.bernardino@oss.qualcomm.com> (raw)
This series adds semihosting support to hexagon system emulation,
together with functional tests for the added operations.
The Hexagon semihosting spec can be found at:
https://docs.qualcomm.com/doc/80-N2040-101_102648/topic/semihosting-specification.html
v1: https://lore.kernel.org/qemu-devel/cover.1783973054.git.matheus.bernardino@oss.qualcomm.com/
v2: https://lore.kernel.org/qemu-devel/3cd3a419-ee2c-4d7a-9396-60eab8d26908@oss.qualcomm.com/T/#m9e966877cda81c5661838fedadf4e69bd912cbb5
Changes in v3:
- Reworded semihosting section at Hexagon docs
- Rebased, added Reviewed-by's, dropped already merged patch
Changes in v2:
- Added patch 1, a fix for an existing bug that appeared with the new
test semantics from the last patch.
- Patch 3: s/hexagon_touch_memory/hexagon_peek_memory_range/
- Patch 7:
* Add semihosting spec link to docs
* Fixed HEX_SYS_EXCEPTION
- Patch 10:
* Moved tables to static definition
* Fixed compilation for Windows
- Dropped patch 11 (OPEN/READ/CLOSE_DIR support): for now we don't have
dirent semantics for Windows, so leave these ops to a followup series.
- Patch 14:
* Update test version
* Don't change directory
* Don't use os.path, use scratch_file
Brian Cain (4):
semihosting: add APIs for chardev-aware guest fd routing
target/hexagon: Add an errno mapping
python/machine: support routing semihosting output to the test console
tests/functional: Add hexagon semihosting systests
Matheus Tavares Bernardino (9):
target/hexagon: fix improper assign of cause code to exception index
target/hexagon: fix PC advancement for non-COF TB terminators
target/hexagon: add aux functions for guest mem load/store
hexagon: cpu_helper: add reg reading/writing helpers
semihosting: add callback to set error
target/hexagon: add semihosting support
semihosting: add ftruncate helper (to be used for hexagon)
target/hexagon: add main arch-specific semihosting operations
target/hexagon: add COREDUMP semihosting operation
docs/system/target-hexagon.rst | 8 +-
configs/targets/hexagon-softmmu.mak | 2 +
include/semihosting/common-semi.h | 2 +
include/semihosting/console.h | 9 +
include/semihosting/guestfd.h | 9 +
include/semihosting/syscalls.h | 2 +
target/hexagon/cpu_helper.h | 24 +
target/hexagon/internal.h | 1 +
hw/hexagon/hexagon_dsp.c | 2 +
semihosting/arm-compat-semi.c | 3 +-
semihosting/console.c | 5 +
semihosting/guestfd.c | 8 +
semihosting/syscalls.c | 29 +
target/arm/common-semi-target.c | 4 +
target/hexagon/common-semi-target.c | 51 ++
target/hexagon/cpu.c | 5 +-
target/hexagon/cpu_helper.c | 173 ++++++
target/hexagon/hexswi.c | 657 +++++++++++++++++++++-
target/hexagon/op_helper.c | 18 +-
target/hexagon/translate.c | 17 +-
target/riscv/common-semi-target.c | 4 +
hw/hexagon/Kconfig | 1 +
python/qemu/machine/machine.py | 10 +-
qemu-options.hx | 8 +-
target/hexagon/meson.build | 3 +
tests/functional/hexagon/meson.build | 5 +
tests/functional/hexagon/test_systests.py | 110 ++++
27 files changed, 1135 insertions(+), 35 deletions(-)
create mode 100644 target/hexagon/common-semi-target.c
create mode 100755 tests/functional/hexagon/test_systests.py
Range-diff against v2:
1: aaac9492e5a ! 1: 4f4ec84cb85 target/hexagon: fix improper assign of cause code to exception index
@@ Commit message
gen_exception(), which treats its argument as an event index and stores
it directly in cs->exception_index.
+ Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
## target/hexagon/cpu.c ##
2: 2f5247200ec < -: ----------- target/hexagon: fix get_phys_addr_debug with in-page offset
3: 2cac81d1782 = 2: ab16d424acd target/hexagon: fix PC advancement for non-COF TB terminators
4: b0f794c467a ! 3: db1ec7611b7 target/hexagon: add aux functions for guest mem load/store
@@ Commit message
Will be used for semihosting.
- Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
+ Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
## target/hexagon/cpu_helper.h ##
@@
5: 5b16ff40a6e = 4: b02e7a60814 hexagon: cpu_helper: add reg reading/writing helpers
6: 90074658cf5 = 5: c540d8251f2 semihosting: add APIs for chardev-aware guest fd routing
7: a08d1e274e7 = 6: a130a83d7a1 semihosting: add callback to set error
8: 5c5c06f35f7 ! 7: 0c46c3d9cf8 target/hexagon: add semihosting support
@@ Commit message
CONFIG_ARM_COMPATIBLE_SEMIHOSTING and routing trap0 to the
semihosting handler.
- Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
+ Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
## docs/system/target-hexagon.rst ##
@@ docs/system/target-hexagon.rst: Semihosting
@@ docs/system/target-hexagon.rst: Semihosting
+guest software can access the host console and filesystem. Read the
+`Hexagon Semihosting Specification
+<https://docs.qualcomm.com/doc/80-N2040-101_102648/topic/semihosting-specification.html>`__
-+for details. Semihosting is enabled on qemu-system-hexagon machines by default,
-+and it can be configured through ``-semihosting-config``.
++for details. Semihosting is enabled by default on hexagon-sim-compatible
++machines. This can be further configured through ``-semihosting-config``.
Hexagon Features
================
9: 7399327e99b = 8: 6bff530121c semihosting: add ftruncate helper (to be used for hexagon)
10: b66476c599c ! 9: 96776c988e4 target/hexagon: add main arch-specific semihosting operations
@@ Commit message
perform file I/O when running on qemu-system-hexagon.
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
+ Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
## include/semihosting/common-semi.h ##
11: 7fd1831acb4 ! 10: 9ac447d6831 target/hexagon: add COREDUMP semihosting operation
@@ Commit message
Implement the handler to decode the SSR cause field and
print the full register file, matching hexagon-sim behavior.
- Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
+ Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
## target/hexagon/internal.h ##
@@ target/hexagon/internal.h: int hexagon_hvx_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n);
12: 24731ad7a27 = 11: bf030fc808d target/hexagon: Add an errno mapping
13: c16ea7a7e6c = 12: 6d1f197c4ac python/machine: support routing semihosting output to the test console
14: 87a6d2559c3 ! 13: 4299b53256d tests/functional: Add hexagon semihosting systests
@@ Commit message
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
- ## tests/functional/hexagon/meson.build (new) ##
+ ## tests/functional/hexagon/meson.build ##
@@
-+# SPDX-License-Identifier: GPL-2.0-or-later
+
+ tests_hexagon_system_thorough = [
+ 'arch_tests',
++ 'systests',
+ ]
+
+test_hexagon_timeouts = {
+ 'systests': 180,
+}
-+
-+tests_hexagon_system_thorough = [
-+ 'systests',
-+]
## tests/functional/hexagon/test_systests.py (new) ##
@@
@@ tests/functional/hexagon/test_systests.py (new)
+
+if __name__ == "__main__":
+ QemuSystemTest.main()
-
- ## tests/functional/meson.build ##
-@@ tests/functional/meson.build: subdir('aarch64')
- subdir('alpha')
- subdir('arm')
- subdir('avr')
-+subdir('hexagon')
- subdir('hppa')
- subdir('i386')
- subdir('loongarch64')
--
2.37.2
next reply other threads:[~2026-07-20 17:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 17:40 Matheus Tavares Bernardino [this message]
2026-07-20 17:40 ` [PATCH v3 01/13] target/hexagon: fix improper assign of cause code to exception index Matheus Tavares Bernardino
2026-07-20 17:40 ` [PATCH v3 02/13] target/hexagon: fix PC advancement for non-COF TB terminators Matheus Tavares Bernardino
2026-07-20 17:40 ` [PATCH v3 03/13] target/hexagon: add aux functions for guest mem load/store Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 04/13] hexagon: cpu_helper: add reg reading/writing helpers Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 05/13] semihosting: add APIs for chardev-aware guest fd routing Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 06/13] semihosting: add callback to set error Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 07/13] target/hexagon: add semihosting support Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 08/13] semihosting: add ftruncate helper (to be used for hexagon) Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 09/13] target/hexagon: add main arch-specific semihosting operations Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 10/13] target/hexagon: add COREDUMP semihosting operation Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 11/13] target/hexagon: Add an errno mapping Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 12/13] python/machine: support routing semihosting output to the test console Matheus Tavares Bernardino
2026-07-20 17:41 ` [PATCH v3 13/13] tests/functional: Add hexagon semihosting systests Matheus Tavares Bernardino
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