* [PATCH 1/2] ASoC: dt-bindings: cs35l45: Adds SYNC properties
2026-08-11 17:06 [PATCH 0/2] Introduces MDSYNC support for CS35L45 Ricardo Rivera-Matos
@ 2026-08-11 17:06 ` Ricardo Rivera-Matos
2026-08-11 17:06 ` [PATCH 2/2] ASoC: cs35l45: Adds support for SYNC bus Ricardo Rivera-Matos
1 sibling, 0 replies; 5+ messages in thread
From: Ricardo Rivera-Matos @ 2026-08-11 17:06 UTC (permalink / raw)
To: David Rhodes, Richard Fitzgerald, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ricardo Rivera-Matos
Cc: linux-sound, patches, devicetree, linux-kernel
Introduces support for the multidevice synchronization (SYNC)
bus. The properties introduced allow for the configuration
of the device's transmitter IDs.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
---
.../bindings/sound/cirrus,cs35l45.yaml | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
index 70f6c62aedca..f64ba8c872b9 100644
--- a/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
+++ b/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
@@ -53,6 +53,29 @@ properties:
maximum: 3
default: 2
+ sync:
+ description:
+ Multidevice synchronization (SYNC) bus configuration
+ type: object
+ additionalProperties: false
+ properties:
+ cirrus,sync-lsw-txid:
+ description: |
+ Transmitter ID to use for long software (LSW) data packets
+ on the SYNC bus.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 7
+ default: 0
+ cirrus,sync-sw-txid:
+ description: |
+ Transmitter ID to use for short software (SW) data packets
+ on the SYNC bus.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 7
+ default: 0
+
patternProperties:
"^cirrus,gpio-ctrl[1-3]$":
description:
@@ -155,5 +178,9 @@ examples:
gpio-ctrl = <0x1>;
gpio-dir = <0x1>;
};
+ sync {
+ cirrus,sync-lsw-txid = <0x1>;
+ cirrus,sync-sw-txid = <0x1>;
+ };
};
};
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/2] ASoC: cs35l45: Adds support for SYNC bus
2026-08-11 17:06 [PATCH 0/2] Introduces MDSYNC support for CS35L45 Ricardo Rivera-Matos
2026-08-11 17:06 ` [PATCH 1/2] ASoC: dt-bindings: cs35l45: Adds SYNC properties Ricardo Rivera-Matos
@ 2026-08-11 17:06 ` Ricardo Rivera-Matos
2026-08-11 17:24 ` Mark Brown
1 sibling, 1 reply; 5+ messages in thread
From: Ricardo Rivera-Matos @ 2026-08-11 17:06 UTC (permalink / raw)
To: David Rhodes, Richard Fitzgerald, Liam Girdwood, Mark Brown,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ricardo Rivera-Matos, Jaroslav Kysela, Takashi Iwai
Cc: linux-sound, patches, devicetree, linux-kernel
Adds support for the multidevice synchronization (SYNC) bus.
The SYNC bus is an opaque one wire bus that is shared between
Cirrus devices. Initial support only includes software (SW)
data packets.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
---
sound/soc/codecs/cs35l45-tables.c | 4 ++
sound/soc/codecs/cs35l45.c | 77 ++++++++++++++++++++++++++++++-
sound/soc/codecs/cs35l45.h | 23 +++++++++
3 files changed, 103 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/cs35l45-tables.c b/sound/soc/codecs/cs35l45-tables.c
index d2ecc7b3f619..af8ffe9cb542 100644
--- a/sound/soc/codecs/cs35l45-tables.c
+++ b/sound/soc/codecs/cs35l45-tables.c
@@ -51,6 +51,8 @@ static const struct reg_default cs35l45_defaults[] = {
{ CS35L45_WKI2C_CTL, 0x00000030 },
{ CS35L45_REFCLK_INPUT, 0x00000510 },
{ CS35L45_GLOBAL_SAMPLE_RATE, 0x00000003 },
+ { CS35L45_SYNC_TX_RX_ENABLES, 0x00000200 },
+ { CS35L45_SYNC_SW_TX_ID, 0x00000000 },
{ CS35L45_ASP_ENABLES1, 0x00000000 },
{ CS35L45_ASP_CONTROL1, 0x00000028 },
{ CS35L45_ASP_CONTROL2, 0x18180200 },
@@ -134,6 +136,8 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg)
case CS35L45_PWRMGT_STS:
case CS35L45_REFCLK_INPUT:
case CS35L45_GLOBAL_SAMPLE_RATE:
+ case CS35L45_SYNC_TX_RX_ENABLES:
+ case CS35L45_SYNC_SW_TX_ID:
case CS35L45_ASP_ENABLES1:
case CS35L45_ASP_CONTROL1:
case CS35L45_ASP_CONTROL2:
diff --git a/sound/soc/codecs/cs35l45.c b/sound/soc/codecs/cs35l45.c
index a032bb23b4ac..a16a757ef4ad 100644
--- a/sound/soc/codecs/cs35l45.c
+++ b/sound/soc/codecs/cs35l45.c
@@ -6,6 +6,7 @@
//
// Author: James Schulman <james.schulman@cirrus.com>
+#include <linux/bitfield.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
@@ -195,6 +196,43 @@ static int cs35l45_activate_ctl(struct snd_soc_component *component,
return 0;
}
+static int cs35l45_sync_en_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component =
+ snd_soc_kcontrol_component(kcontrol);
+ struct cs35l45_private *cs35l45 =
+ snd_soc_component_get_drvdata(component);
+
+ ucontrol->value.integer.value[0] = cs35l45->sync_en;
+
+ return 0;
+}
+
+static int cs35l45_sync_en_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component =
+ snd_soc_kcontrol_component(kcontrol);
+ struct cs35l45_private *cs35l45 =
+ snd_soc_component_get_drvdata(component);
+
+ if (!cs35l45->sync_pin_set)
+ return -EPERM;
+
+ if (ucontrol->value.integer.value[0] == cs35l45->sync_en)
+ return 0;
+
+ if ((bool)ucontrol->value.integer.value[0])
+ regmap_set_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES2, CS35L45_SYNC_EN_MASK);
+ else
+ regmap_clear_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES2, CS35L45_SYNC_EN_MASK);
+
+ cs35l45->sync_en = ucontrol->value.integer.value[0];
+
+ return 0;
+}
+
static int cs35l45_amplifier_mode_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
@@ -607,6 +645,15 @@ static const struct snd_kcontrol_new cs35l45_controls[] = {
0, cs35l45_dig_pcm_vol_tlv),
WM_ADSP2_PRELOAD_SWITCH("DSP1", 1),
WM_ADSP_FW_CONTROL("DSP1", 0),
+ SOC_SINGLE_BOOL_EXT("SYNC Enable", 0, cs35l45_sync_en_get, cs35l45_sync_en_put),
+ SOC_SINGLE("SYNC LSW RX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+ CS35L45_SYNC_LSW_RX_EN_SHIFT, 1, 0),
+ SOC_SINGLE("SYNC LSW TX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+ CS35L45_SYNC_LSW_TX_EN_SHIFT, 1, 0),
+ SOC_SINGLE("SYNC SW RX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+ CS35L45_SYNC_SW_RX_EN_SHIFT, 1, 0),
+ SOC_SINGLE("SYNC SW TX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+ CS35L45_SYNC_SW_TX_EN_SHIFT, 1, 0),
};
static int cs35l45_set_pll(struct cs35l45_private *cs35l45, unsigned int freq)
@@ -1064,6 +1111,25 @@ static int cs35l45_sys_resume(struct device *dev)
return 0;
}
+static int cs35l45_apply_sync_property_config(struct cs35l45_private *cs35l45,
+ struct device_node *child)
+{
+ unsigned int val;
+ int ret;
+
+ ret = of_property_read_u32(child, "sync-lsw-txid", &val);
+ if (!ret)
+ regmap_update_bits(cs35l45->regmap, CS35L45_SYNC_SW_TX_ID,
+ CS35L45_SYNC_LSW_TXID_MASK, val << CS35L45_SYNC_LSW_TXID_SHIFT);
+
+ ret = of_property_read_u32(child, "sync-sw-txid", &val);
+ if (!ret)
+ regmap_update_bits(cs35l45->regmap, CS35L45_SYNC_SW_TX_ID,
+ CS35L45_SYNC_SW_TXID_MASK, val);
+
+ return 0;
+}
+
static int cs35l45_apply_property_config(struct cs35l45_private *cs35l45)
{
struct device_node *node = cs35l45->dev->of_node;
@@ -1110,10 +1176,13 @@ static int cs35l45_apply_property_config(struct cs35l45_private *cs35l45)
val << CS35L45_GPIO_POL_SHIFT);
ret = of_property_read_u32(child, "gpio-ctrl", &val);
- if (!ret)
+ if (!ret) {
+ if ((i == 0) && (val == CS35L45_GP1_CTRL_MDSYNC))
+ cs35l45->sync_pin_set = true;
regmap_update_bits(cs35l45->regmap, pad_regs[i],
CS35L45_GPIO_CTRL_MASK,
val << CS35L45_GPIO_CTRL_SHIFT);
+ }
ret = of_property_read_u32(child, "gpio-invert", &val);
if (!ret) {
@@ -1134,6 +1203,12 @@ static int cs35l45_apply_property_config(struct cs35l45_private *cs35l45)
val << CS35L45_ASP_DOUT_HIZ_CTRL_SHIFT);
}
+ child = of_get_child_by_name(node, "cirrus,sync");
+ if (child)
+ cs35l45_apply_sync_property_config(cs35l45, child);
+
+ of_node_put(child);
+
return 0;
}
diff --git a/sound/soc/codecs/cs35l45.h b/sound/soc/codecs/cs35l45.h
index 7a790d2acac7..f8a4713ae92f 100644
--- a/sound/soc/codecs/cs35l45.h
+++ b/sound/soc/codecs/cs35l45.h
@@ -35,6 +35,8 @@
#define CS35L45_PWRMGT_STS 0x0000290C
#define CS35L45_REFCLK_INPUT 0x00002C04
#define CS35L45_GLOBAL_SAMPLE_RATE 0x00002C0C
+#define CS35L45_SYNC_TX_RX_ENABLES 0x00003400
+#define CS35L45_SYNC_SW_TX_ID 0x00003408
#define CS35L45_BOOST_CCM_CFG 0x00003808
#define CS35L45_BOOST_DCM_CFG 0x0000380C
#define CS35L45_BOOST_OV_CFG 0x0000382C
@@ -183,6 +185,8 @@
#define CS35L45_ASP_EN_SHIFT 27
#define CS35L45_AMP_DRE_EN_SHIFT 20
#define CS35L45_AMP_DRE_EN_MASK BIT(20)
+#define CS35L45_SYNC_EN_SHIFT 8
+#define CS35L45_SYNC_EN_MASK BIT(8)
#define CS35L45_MEM_RDY_SHIFT 1
#define CS35L45_MEM_RDY_MASK BIT(1)
@@ -220,6 +224,22 @@
#define CS35L45_44P100_KHZ 0x0B
#define CS35L45_88P200_KHZ 0x0C
+/* SYNC_TX_RX_ENABLES */
+#define CS35L45_SYNC_LSW_RX_EN_SHIFT 19
+#define CS35L45_SYNC_LSW_RX_EN_MASK BIT(19)
+#define CS35L45_SYNC_LSW_TX_EN_SHIFT 18
+#define CS35L45_SYNC_LSW_TX_EN_MASK BIT(18)
+#define CS35L45_SYNC_SW_RX_EN_SHIFT 17
+#define CS35L45_SYNC_SW_RX_EN_MASK BIT(17)
+#define CS35L45_SYNC_SW_TX_EN_SHIFT 16
+#define CS35L45_SYNC_SW_TX_EN_MASK BIT(16)
+
+/* SYNC_SW_TX_ID */
+#define CS35L45_SYNC_LSW_TXID_SHIFT 8
+#define CS35L45_SYNC_LSW_TXID_MASK GENMASK(10, 8)
+#define CS35L45_SYNC_SW_TXID_SHIFT 0
+#define CS35L45_SYNC_SW_TXID_MASK GENMASK(2, 0)
+
/* ASP_ENABLES_1 */
#define CS35L45_ASP_RX2_EN_SHIFT 17
#define CS35L45_ASP_RX1_EN_SHIFT 16
@@ -320,6 +340,7 @@
#define CS35L45_GPIO_CTRL_MASK GENMASK(22, 20)
#define CS35L45_GPIO_INVERT_SHIFT 19
#define CS35L45_GPIO_INVERT_MASK BIT(19)
+#define CS35L45_GP1_CTRL_MDSYNC 0x2
/* CS35L45_IRQ1_EINT_1 */
#define CS35L45_BST_UVP_ERR_SHIFT 7
@@ -493,6 +514,8 @@ struct cs35l45_private {
struct regulator *vdd_a;
bool initialized;
bool sysclk_set;
+ bool sync_en;
+ bool sync_pin_set;
u8 slot_width;
u8 slot_count;
int amplifier_mode;
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread